LTC1155
1
Rev. C
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TYPICAL APPLICATION
FEATURES DESCRIPTION
Dual High Side
Micropower MOSFET Driver
The LT C
®
1155 dual high side gate driver allows using low
cost N-channel FETs for high side switching applications.
An internal charge pump boosts the gate above the posi-
tive rail, fully enhancing an N-channel MOSFET with no
external components. Micropower operation, with 8µA
standby current and 85µA operating current, allows use
in virtually all systems with maximum efficiency.
Included on-chip is overcurrent sensing to provide au-
tomatic shutdown in case of short circuits. A time delay
can be added in series with the current sense to prevent
false triggering on high in-rush loads such as capacitors
and incandescent lamps.
The LTC1155 operates off of a 4.5V to 18V supply input and
safely drives the gates of virtually all FETs. The LTC1155
is well suited for low voltage (battery-powered) applica-
tions, particularly where micropower “sleep” operation
is required.
The LTC1155 is available in both 8-pin PDIP and 8-pin
SO packages.
APPLICATIONS
n Fully Enhances N-Channel Power MOSFETs
n 8µA Standby Current
n 85µA ON Current
n Short-Circuit Protection
n Wide Power Supply Range: 4.5V to 18V
n Controlled Switching ON and OFF Times
n No External Charge Pump Components
n Replaces P-Channel High Side MOSFETs
n Compatible with Standard Logic Families
n Available in 8-Pin SO Package
n Laptop Power Bus Switching
n SCSI Termination Power Switching
n Cellular Phone Power Management
n P-Channel Switch Replacement
n Relay and Solenoid Drivers
n Low Frequency Half H-Bridge
n Motor Speed and Torque Control
1155 TA01
RSEN
0.02Ω
CDLY
0.1µF 10µF
5A
MAX
RDLY
100k
POWER BUS
µP
SYSTEM DISK
DRIVE DISPLAY PRINTER,
ETC.
LTC1155
TTL, CMOS INPUT
TTL, CMOS INPUT
GND
GND
IN1 IN2
G2
DS2VS
DS1
G1
VS = 4.5V TO 5.5V
CDLY
0.1µF
RSEN
0.02Ω
RDLY
100k
*SURFACE MOUNT
*IRLR034
5A
MAX
*IRLR034
+
OUTPUT CURRENT (A)
0
0.00
VOLTAGE DROP (V)
0.05
0.10
0.15
0.20
0.25
1 2 3
1155 TA02
Switch Voltage Drop
Laptop Computer Power Bus Switch with Short-Circuit Protection
LTC1155
2
Rev. C
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ABSOLUTE MAXIMUM RATINGS
Supply Voltage ..........................................................22V
Input Voltage ........................(VS +0.3V) to (GND – 0.3V)
Gate Voltage ..........................(VS +24V) to (GND – 0.3V)
Current (Any Pin) ...................................................50mA
Storage Temperature Range .................. – 65°C to 150°C
(Note 1)
Operating Temperature Range
LTC1155C ................................................ 0°C to 70°C
LTC1155I ............................................ – 40°C to 85°C
LTC1155M (OBSOLETE) ................... – 55°C to 125°C
Lead Temperature Range (Soldering, 10 sec.) ...... 300°C
ORDER INFORMATION
LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE
LTC1155CN8#PBF LTC1155CN8#TRPBF 8-Lead PDIP 0°C to 70°C
LTC1155IN8#PBF LTC1155IN8#TRPBF 8-Lead PDIP –40°C to 85°C
OBSOLETE PACKAGE
LTC1155CJ8#PBF LTC1155CJ8#TRPBF 8-Lead CERDIP 0°C to 70°C
LTC1155MJ8#PBF LTC1155MJ8#TRPBF 8-Lead CERDIP –55°C to 125°C
LTC1155CS8#PBF LTC1155CS8#TRPBF 1155 8-Lead Plastic SO 0°C to 70°C
LTC1155IS8#PBF LTC1155IS8#TRPBF 1155I 8-Lead Plastic SO –40°C to 85°C
Contact the factory for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Tape and reel specifications. Some packages are available in 500 unit reels through designated sales channels with #TRMPBF suffix.
PIN CONFIGURATION
1
2
3
4
8
7
6
5
TOP VIEW
DS1
G1
GND
IN1
DS2
G2
VS
IN2
J8 PACKAGE
8-LEAD CERDIP
TJMAX = 150°C, θJA = 100°C/W (J8)
OBSOLETE PACKAGE
1
2
3
4
8
7
6
5
TOP VIEW
DS1
G1
GND
IN1
DS2
G2
VS
IN2
N8 PACKAGE
8-LEAD PDIP
TJMAX = 100°C, θJA = 130°C/W (N8)
1
2
3
4
8
7
6
5
TOP VIEW
DS2
G2
VS
IN2
DS1
G1
GND
IN1
S8 PACKAGE
8-LEAD PLASTIC SO
TJMAX = 100°C, θJA = 150°C/W
LTC1155
3
Rev. C
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ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VS = 4.5V to 18V, unless otherwise noted.
SYMBOL PARAMETER CONDITIONS
LTC1155M (OBSOLETE) LTC1155C/LTC1155I
UNITSMIN TYP MAX MIN TYP MAX
VSSupply Voltage l4.5 18 4.5 18 V
IQQuiescent Current OFF VIN = 0V, VS = 5V (Note 2) 8 20 8 20 µA
Quiescent Current ON VS = 5V, VIN = 5V (Note 3) 85 120 85 120 µA
Quiescent Current ON VS = 12V, VIN = 5V (Note 3) 180 400 180 400 µA
VINH Input High Voltage l2.0 2.0 V
VINL Input Low Voltage l0.8 0.8 V
IIN Input Current 0V < VIN < VSl±1.0 ±1.0 µA
CIN Input Capacitance 5 5 pF
VSEN Drain Sense Threshold Voltage
l
80
75
100
100
120
125
80
75
100
100
120
125
mV
mV
ISEN Drain Sense Input Current 0V < VSEN < VS±0.1 ±0.1 µA
VGATE-VSGate Voltage Above Supply VS = 5V
VS = 6V
VS = 12V
l
l
l
6.0
7.5
15
6.8
8.5
18
9.0
15
25
6.0
7.5
15
6.8
8.5
18
9.0
15
25
V
V
V
tON Turn ON Time VS = 5V, CGATE = 1000pF
Time for VGATE > VS + 2V
Time for VGATE > VS + 5V
50
200
250
1100
750
2000
50
200
250
1100
750
2000
µs
µs
VS = 12V, CGATE = 1000pF
Time for VGATE > VS + 5V
Time for VGATE > VS + 10V
50
120
180
450
500
1200
50
120
180
450
500
1200
µs
µs
tOFF Turn OFF Time VS = 5V, CGATE = 1000pF
Time for VGATE < 1V
10
36
60
10
36
60
µs
VS = 12V, CGATE = 1000pF
Time for VGATE < 1V
10
26
60
10
26
60
µs
tSC Short-Circuit Turn OFF Time VS = 5V, CGATE = 1000pF
Time for VGATE < 1V
5
16
30
5
16
30
µs
VS = 12V, CGATE = 1000pF
Time for VGATE < 1V
5
16
30
5
16
30
µs
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: Quiescent current OFF is for both channels in OFF condition.
Note 3: Quiescent current ON is per driver and is measured independently.
LTC1155
4
Rev. C
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TYPICAL PERFORMANCE CHARACTERISTICS
Input Threshold Voltage Drain Sense Threshold Voltage Low Side Gate Voltage
Standby Supply Current Supply Current/Side (ON) High Side Gate Voltage
SUPPLY VOLTAGE (V)
0
0
SUPPLY CURRENT (µA)
30
35
40
45
50
5 10 20
1155 G01
5
10
15
20
25
15
VIN1 = VIN2 = 0V
TJ = 25°C
SUPPLY VOLTAGE (V)
0
0
SUPPLY CURRENT (µA)
600
700
800
900
1000
5 10 20
1155 G02
100
200
300
400
500
15
VIN1 OR VIN2 = 2V
TJ = 25°C
SUPPLY VOLTAGE (V)
0
4
V – V (V)
16
18
20
22
24
5 10 20
1155 TPC03
6
8
10
12
14
15
S
GATE
SUPPLY VOLTAGE (V)
0
0.4
INPUT THRESHOLD VOLTAGE (V)
1.6
1.8
2.0
2.2
2.4
5 10 20
1155 G04
0.6
0.8
1.0
1.2
1.4
15
VON
VOFF
SUPPLY VOLTAGE (V)
0
50
DRAIN SENSE THRESHOLD VOLTAGE (V)
110
120
130
140
150
5 10 20
1155 G05
60
70
80
90
100
15
SUPPLY VOLTAGE (V)
0
0
VGATE (V)
18
21
24
27
30
2 4 10
1155 G06
3
6
9
12
15
68
Turn ON Time Turn OFF Time Short-Circuit Turn OFF Delay Time
SUPPLY VOLTAGE (V)
0
0
TURN-ON TIME (µs)
600
700
800
900
1000
5 10 20
1155 G07
100
200
300
400
500
15
CGATE = 1000pF
VGS = 5V
VGS = 2V
SUPPLY VOLTAGE (V)
0
0
TURN OFF TIME (µs)
30
35
40
45
50
5 10 20
1155 G08
5
10
15
20
25
15
CGATE = 100pF
TIME FOR VGATE < 1V
SUPPLY VOLTAGE (V)
0
0
TURN-OFF TIME (µs)
30
35
40
45
50
5 10 20
1155 G09
5
10
15
20
25
15
VSEN = VS –1V
NO EXTERNAL DELAY
CGATE = 1000pF
TIME FOR VGATE < 1V
LTC1155
5
Rev. C
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TYPICAL PERFORMANCE CHARACTERISTICS
Standby Supply Current Supply Current Per Side (ON) Input ON Threshold
TEMPERATURE (°C)
–50
0
SUPPLY CURRENT (µA)
5
10
25
35
40
50
–25 0 25 50
1155 G10
15
20
30
45
75 100 125
VS = 5V
VS = 18V
TEMPERATURE (°C)
–50
0
SUPPLY CURRENT (µA)
100
200
500
700
800
1000
–25 0 25 50
1155 G11
300
400
600
900
75 100 125
VS = 12V
VS = 5V
TEMPERATURE (°C)
–50
0.4
INPUT THRESHOLD (V)
0.6
0.8
1.4
1.8
2.0
2.4
–25 0 25 50
1155 G12
1.0
1.2
1.6
2.2
75 100 125
VS = 18V
VS = 5V
PIN FUNCTIONS
Input Pin
The LTC1155 logic input is a high impedance CMOS gate
and should be grounded when not in use. These input
pins have ESD protection diodes to ground and supply
and, therefore, should not be forced beyond the power
supply rails.
Gate Drive Pin
The gate drive pin is either driven to ground when the
switch is turned OFF or driven above the supply rail when
the switch is turned ON. This pin is a relatively high imped-
ance when driven above the rail (the equivalent of a few
hundred kΩ). Care should be taken to minimize any loading
of this pin by parasitic resistance to ground or supply.
Supply Pin
The supply pin of the LTC1155 serves two vital purposes.
The first is obvious: it powers the input, gate drive, regula-
tion and protection circuitry. The second purpose is less
obvious: it provides a Kelvin connection to the top of the
two drain sense resistors for the internal 100mV reference.
The supply pin should be connected directly to the power
supply source as close as possible to the top of the two
sense resistors.
The supply pin of the LTC1155 should not be forced below
ground as this may result in permanent damage to the
device. A 300Ω resistor should be inserted in series with
the ground pin if negative supply voltages are anticipated.
Drain Sense Pin
As noted previously, the drain sense pin is compared
against the supply pin voltage. If the voltage at this pin is
more than 100mV below the supply pin, the input latch will
be reset and the MOSFET gate will be quickly discharged.
Cycle the input to reset the short-circuit latch and turn the
MOSFET back on.
This pin is also a high impedance CMOS gate with ESD
protection and, therefore, should not be forced beyond the
power supply rails. To defeat the over current protection,
short the drain sense to supply.
Some loads, such as large supply capacitors, lamps or
motors require high inrush currents. An RC time delay
must be added between the sense resistor and the drain
sense pin to ensure that the drain sense circuitry does not
false trigger during start-up. This time constant can be
set from a few microseconds to many seconds. However,
very long delays may put the MOSFET in risk of being
destroyed by a short-circuit condition (see Applications
Information section).
LTC1155
6
Rev. C
For more information www.analog.com
BLOCK DIAGRAM
OPERATION
1155 BD
GATE
ONE
SHOT FAST/SLOW
GATE CHARGE
LOGIC
OSCILLATOR
AND CHARGE
PUMP
INPUT
LATCH
GATE CHARGE
AND DISCHARGE
CONTROL LOGIC
R
S
10µs
DELAY
COMP
100mV
REFERENCE
DRAIN
SENSE
ANALOG SECTION
ANALOG DIGITAL
TTL-TO-CMOS
CONVERTER
VS
IN
LOW STANDBY
CURRENT
REGULATOR
GND
VOLTAGE
REGULATORS
The LTC1155 contains two independent power MOSFET
gate drivers and protection circuits (refer to the Block
Diagram for details). Each half of the LTC1155 consists
of the following functional blocks:
TTL and CMOS Compatible Inputs
Each driver input has been designed to accommodate a
wide range of logic families. The input threshold is set at
1.3V with approximately 100mV of hysteresis.
A voltage regulator with low standby current provides
continuous bias for the TTL to CMOS converters. The TTL
to CMOS converter output enables the rest of the circuitry.
In this way the power consumption is kept to a minimum
in the standby mode.
Internal Voltage Regulation
The output of the TTL to CMOS converter drives two
regulated supplies which power the low voltage CMOS
logic and analog blocks. The regulator outputs are isolated
from each other so that the noise generated by the charge
pump logic is not coupled into the 100mV reference or
the analog comparator.
Gate Charge Pump
Gate drive for the power MOSFET is produced by an
adaptive charge pump circuit that generates a gate volt-
age substantially higher than the power supply voltage.
The charge pump capacitors are included on-chip and,
therefore, no external components are required to gener-
ate the gate drive.
Drain Current Sense
The LTC1155 is configured to sense the drain current of
the power MOSFET in high side applications. An internal
100mV reference is compared to the drop across a sense
resistor (typically 0.002Ω to 0.1Ω) in series with the drain
lead. If the drop across this resistor exceeds the internal
100mV threshold, the input latch is reset and the gate is
quickly discharged by a large N-channel transistor.
Controlled Gate Rise and Fall Times
When the input is switched ON and OFF, the gate is
charged by the internal charge pump and discharged in a
controlled manner. The charge and discharge rates have
been set to minimize RFI and EMI emissions in normal
operation. If a short circuit or current overload condition
is encountered, the gate is discharged very quickly (typi-
cally a few microseconds) by a large N-channel transistor.
LTC1155
7
Rev. C
For more information www.analog.com
APPLICATIONS INFORMATION
Protecting the MOSFET
The MOSFET is protected against destruction by removing
drive from the gate as soon as an overcurrent condition is
detected. Resistive and inductive loads can be protected
with no external time delay. Large capacitive or lamp loads,
however, require that the overcurrent shutdown function
be delayed long enough to start the load but short enough
to ensure the safety of the MOSFET.
Example Calculations
Consider the circuit of Figure 1. A power MOSFET is driven
by one side of an LTC1155 to switch a high inrush cur-
rent load. The drain sense resistor is selected to limit the
maximum DC current to 3.3A.
RSEN = VSEN/ITRIP
= 0.1/3.3A
= 0.03Ω
A time delay is introduced between RSEN and the drain
sense pin of the LTC1155 which provides sufficient delay
to start a high inrush load such as large supply capacitors.
In this example circuit, we have selected the IRLZ34 because
of its low RDS(ON)(0.05Ω with VGS = 5V). The FET drops
0.1V at 2A and, therefore, dissipates 200mW in normal
operation (no heat sinking required).
1155 F01
IRLZ34
LOAD
LTC1155
GND
GND G1
DS1
VS
IN1
VS = 5.0V
CDLY
0.22µF
RSEN
0.03Ω
RDLY
270k
Figure 1. Adding an RC Delay
in the power supply can be substantial and attributed to
many sources including harness wiring, PCB traces, supply
capacitor ESR, transformer resistance or battery resistance.
For this example, we assume a worst-case scenario; i.e.,
that the power supply to the power MOSFET is “hard” and
provides a constant 5V regardless of the current. In this
case, the current is limited by the RDS(ON) of the MOSFET
and the drain sense resistance. Therefore:
IPEAK = VSUPPLY/0.08Ω
= 62.5A
The drop across the drain sense resistor under these
conditions is much larger than 100mV and is equal to the
drain current times the sense resistance:
VDROP = (IPEAK)(RSEN)
= 1.88V
By consulting the power MOSFET data sheet SOA graph,
we note that the IRLZ34 is capable of delivering 62.5A at a
drain-to-source voltage of 3.12V for approximately 10ms.
An RC time constant can now be calculated which satisfies
this requirement:
RC =
– t
In 1 −VSEN
RSEN •IMAX
⎡
⎣
⎢
⎢
⎤
⎦
⎥
⎥
RC =– 0.01
In 1 −0.10
0.030 •62.5
⎡
⎣
⎢
⎤
⎦
⎥
=– 0.01/– 0.054
=182ms
This time constant should be viewed as a maximum
safe delay time and should be reduced if the competing
requirement of starting a high inrush current load is less
stringent; i.e., if the inrush time period is calculated at
20ms, the RC time constant should be set at roughly two
or three times this time period and not at the maximum
of 182ms. A 60ms time constant would be produced
with a 270k resistor and a 0.22µF capacitor (as shown in
Figure 1).
If the output is shorted to ground, the current through
the FET rises rapidly and is limited by the RDS(ON) of the
FET, the drain sense resistor and the series resistance
between the power supply and the FET. Series resistance
LTC1155
8
Rev. C
For more information www.analog.com
APPLICATIONS INFORMATION
Graphical Approach to Selecting RD LY and CD LY
Figure 2 is a graph of normalized overcurrent shutdown
time versus normalized MOSFET current. This graph can
be used instead of the above equation to calculate the RC
time constant. The Y axis of the graph is normalized to
one RC time constant. The X axis is normalized to the set
current. (The set current is defined as the current required
to develop 100mV across the drain sense resistor).
Note that the shutdown time is shorter for increasing
levels of MOSFET current. This ensures that the total
energy dissipated by the MOSFET is always within the
bounds established by the MOSFET manufacturer for
safe operation.
to the sense pin and dramatically reducing the amount of
time the MOSFET is in an overload condition. The drain
sense resistor value is selected to limit the maximum DC
current to 4A. Above 28A, the delay time drops to 10µs.
MOSFET CURRENT (1 = SET CURRENT)
1
0.01
OVERCURRENT SHUTDOWN TIME (1= RC)
0.1
1
10
5 10 20 100
1155 F02
2 50
Figure 2. Shutdown Time vs MOSFET Current
Switched Supply Applications
Large inductive loads, such as solenoids, relays and mo-
tors store energy which must be directed back to either
the power supply or to ground when the supply voltage is
interrupted (see Figure 4). In normal operation, when the
switch is turned OFF, the energy stored in the inductor is
harmlessly absorbed by the MOSFET; i.e., the current flows
out of the supply through the MOSFET until the inductor
current falls to zero.
1155 F03
IRLZ34
LOAD
LTC1155
GND
GND G1
DS1
VS
IN1
VS = 5.0V
CDLY
0.22µF
RSEN
0.025Ω
RDLY
270k
D1
1N4148
Figure 4. Switched Supply
Figure 3. Using a Speed-Up Diode
1155 F04
IRLZ34
LLOAD
LTC1155
GND
GND G1
DS1
VS
IN1
CDLY RSEN
0.025Ω
RDLY
CS
++
In the example presented above, we established that the
power MOSFET should not be allowed to pass 62.5A for
more than 10ms. 62.5A is roughly 18 times the set cur-
rent of 3.3A. By drawing a line up from 18 and reflecting
it off the curve, we establish that the RC time constant
should be set at 10ms divided by 0.054, or 180ms. Both
methods result in the same conclusion.
Using a Speed Up Diode
A way to further reduce the amount of time that the power
MOSFET is in a short-circuit condition is to “bypass”the
delay resistor with a small signal diode as shown in Fig-
ure3. The diode will engage when the drop across the
drain sense resistor exceeds 0.7V, providing a direct path
LTC1155
9
Rev. C
For more information www.analog.com
APPLICATIONS INFORMATION
Overvoltage Protection
The MOSFET and load can be protected against overvolt-
age conditions by using the circuit of Figure 6. The drain
sense function is used to detect an overvoltage condition
and quickly discharge the power MOSFET gate. The 18V
zener diode conducts when the supply voltage exceeds
18.6V and pulls the drain sense pin 0.6V below the sup-
ply pin voltage.
The supply voltage is limited to 18.6V and the gate drive is
immediately removed from the MOSFET to ensure that it
cannot conduct during the overvoltage period. The gate of
the MOSFET will be latched OFF until the supply transient
is removed and the input turned OFF and ON again.
If the MOSFET is turned ON and the power supply (battery)
removed, the inductor current is delivered by the supply
capacitor. The supply capacitor must be large enough to
deliver the energy demanded by the discharging inductor.
If the storage capacitor is too small, the supply lead of
the LTC1155 may be pulled below ground, permanently
destroying the device.
Consider the case of a load inductance of 1mH which
is supporting 3A when the 6V power supply connection
is interrupted. A supply capacitor of at least 250µF is
required to prevent the supply lead of the LTC1155 from
being pulled below ground (along with any other circuitry
tied to the supply).
Any wire between the power MOSFET source and the load
will add a small amount of parasitic inductance in series
with the load (approximately 0.4µH/foot). Bypass the power
supply lead of the LTC1155 with a minimum of 10µF to
ensure that this parasitic load inductance is discharged
safely, even if the load is otherwise resistive.
Large Inductive Loads
Large inductive loads (>0.1mH) may require diodes con-
nected directly across the inductor to safely divert the
stored energy to ground. Many inductive loads have these
diodes included. If not, a diode of the proper current rat-
ing should be connected across the load to safely divert
the stored energy.
Reverse-Battery Protection
The LTC1155 can be protected against reverse-battery
conditions by connecting a resistor in series with the
ground lead as shown in Figure 5. The resistor limits the
supply current to less than 50mA with –12V applied. Since
the LTC1155 draws very little current while in normal
operation, the drop across the ground resistor is minimal.
The TTL or CMOS driving logic is protected against
reverse-battery conditions by the 100k input current
limiting resistor. The addition of 100k resistance in series
with the input pin will not affect the turn ON and turn OFF
times which are dominated by the controlled gate charge
and discharge periods.
1155 F05
LOAD
LTC1155
GND
GND G1
DS1
VS
IN1
VS = 4.5V TO 18V
CDLY RSEN
RDLY
100k
5V
300Ω
1/4W
10µF
25V
+
Figure 5. Reverse Battery Protection
Figure 6. Overvoltage Shutdown and Protection
1155 F06
LOAD
LTC1155
GND
GND G1
DS1
VS
IN1
VS = 4.5V TO 18V
510Ω
10k 1N4148
18V
LTC1155
10
Rev. C
For more information www.analog.com
TYPICAL APPLICATIONS
Dual 2A Autoreset Electronic Fuse
1155 TA03
0.03Ω
10µF
1/2 SI9956DY
30k
LTC1155
GND
IN1 IN2
DS2VS
DS1
0.03Ω
G2
G1
0.1µF
30k
0.1µF
5V
100k
1/2 SI9956DY
1N4148
1N4148
OUT 1 OUT 2
100k
750k
1.0µF
LMC555
6
1
2
3
8 4 fO = 1Hz
ALL COMPONENTS SHOWN ARE SURFACE MOUNT
+
High Side Driver with VDS Sense Short-Circuit Shutdown
1155 TA04
1/2
LTC1155
GND G1
DS1
VS
IN1
4.5V TO 6V
30k
270k
5V
10µF
LOAD
0.01µF
*
IRLZ24
*ANY 74C OR 74HC LOGIC GATE.
MOSFET SHUTS DOWN IF VDS > 1V
+
LTC1155
11
Rev. C
For more information www.analog.com
TYPICAL APPLICATIONS
X-NOR Fault Detection
Low Side Driver with Drain End Current Sensing Low Side Driver with Source End Current Sensing
Truth Table
IN OUT CONDITION F LT
0 0 Switch OFF 1
1 0 Short Circuit 0
0 1 Open Load 0
1 1 Switch ON 1
1155 TA05
1/2
LTC1155
GND G1
DS1
VS
IN1
4.5V TO 6V
0.1Ω
100k
10µF
LOAD
IRLD024
FAULT
10k
74C266
+
1155 TA07
1/2
LTC1155
GND G1
DS1
VS
IN1
5V
51Ω
10µF
LOAD
SMP25N05
*DO NOT SUBSTITUTE. MUST BE A PRECISION, SINGLE
SUPPLY, MICROPOWER OP AMP (IQ < 60µA)
–
+
51Ω 0.02Ω
5%
LT®1077*
VLOAD
6
73
2
4
+
1155 TA06
1/2
LTC1155
GND G1
DS1
VS
IN1
5V
0.05Ω
5%
10µF
LOAD
SMP25N05
+
LTC1155
12
Rev. C
For more information www.analog.com
TYPICAL APPLICATIONS
Using the Second Channel for Fault Detection
Automotive High Side Driver with Reverse-Battery
and High Voltage Transient Protection
1155 TA08
1/2
LTC1155
GND G1
DS1
VS
IN1
9V TO 16V
0.02Ω
5%
10µF
VALVE,
ETC.
MTP50N05E
*PROTECTS TTL/CMOS GATES DURING HIGH VOLTAGE
TRANSIENT OR REVERSE BATTERY
**NOT REQUIRED FOR INDUCTIVE OR RESISTIVE LOADS
5V
100k* 18V
1N4746A
18V
1N4746A
RDLY**
CDLY**
M
300Ω
1/4W
+
1155 TA10
LTC1155
GND G1
DS2VS
IN1
4.5V TO 5.5V
0.05Ω
10µF
LOAD
SMD25N05-45L
NOTE:
DRAIN SENSE 2 IS USED TO DETECT A FAULT IN CHANNEL 1.
GATE 2 PULLS DOWN ON DRAIN SENSE 1 TO DISCHARGE
THE MOSFET AND REPORT THE FAULT TO THE µP
*NOT REQUIRED FOR RESISTIVE OR INDUCTIVE LOADS
0.1µF*
100k
µP OR
CONTROL
LOGIC 1N4148
1N4148
30k*
IN2
G2
DS1FLT
ON/OFF
100k
+
LTC1155
13
Rev. C
For more information www.analog.com
TYPICAL APPLICATIONS
Bootstrapped Gate Drive for (100Hz < FO < 10kHz)
5V/3A Extremely Low Voltage Drop Regulator with 10µA Standby
Current and Short-Circuit Protection
1155 TA09
1/2
LTC1155
GND G1
DS1
VS
IN1
5.2V TO 6V
0.02Ω
10µF
IRLR024
*CAPACITOR ESR SHOULD BE LESS THAN 0.5Ω
300k
0.1µF
ON/OFF
100k
0.1µF
200pF
10k 1
3
4
56
7
8
LT1431
5V/3A
470µF*
FAULT
+
+
1155 TA11
1/2
LTC1155
GND G1
DS1
VS
IN1
9V TO 18V
0.01Ω
IRFZ44
RISE AND FALL TIMES ARE βETA TIMES FASTER
30k
µP OR
CMOS/TTL
LOGIC 2N2222
VGATE = 2VS – 0.6V
1N41480.01µF
0.1µF
LOAD
5V
18V
2N3906
LTC1155
14
Rev. C
For more information www.analog.com
TYPICAL APPLICATIONS
High Efficiency 60Hz Full-Wave Synchronous Rectifier
Logic Controlled Boost Mode Switching Regulator with Short-Circuit Protection and 8µA Standby Current
1155 TA12
1/2
LTC1155
GND G1
DS1
VS
IN1
4.75V TO 5.25V
0.02Ω
100µF
MTM25N05L
*COILTRONICS CTX-7-52
0.33µF
FROM µP, ETC.
100k
2200µF
5
4
2
3
1LT1170
FAULT
1µF
1k
50µH*
10.7k
1%
1.24k
1%
68µF
1N5820
5V SWITCHED
12V/1A
1N4148
+
++
1155 TA13
LTC1155
GND
IN2 G2
DS2VS
DS1
G1
IN1
IRFZ44*
18V
1N4746A 1N4148
** 9V/3A
DC
IRFZ44*
18V
1N4746A
1N4148
**
1N4148
1N4148
7
6
4
3
2
100k
10µF
10k
0.03Ω
1N4001
10k
10Ω
12.6VCT
110V AC
100k
4700µF
16V
DS
D
S
MOSFETs ARE SYNCHRONOUSLY ENHANCED WHEN RECTIFIER CURRENT EXCEEDS 300mA
*NO HEATSINK REQUIRED. CASES (DRAINS) CAN BE TIED TOGETHER
**INTERNAL BODY DIODE OF MOSFET
–
+
LT1006
+
+
LTC1155
15
Rev. C
For more information www.analog.com
TYPICAL APPLICATIONS
Push-Pull Driver with Shoot-Through Current Lockout (fO < 100Hz)
High Efficiency 60Hz Full-Wave Synchronous Rectifier
1155 TA14
LTC1155
GND
IN2 G2
DS1VS
DS2
G1
IN1
9V/3A
DC
4 × IRFZ44*
18V
1N4746A
**
–
+
1N4148
1N4148
7
6
4
3
2
100k
10Ω
10k
100k
6.3V AC110V AC
4700µF
16V
D
S
MOSFETs ARE SYNCHRONOUSLY ENHANCED WHEN RECTIFIER CURRENT EXCEEDS 300mA
*NO HEATSINK REQUIRED
**INTERNAL BODY DIODE OF MOSFET
LT1006
10k
18V
1N4746A
D
S
D
S
** **
0.03Ω
+
D
S**
1155 TA15
*OPPOSING GATE MUST DROP BELOW 2V BEFORE THE OTHER IS CHARGED
0.1µF
300k
0.01Ω
LTC1155
GND
IN2 G2
DS2VS
DS1
G1
IN1
4.5V TO 6V
1N4148
100k
5V
HI/LO
74HC02
10µF
IRLZ24
*
VOUT
1N4148
100k
IRFZ24
*
LTC1155
16
Rev. C
For more information www.analog.com
TYPICAL APPLICATIONS
DC Motor Speed and Torque Control for Cordless Tools and Appliances
Full H-Bridge Driver with Shoot-Through Current Lockout and Stall Current Shutdown (fO < 100Hz)
1155 TA16
*OPPOSING GATES ARE HELD OFF UNTIL OTHER GATES DROP BELOW 1.5V
0.1µF
100k
0.01Ω
LTC1155
GND
IN2 G2
DS2VS
DS1
G1
IN1
4.5V TO 6V
5V
74HC02
10µF
IRLZ44
*
*
DIRECTION
VN2222L
IRFZ44
M
IRLZ44
IRFZ44
VN2222L
DISABLE
1155 TA17
SPEED IS PROPORTIONAL TO PULSE WIDTH. TORQUE IS PROPORTIONAL TO CURRENT
0.1µF
300k 10k
TORQUE
ADJUST
LTC1155
GND
IN2 G2
DS2VS
DS1
G1
IN1
1.1k
0.1Ω
IRFZ24
SMALL DC APPLIANCE
OR TOOL MOTOR
1A TO
10A
MAX
1M
–
+
1/2
LT1017
100k
120k
10k
SPEED
ADJUST
–
+
1/2
LT1017
1M
1M
0.0033µF
1M
100Ω
47µF
16V
+
6V
100k
M
+
LTC1155
17
Rev. C
For more information www.analog.com
PACKAGE DESCRIPTION
J8 0801
.014 – .026
(0.360 – 0.660)
.200
(5.080)
MAX
.015 – .060
(0.381 – 1.524)
.125
3.175
MIN
.100
(2.54)
BSC
.300 BSC
(7.62 BSC)
.008 – .018
(0.203 – 0.457) 0° – 15°
.005
(0.127)
MIN
.405
(10.287)
MAX
.220 – .310
(5.588 – 7.874)
1 2 34
8 7 6 5
.025
(0.635)
RAD TYP
.045 – .068
(1.143 – 1.650)
FULL LEAD
OPTION
.023 – .045
(0.584 – 1.143)
HALF LEAD
OPTION
CORNER LEADS OPTION
(4 PLCS)
.045 – .065
(1.143 – 1.651)
NOTE: LEAD DIMENSIONS APPLY TO SOLDER DIP/PLATE
OR TIN PLATE LEADS
J8 Package
8-Lead CERDIP (Narrow .300 Inch, Hermetic)
(Reference LTC DWG # 05-08-1110)
OBSOLETE PACKAGE
LTC1155
18
Rev. C
For more information www.analog.com
N8 REV I 0711
.065
(1.651)
TYP
.045 – .065
(1.143 – 1.651)
.130 ±.005
(3.302 ±0.127)
.020
(0.508)
MIN
.018 ±.003
(0.457 ±0.076)
.120
(3.048)
MIN
.008 – .015
(0.203 – 0.381)
.300 – .325
(7.620 – 8.255)
.325 +.035
–.015
+0.889
–0.381
8.255
( )
1 2 34
87 65
.255 ±.015*
(6.477 ±0.381)
.400*
(10.160)
MAX
NOTE:
1. DIMENSIONS ARE INCHES
MILLIMETERS
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .010 INCH (0.254mm)
.100
(2.54)
BSC
N Package
8-Lead PDIP (Narrow .300 Inch)
(Reference LTC DWG # 05-08-1510 Rev I)
SO8 REV G 0212
.053 – .069
(1.346 – 1.752)
.014 – .019
(0.355 – 0.483)
TYP
.004 – .010
(0.101 – 0.254)
.050
(1.270)
BSC
1234
.150 – .157
(3.810 – 3.988)
NOTE 3
8765
.189 – .197
(4.801 – 5.004)
NOTE 3
.228 – .244
(5.791 – 6.197)
.245
MIN .160 ±.005
RECOMMENDED SOLDER PAD LAYOUT
.045 ±.005
.050 BSC
.030 ±.005
TYP
.016 – .050
(0.406 – 1.270)
.010 – .020
(0.254 – 0.508)× 45°
0°– 8° TYP
.008 – .010
(0.203 – 0.254)
INCHES
(MILLIMETERS)
NOTE:
1. DIMENSIONS IN
2. DRAWING NOT TO SCALE
3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)
4. PIN 1 CAN BE BEVEL EDGE OR A DIMPLE
S8 Package
8-Lead Plastic Small Outline (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1610 Rev G)
PACKAGE DESCRIPTION
LTC1155
19
Rev. C
For more information www.analog.com
REVISION HISTORY
REV DATE DESCRIPTION PAGE NUMBER
C 05/19 Obsoleted CERDIP J8 package 2, 17
(Revision history begins at Rev C)
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog
Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications
subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
LTC1155
20
Rev. C
For more information www.analog.com
ANALOG DEVICES, INC. 1991
05/19
www.analog.com
RELATED PARTS
TYPICAL APPLICATIONS
Isolated High Voltage High Side Switch with Circuit Breaker
Isolated Solid-State AC Relay with Circuit Breaker
1155 TA18
LTC1155
GND
IN2 G2
DS2VS
DS1
G1
IN1
0.1Ω
1k
6A MAX
1k
90V
18V
1N4746A
4N28
1M
1k
C
B E
10mA
CONTROL
0.1µF
200V
100pF
1/6 74C14
6V TO 12V
100k
10µF
25V
1N4148
1N5817
1N4148
MUR420 M
1N5817
+
2N2222
1155 TA19
LTC1155
GND
IN2 G2
DS2VS
DS1
G1
IN1
0.05Ω
IRFZ24
18V
1N4746A
100k
0.0022µF
1/6 74C14
5V
100k
1N4148
1N5817
18V
1N4746A
0.01µF 100k
5.6V
1N4690A
IN/OUT
IN/OUT
24V AC
2A MAX
IRFZ24
100k
ON/OFF
1/6 74C14
300Ω 600Ω
0.1µF
1µF
*PICO ELECTRONICS F-28115 OR EQUIVALENT
T1*
IN/OUT
ON/OFF
IN/OUT
2A
EQUIVALENT FUNCTION
+
PART NUMBER DESCRIPTION COMMENTS
LTC1153 Auto-Reset Electronic Circuit Breaker Programmable Trip Current, Fault Status Output
LT1161 Quad Protected High Side MOSFET Driver 8V to 48V Supply Range, Individual Short-Circuit Protection
LTC1163 Triple 1.8V to 6V High Side MOSFET Driver 0.01µA Standby Current, Triple Driver in SO-8 Package
LTC1255 Dual 24V High Side MOSFET Driver Operates from 9V to 24V, Short-Circuit Protection
LTC1477 Protected Monolithic High Side Switch Low RDS(ON) 0.07Ω Switch, 2A Short-Circuit Protected
LTC1623 SMBus Dual High Side Switch Controller 2-Wire SMBus Serial Interface, Built-In Gate Charge Pumps
LTC1710 SMBus Dual Monolithic High Side Switch Tw o Low RDS(ON) 0.4Ω/300mA Switches in 8-Lead MSOP Package
LT1910 Protected High Side MOSFET Driver 8V to 48V Supply Range, Fault Status Output
