INTEGRATED CIRCUITS DATA SHEET PCF8591 8-bit A/D and D/A converter Product specification Supersedes data of 2001 Dec 13 2003 Jan 27 Philips Semiconductors Product specification 8-bit A/D and D/A converter PCF8591 CONTENTS 1 FEATURES 2 APPLICATIONS 3 GENERAL DESCRIPTION 4 ORDERING INFORMATION 5 BLOCK DIAGRAM 6 PINNING 7 FUNCTIONAL DESCRIPTION 7.1 7.2 7.3 7.4 7.5 7.6 Addressing Control byte D/A conversion A/D conversion Reference voltage Oscillator 8 CHARACTERISTICS OF THE I2C-BUS 8.1 8.2 8.3 8.4 8.5 Bit transfer Start and stop conditions System configuration Acknowledge I2C-bus protocol 9 LIMITING VALUES 10 HANDLING 11 DC CHARACTERISTICS 12 D/A CHARACTERISTICS 13 A/D CHARACTERISTICS 14 AC CHARACTERISTICS 15 APPLICATION INFORMATION 16 PACKAGE OUTLINES 17 SOLDERING 17.1 Introduction to soldering through-hole mount packages Soldering by dipping or by solder wave Manual soldering Suitability of through-hole mount IC packages for dipping and wave soldering methods 17.2 17.3 17.4 18 DATA SHEET STATUS 19 DEFINITIONS 20 DISCLAIMERS 21 PURCHASE OF PHILIPS I2C COMPONENTS 2003 Jan 27 2 Philips Semiconductors Product specification 8-bit A/D and D/A converter 1 PCF8591 FEATURES * Single power supply * Operating supply voltage 2.5 V to 6 V * Low standby current * Serial input/output via I2C-bus * Address by 3 hardware address pins * Sampling rate given by I2C-bus speed 3 * 4 analog inputs programmable as single-ended or differential inputs The PCF8591 is a single-chip, single-supply low power 8-bit CMOS data acquisition device with four analog inputs, one analog output and a serial I2C-bus interface. Three address pins A0, A1 and A2 are used for programming the hardware address, allowing the use of up to eight devices connected to the I2C-bus without additional hardware. Address, control and data to and from the device are transferred serially via the two-line bidirectional I2C-bus. * Auto-incremented channel selection * Analog voltage range from VSS to VDD * On-chip track and hold circuit * 8-bit successive approximation A/D conversion * Multiplying DAC with one analog output. 2 GENERAL DESCRIPTION The functions of the device include analog input multiplexing, on-chip track and hold function, 8-bit analog-to-digital conversion and an 8-bit digital-to-analog conversion. The maximum conversion rate is given by the maximum speed of the I2C-bus. APPLICATIONS * Closed loop control systems * Low power converter for remote data acquisition * Battery operated equipment * Acquisition of analog values in automotive, audio and TV applications. 4 ORDERING INFORMATION TYPE NUMBER PACKAGE NAME DESCRIPTION VERSION PCF8591P DIP16 plastic dual in-line package; 16 leads (300 mil) SOT38-4 PCF8591T SO16 plastic small outline package; 16 leads; body width 7.5 mm SOT162-1 2003 Jan 27 3 Philips Semiconductors Product specification 8-bit A/D and D/A converter 5 PCF8591 BLOCK DIAGRAM handbook, full pagewidth SCL SDA A0 A1 A2 I2C BUS INTERFACE STATUS REGISTER PCF8591 DAC DATA REGISTER ADC DATA REGISTER EXT VDD VSS POWER ON RESET AIN0 AIN1 AIN2 AIN3 CONTROL LOGIC OSCILLATOR OSC ANALOGUE MULTIPLEXER SAMPLE AND HOLD SUCCESSIVE APPROXIMATION REGISTER/LOGIC COMPARATOR SAMPLE AND HOLD AOUT VREF DAC AGND MBL821 Fig.1 Block diagram. 6 PINNING SYMBOL PIN DESCRIPTION AINO 1 AIN1 2 analog inputs (A/D converter) AIN2 3 AIN0 1 16 VDD AIN3 4 AIN1 2 15 AOUT A0 5 AIN2 3 14 VREF A1 6 A2 7 VSS 8 negative supply voltage SDA 9 SCL handbook, halfpage hardware address AIN3 4 13 AGND PCF8591P A0 5 12 EXT I2C-bus data input/output A1 6 11 OSC 10 I2C-bus clock input A2 7 10 SCL OSC 11 oscillator input/output EXT 12 external/internal switch for oscillator input AGND 13 analog ground VREF 14 voltage reference input AOUT 15 analog output (D/A converter) VDD 16 positive supply voltage 2003 Jan 27 VSS 8 9 SDA MBL822 Fig.2 Pinning diagram (DIP16). 4 Philips Semiconductors Product specification 8-bit A/D and D/A converter PCF8591 handbook, halfpage msb 1 lsb 0 0 fixed part 1 A2 A1 A0 programmable part handbook, halfpage AIN0 1 16 VDD AIN1 2 15 AOUT AIN2 3 14 VREF AIN3 4 R/W MBL824 Fig.4 Address byte. 13 AGND PCF8591T A0 5 12 EXT A1 6 11 OSC A2 7 10 SCL VSS 8 9 SDA 7.2 The second byte sent to a PCF8591 device will be stored in its control register and is required to control the device function. The upper nibble of the control register is used for enabling the analog output, and for programming the analog inputs as single-ended or differential inputs. The lower nibble selects one of the analog input channels defined by the upper nibble (see Fig.5). If the auto-increment flag is set, the channel number is incremented automatically after each A/D conversion. MBL823 If the auto-increment mode is desired in applications where the internal oscillator is used, the analog output enable flag in the control byte (bit 6) should be set. This allows the internal oscillator to run continuously, thereby preventing conversion errors resulting from oscillator start-up delay. The analog output enable flag may be reset at other times to reduce quiescent power consumption. Fig.3 Pinning diagram (SO16). 7 7.1 FUNCTIONAL DESCRIPTION Addressing The selection of a non-existing input channel results in the highest available channel number being allocated. Therefore, if the auto-increment flag is set, the next selected channel will be always channel 0. The most significant bits of both nibbles are reserved for future functions and have to be set to logic 0. After a Power-on reset condition all bits of the control register are reset to logic 0. The D/A converter and the oscillator are disabled for power saving. The analog output is switched to a high-impedance state. Each PCF8591 device in an I2C-bus system is activated by sending a valid address to the device. The address consists of a fixed part and a programmable part. The programmable part must be set according to the address pins A0, A1 and A2. The address always has to be sent as the first byte after the start condition in the I2C-bus protocol. The last bit of the address byte is the read/write-bit which sets the direction of the following data transfer (see Figs 4, 16 and 17). 2003 Jan 27 Control byte 5 Philips Semiconductors Product specification 8-bit A/D and D/A converter handbook, full pagewidth PCF8591 msb 0 lsb X X X 0 X X X CONTROL BYTE A/D CHANNEL NUMBER: 00 channel 0 01 channel 1 10 channel 2 11 channel 3 AUTO-INCREMENT FLAG: (active if 1) ANALOGUE INPUT PROGRAMMING: 00 Four single-ended inputs AIN0 channel 0 AIN1 channel 1 AIN2 channel 2 AIN3 channel 3 01 Three differential inputs AIN0 channel 0 AIN1 channel 1 AIN2 channel 2 AIN3 10 Single-ended and differential mixed AIN0 channel 0 AIN1 channel 1 AIN2 channel 2 AIN3 11 Two differential inputs AIN0 channel 0 AIN1 AIN2 channel 1 AIN3 ANALOGUE OUTPUT ENABLE FLAG: (analogue output active if 1) Fig.5 Control byte. 2003 Jan 27 6 MBL825 Philips Semiconductors Product specification 8-bit A/D and D/A converter 7.3 PCF8591 D/A conversion control register. In the active state the output voltage is held until a further data byte is sent. The third byte sent to a PCF8591 device is stored in the DAC data register and is converted to the corresponding analog voltage using the on-chip D/A converter. This D/A converter consists of a resistor divider chain connected to the external reference voltage with 256 taps and selection switches. The tap-decoder switches one of these taps to the DAC output line (see Fig.6). The on-chip D/A converter is also used for successive approximation A/D conversion. In order to release the DAC for an A/D conversion cycle the unity gain amplifier is equipped with a track and hold circuit. This circuit holds the output voltage while executing the A/D conversion. The output voltage supplied to the analog output AOUT is given by the formula shown in Fig.7. The waveforms of a D/A conversion sequence are shown in Fig.8. The analog output voltage is buffered by an auto-zeroed unity gain amplifier. This buffer amplifier may be switched on or off by setting the analog output enable flag of the handbook, full pagewidth VREF DAC out R256 FF R255 D7 R3 D6 02 R2 TAP DECODER D0 01 R1 AGND 00 MBL826 Fig.6 DAC resistor divider chain. 2003 Jan 27 7 Philips Semiconductors Product specification 8-bit A/D and D/A converter handbook, full pagewidth PCF8591 msb MBL827 lsb D7 D6 D5 D4 D3 D2 VAOUT = VAGND + VAOUT D1 D0 DAC data register VREF - VAGND 7 Di x 2i 256 i=0 VDD VREF VAGND VSS 01 00 02 03 04 HEX code FE FF Fig.7 DAC data and DC conversion characteristics. MBL828 handbook, full pagewidth PROTOCOL S ADDRESS 0 A CONTROL BYTE A DATA BYTE 1 A DATA BYTE 2 A SCL 1 2 8 9 1 9 1 9 1 SDA VAOUT high impedance state or previous value held in DAC register previous value held in DAC register value of data byte 1 time Fig.8 D/A conversion sequence. 2003 Jan 27 8 Philips Semiconductors Product specification 8-bit A/D and D/A converter 7.4 PCF8591 A/D conversion converted to the corresponding 8-bit binary code. Samples picked up from differential inputs are converted to an 8-bit twos complement code (see Figs 10 and 11). The A/D converter makes use of the successive approximation conversion technique. The on-chip D/A converter and a high-gain comparator are used temporarily during an A/D conversion cycle. The conversion result is stored in the ADC data register and awaits transmission. If the auto-increment flag is set the next channel is selected. An A/D conversion cycle is always started after sending a valid read mode address to a PCF8591 device. The A/D conversion cycle is triggered at the trailing edge of the acknowledge clock pulse and is executed while transmitting the result of the previous conversion (see Fig.9). The first byte transmitted in a read cycle contains the conversion result code of the previous read cycle. After a Power-on reset condition the first byte read is a hexadecimal 80. The protocol of an I2C-bus read cycle is shown in Chapter 8, Figs 16 and 17. Once a conversion cycle is triggered an input voltage sample of the selected channel is stored on the chip and is The maximum A/D conversion rate is given by the actual speed of the I2C-bus. handbook, full pagewidth PROTOCOL S ADDRESS 1 A DATA BYTE 0 A DATA BYTE 1 A DATA BYTE 2 A SCL 1 2 8 9 1 9 1 9 1 SDA sampling byte 1 sampling byte 2 conversion of byte 1 conversion of byte 2 conversion of byte 3 transmission of previously converted byte transmission of byte 1 transmission of byte 2 Fig.9 A/D conversion sequence. 2003 Jan 27 sampling byte 3 9 MBL829 Philips Semiconductors Product specification 8-bit A/D and D/A converter handbook, full pagewidth PCF8591 HEX code MBL830 FF FE Vlsb = VREF - VAGND 256 04 03 02 01 00 0 1 2 3 4 254 255 VAIN - VAGND Vlsb Fig.10 A/D conversion characteristics of single-ended inputs. HEX CODE handbook, full pagewidth MBL831 7F 7E 02 01 00 -128 -127 -2 -1 0 1 2 126 127 VAIN + - VAIN - FF Vlsb FE Vlsb = VREF - VAGND 256 81 80 Fig.11 A/D conversion characteristics of differential inputs. 2003 Jan 27 10 Philips Semiconductors Product specification 8-bit A/D and D/A converter 7.5 PCF8591 7.6 Reference voltage Oscillator For the D/A and A/D conversion either a stable external voltage reference or the supply voltage has to be applied to the resistor divider chain (pins VREF and AGND). The AGND pin has to be connected to the system analog ground and may have a DC off-set with reference to VSS. An on-chip oscillator generates the clock signal required for the A/D conversion cycle and for refreshing the auto-zeroed buffer amplifier. When using this oscillator the EXT pin has to be connected to VSS. At the OSC pin the oscillator frequency is available. A low frequency may be applied to the VREF and AGND pins. This allows the use of the D/A converter as a one-quadrant multiplier; see Chapter 15 and Fig.7. If the EXT pin is connected to VDD the oscillator output OSC is switched to a high-impedance state allowing the user to feed an external clock signal to OSC. The A/D converter may also be used as a one or two quadrant analog divider. The analog input voltage is divided by the reference voltage. The result is converted to a binary code. In this application the user has to keep the reference voltage stable during the conversion cycle. 2003 Jan 27 11 Philips Semiconductors Product specification 8-bit A/D and D/A converter 8 PCF8591 CHARACTERISTICS OF THE I2C-BUS The I2C-bus is for bidirectional, two-line communication between different ICs or modules. The two lines are a serial data line (SDA) and a serial clock line (SCL). Both lines must be connected to a positive supply via a pull-up resistor. Data transfer may be initiated only when the bus is not busy. 8.1 Bit transfer One data bit is transferred during each clock pulse. The data on the SDA line must remain stable during the HIGH period of the clock pulse as changes in the data line at this time will be interpreted as a control signal. handbook, full pagewidth SDA SCL data line stable; data valid change of data allowed MBC621 Fig.12 Bit transfer. 8.2 Start and stop conditions Both data and clock lines remain HIGH when the bus is not busy. A HIGH-to-LOW transition of the data line, while the clock is HIGH, is defined as the start condition (S). A LOW-to-HIGH transition of the data line while the clock is HIGH, is defined as the stop condition (P). handbook, full pagewidth SDA SDA SCL SCL S P START condition STOP condition Fig.13 Definition of START and STOP condition. 2003 Jan 27 12 MBC622 Philips Semiconductors Product specification 8-bit A/D and D/A converter 8.3 PCF8591 System configuration A device generating a message is a `transmitter', a device receiving a message is the `receiver'. The device that controls the message is the `master' and the devices which are controlled by the master are the `slaves'. SDA SCL MASTER TRANSMITTER / RECEIVER SLAVE TRANSMITTER / RECEIVER SLAVE RECEIVER MASTER TRANSMITTER MASTER TRANSMITTER / RECEIVER MBA605 Fig.14 System configuration. 8.4 Acknowledge The number of data bytes transferred between the start and stop conditions from transmitter to receiver is not limited. Each data byte of eight bits is followed by one acknowledge bit. The acknowledge bit is a HIGH level put on the bus by the transmitter whereas the master also generates an extra acknowledge related clock pulse. A slave receiver which is addressed must generate an acknowledge after the reception of each byte. Also a master must generate an acknowledge after the reception of each byte that has been clocked out of the slave transmitter. The device that acknowledges has to pull down the SDA line during the acknowledge clock pulse, so that the SDA line is stable LOW during the HIGH period of the acknowledge related clock pulse. A master receiver must signal an end of data to the transmitter by not generating an acknowledge on the last byte that has been clocked out of the slave. In this event the transmitter must leave the data line HIGH to enable the master to generate a stop condition. handbook, full pagewidth DATA OUTPUT BY TRANSMITTER not acknowledge DATA OUTPUT BY RECEIVER acknowledge SCL FROM MASTER 1 2 8 9 S clock pulse for acknowledgement START condition MBC602 Fig.15 Acknowledgement on the I2C-bus. 2003 Jan 27 13 Philips Semiconductors Product specification 8-bit A/D and D/A converter 8.5 PCF8591 I2C-bus protocol After a start condition a valid hardware address has to be sent to a PCF8591 device. The read/write bit defines the direction of the following single or multiple byte data transfer. For the format and the timing of the start condition (S), the stop condition (P) and the acknowledge bit (A) refer to the I2C-bus characteristics. In the write mode a data transfer is terminated by sending either a stop condition or the start condition of the next data transfer. acknowledge from PCF8591 handbook, full pagewidth S ADDRESS 0 A acknowledge from PCF8591 CONTROL BYTE A acknowledge from PCF8591 DATA BYTE A P/S N = 0 to M data bytes MBL833 Fig.16 Bus protocol for write mode, D/A conversion. acknowledge from PCF8591 handbook, full pagewidth S ADDRESS 1 A acknowledge from master DATA BYTE A no acknowledge LAST DATA BYTE 1 P N = 0 to M data bytes MBL834 Fig.17 Bus protocol for read mode, A/D conversion. 2003 Jan 27 14 Philips Semiconductors Product specification 8-bit A/D and D/A converter PCF8591 9 LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134). SYMBOL PARAMETER MIN. MAX. UNIT VDD supply voltage (pin 16) -0.5 +8.0 V VI input voltage (any input) -0.5 VDD + 0.5 V II DC input current - 10 mA IO DC output current - 20 mA IDD, ISS VDD or VSS current - 50 mA Ptot total power dissipation per package - 300 mW PO power dissipation per output - 100 mW Tamb operating ambient temperature -40 +85 C Tstg storage temperature -65 +150 C 10 HANDLING Inputs and outputs are protected against electrostatic discharge in normal handling. However it is good practice to take normal precautions appropriate to handling MOS devices (see "Handling MOS devices" ). 2003 Jan 27 15 Philips Semiconductors Product specification 8-bit A/D and D/A converter PCF8591 11 DC CHARACTERISTICS VDD = 2.5 V to 6 V; VSS = 0 V; Tamb = -40 C to +85 C unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Supply VDD supply voltage (operating) IDD supply current VPOR 2.5 - 6.0 V standby VI = VSS or VDD; no load - 1 15 A operating, AOUT off fSCL = 100 kHz - 125 250 A operating, AOUT active fSCL = 100 kHz - 0.45 1.0 mA note 1 0.8 - 2.0 V Power-on reset level Digital inputs/output: SCL, SDA, A0, A1, A2 VIL LOW level input voltage 0 - 0.3 x VDD V VIH HIGH level input voltage 0.7 x VDD - VDD V IL leakage current A0, A1, A2 VI = VSS to VDD -250 - +250 nA SCL, SDA VI = VSS to VDD -1 - +1 A Ci input capacitance - - 5 pF IOL LOW level SDA output current VOL = 0.4 V 3.0 - - mA VSS + 1.6 - VDD V Reference voltage inputs VREF reference voltage VREF > VAGND; note 2 VAGND analog ground voltage VREF > VAGND; note 2 ILI input leakage current RREF input resistance pins VREF and AGND VSS - VDD - 0.8 V -250 - +250 nA - 100 - k Oscillator: OSC, EXT ILI input leakage current - - 250 nA fOSC oscillator frequency 0.75 - 1.25 MHz Notes 1. The power on reset circuit resets the I2C-bus logic when VDD is less than VPOR. 2. A further extension of the range is possible, if the following conditions are fulfilled: V REF + V AGND V REF + V AGND -------------------------------------- 0.8V, V DD - -------------------------------------- 0.4V 2 2 2003 Jan 27 16 Philips Semiconductors Product specification 8-bit A/D and D/A converter PCF8591 12 D/A CHARACTERISTICS VDD = 5.0 V; VSS = 0 V; VREF = 5.0 V; VAGND = 0 V; RL = 10 k; CL = 100 pF; Tamb = -40 C to +85 C unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Analog output VOA output voltage ILO output leakage current no resistive load VSS - RL = 10 k VSS AOUT disabled - Tamb = 25 C VDD V - 0.9 x VDD V - 250 nA - - 50 mV - - 1.5 LSB - - 1 % Accuracy OSe offset error Le linearity error Ge gain error tDAC settling time fDAC conversion rate SNRR supply noise rejection ratio no resistive load to 1 LSB 2 full scale step f = 100 Hz; VDDN = 0.1 x VPP - - 90 s - - 11.1 kHz - 40 - dB 13 A/D CHARACTERISTICS VDD = 5.0 V; VSS = 0 V; VREF = 5.0 V; VAGND = 0 V; RS = 10 k; Tamb = -40 C to +85 C unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Analog inputs VIA analog input voltage VSS - VDD V ILIA analog input leakage current - - 100 nA CIA analog input capacitance - 10 - pF CID differential input capacitance - 10 - pF VIS single-ended voltage measuring range VAGND - VREF V VID differential voltage measuring range; VFS = VREF - VAGND - V FS ------------2 - +V FS -------------2 V OSe offset error Tamb = 25 C - - 20 mV Le linearity error - - 1.5 LSB Ge gain error - - 1 % GSe small-signal gain error - - 5 % CMRR common-mode rejection ratio - 60 - dB SNRR supply noise rejection ratio - 40 - dB tADC conversion time - - 90 s fADC sampling/conversion rate - - 11.1 kHz Accuracy 2003 Jan 27 Vi = 16 LSB f = 100 Hz; VDDN = 0.1 x VPP 17 Philips Semiconductors Product specification 8-bit A/D and D/A converter PCF8591 MBL835 200 MBL836 160 handbook, halfpage handbook, halfpage IDD (A) IDD (A) -40 c 120 150 +27 c 100 80 50 40 +85 c 0 0 2 3 4 5 VDD (V) 2 6 a. Internal oscillator; Tamb = +27 C. 3 4 5 VDD (V) 6 b. External oscillator. Fig.18 Operating supply current as a function of supply voltage (analog output disabled). MBL837 500 handbook, halfpage D/A output impedance () D/A output impedance () 400 400 300 300 200 200 100 100 0 00 MBL838 500 handbook, halfpage 02 04 06 08 0 BO 0A CO DO hex input code FO hex input code a. Output impedance near negative power rail; Tamb = +27 C. b. Output impedance near positive power rail; Tamb = +27 C. The x-axis represents the hex input-code equivalent of the output voltage. Fig.19 Output impedance of analog output buffer (near power rails). 2003 Jan 27 EO 18 FF Philips Semiconductors Product specification 8-bit A/D and D/A converter PCF8591 14 AC CHARACTERISTICS All timing values are valid within the operating supply voltage and ambient temperature range and reference to VIL and VIH with an input voltage swing of VSS to VDD. SYMBOL PARAMETER MIN. TYP. MAX. UNIT I2C-bus timing (see Fig.20; note 1) fSCL SCL clock frequency - - 100 kHz tSP tolerable spike width on bus - - 100 ns tBUF bus free time 4.7 - - s tSU;STA START condition set-up time 4.7 - - s tHD;STA START condition hold time 4.0 - - s tLOW SCL LOW time 4.7 - - s tHIGH SCL HIGH time 4.0 - - s tr SCL and SDA rise time - - 1.0 s tf SCL and SDA fall time - - 0.3 s tSU;DAT data set-up time 250 - - ns tHD;DAT data hold time 0 - - ns tVD;DAT SCL LOW-to-data out valid - - 3.4 s tSU;STO STOP condition set-up time 4.0 - - s Note 1. A detailed description of the I2C-bus specification, with applications, is given in brochure "The I2C-bus and how to use it". This brochure may be ordered using the code 9398 393 40011. handbook, full pagewidth t SU;STA BIT 6 (A6) BIT 7 MSB (A7) START CONDITION (S) PROTOCOL t LOW t HIGH BIT 0 LSB (R/W) ACKNOWLEDGE (A) STOP CONDITION (P) 1 / f SCL SCL t tr BUF tf SDA t HD;STA t SU;DAT t HD;DAT t VD;DAT MBD820 Fig.20 I2C-bus timing diagram; rise and fall times refer to VIL and VIH. 2003 Jan 27 19 t SU;STO Philips Semiconductors Product specification 8-bit A/D and D/A converter PCF8591 15 APPLICATION INFORMATION Inputs must be connected to VSS or VDD when not in use. Analog inputs may also be connected to AGND or VREF. In order to prevent excessive ground and supply noise and to minimize cross-talk of the digital to analog signal paths the user has to design the printed-circuit board layout very carefully. Supply lines common to a PCF8591 device and noisy digital circuits and ground loops should be avoided. Decoupling capacitors (>10 F) are recommended for power supply and reference voltage inputs. handbook, full pagewidth VDD VDD VDD V0 VDD AOUT AIN0 VREF AIN1 AGND AIN2 EXT AIN3 OSC A0 PCF8591 SCL A1 SDA A2 VSS VDD + + VOUT VDD V0 V1 VDD VDD AOUT AIN0 VREF AIN1 AGND AIN2 EXT AIN3 OSC A0 PCF8591 SCL A1 SDA A2 VSS VOUT V2 VDD MASTER TRANSMITTER ANALOGUE GROUND I2C bus DIGITAL GROUND MBL839 Fig.21 Application diagram. 2003 Jan 27 20 Philips Semiconductors Product specification 8-bit A/D and D/A converter PCF8591 16 PACKAGE OUTLINES DIP16: plastic dual in-line package; 16 leads (300 mil) SOT38-4 ME seating plane D A2 A A1 L c e Z w M b1 (e 1) b b2 MH 9 16 pin 1 index E 1 8 0 5 10 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 min. A2 max. b b1 b2 c D (1) E (1) e e1 L ME MH w Z (1) max. mm 4.2 0.51 3.2 1.73 1.30 0.53 0.38 1.25 0.85 0.36 0.23 19.50 18.55 6.48 6.20 2.54 7.62 3.60 3.05 8.25 7.80 10.0 8.3 0.254 0.76 inches 0.17 0.020 0.13 0.068 0.051 0.021 0.015 0.049 0.033 0.014 0.009 0.77 0.73 0.26 0.24 0.10 0.30 0.14 0.12 0.32 0.31 0.39 0.33 0.01 0.030 Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION REFERENCES IEC JEDEC EIAJ ISSUE DATE 92-11-17 95-01-14 SOT38-4 2003 Jan 27 EUROPEAN PROJECTION 21 Philips Semiconductors Product specification 8-bit A/D and D/A converter PCF8591 SO16: plastic small outline package; 16 leads; body width 7.5 mm SOT162-1 D E A X c HE y v M A Z 9 16 Q A2 A (A 3) A1 pin 1 index Lp L 1 8 e detail X w M bp 0 5 10 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y mm 2.65 0.30 0.10 2.45 2.25 0.25 0.49 0.36 0.32 0.23 10.5 10.1 7.6 7.4 1.27 10.65 10.00 1.4 1.1 0.4 1.1 1.0 0.25 0.25 0.1 0.9 0.4 inches 0.10 0.012 0.096 0.004 0.089 0.01 0.019 0.013 0.014 0.009 0.41 0.40 0.30 0.29 0.050 0.419 0.043 0.055 0.394 0.016 0.043 0.039 0.01 0.01 0.004 0.035 0.016 Z (1) 8o 0o Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC SOT162-1 075E03 MS-013 2003 Jan 27 EIAJ EUROPEAN PROJECTION ISSUE DATE 97-05-22 99-12-27 22 Philips Semiconductors Product specification 8-bit A/D and D/A converter PCF8591 The total contact time of successive solder waves must not exceed 5 seconds. 17 SOLDERING 17.1 Introduction to soldering through-hole mount packages The device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the specified maximum storage temperature (Tstg(max)). If the printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit. This text gives a brief insight to wave, dip and manual soldering. A more in-depth account of soldering ICs can be found in our "Data Handbook IC26; Integrated Circuit Packages" (document order number 9398 652 90011). Wave soldering is the preferred method for mounting of through-hole mount IC packages on a printed-circuit board. 17.2 17.3 Apply the soldering iron (24 V or less) to the lead(s) of the package, either below the seating plane or not more than 2 mm above it. If the temperature of the soldering iron bit is less than 300 C it may remain in contact for up to 10 seconds. If the bit temperature is between 300 and 400 C, contact may be up to 5 seconds. Soldering by dipping or by solder wave The maximum permissible temperature of the solder is 260 C; solder at this temperature must not be in contact with the joints for more than 5 seconds. 17.4 Manual soldering Suitability of through-hole mount IC packages for dipping and wave soldering methods SOLDERING METHOD PACKAGE DIPPING DBS, DIP, HDIP, SDIP, SIL WAVE suitable(1) suitable Note 1. For SDIP packages, the longitudinal axis must be parallel to the transport direction of the printed-circuit board. 2003 Jan 27 23 Philips Semiconductors Product specification 8-bit A/D and D/A converter PCF8591 18 DATA SHEET STATUS LEVEL DATA SHEET STATUS(1) PRODUCT STATUS(2)(3) Development DEFINITION I Objective data II Preliminary data Qualification This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. III Product data This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Production This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. Notes 1. Please consult the most recently issued data sheet before initiating or completing a design. 2. The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. 3. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status. 19 DEFINITIONS 20 DISCLAIMERS Short-form specification The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Life support applications These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Limiting values definition Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Right to make changes Philips Semiconductors reserves the right to make changes in the products including circuits, standard cells, and/or software described or contained herein in order to improve design and/or performance. When the product is in full production (status `Production'), relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Application information Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. 2003 Jan 27 24 Philips Semiconductors Product specification 8-bit A/D and D/A converter PCF8591 21 PURCHASE OF PHILIPS I2C COMPONENTS Purchase of Philips I2C components conveys a license under the Philips' I2C patent to use the components in the I2C system provided the system conforms to the I2C specification defined by Philips. This specification can be ordered using the code 9398 393 40011. 2003 Jan 27 25 Philips Semiconductors Product specification 8-bit A/D and D/A converter PCF8591 NOTES 2003 Jan 27 26 Philips Semiconductors Product specification 8-bit A/D and D/A converter PCF8591 NOTES 2003 Jan 27 27 Philips Semiconductors - a worldwide company Contact information For additional information please visit http://www.semiconductors.philips.com. Fax: +31 40 27 24825 For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com. SCA75 (c) Koninklijke Philips Electronics N.V. 2003 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands 403512/06/pp28 Date of release: 2003 Jan 27 Document order number: 9397 750 10464