DATA SH EET
Product specification
Supersedes data of 2001 Dec 13 2003 Jan 27
INTEGRATED CIRCUITS
PCF8591
8-bit A/D and D/A converter
2003 Jan 27 2
Philips Semiconductors Product specification
8-bit A/D and D/A converter PCF8591
CONTENTS
1 FEATURES
2 APPLICATIONS
3 GENERAL DESCRIPTION
4 ORDERING INFORMATION
5 BLOCK DIAGRAM
6 PINNING
7 FUNCTIONAL DESCRIPTION
7.1 Addressing
7.2 Control byte
7.3 D/A conversion
7.4 A/D conversion
7.5 Reference voltage
7.6 Oscillator
8 CHARACTERISTICS OF THE I2C-BUS
8.1 Bit transfer
8.2 Start and stop conditions
8.3 System configuration
8.4 Acknowledge
8.5 I2C-bus protocol
9 LIMITING VALUES
10 HANDLING
11 DC CHARACTERISTICS
12 D/A CHARACTERISTICS
13 A/D CHARACTERISTICS
14 AC CHARACTERISTICS
15 APPLICATION INFORMATION
16 PACKAGE OUTLINES
17 SOLDERING
17.1 Introduction to soldering through-hole mount
packages
17.2 Soldering by dipping or by solder wave
17.3 Manual soldering
17.4 Suitability of through-hole mount IC packages
for dipping and wave soldering methods
18 DATA SHEET STATUS
19 DEFINITIONS
20 DISCLAIMERS
21 PURCHASE OF PHILIPS I2C COMPONENTS
2003 Jan 27 3
Philips Semiconductors Product specification
8-bit A/D and D/A converter PCF8591
1 FEATURES
•Single power supply
•Operating supply voltage 2.5 V to 6 V
•Low standby current
•Serial input/output via I2C-bus
•Address by 3 hardware address pins
•Sampling rate given by I2C-bus speed
•4 analog inputs programmable as single-ended or
differential inputs
•Auto-incremented channel selection
•Analog voltage range from VSS to VDD
•On-chip track and hold circuit
•8-bit successive approximation A/D conversion
•Multiplying DAC with one analog output.
2 APPLICATIONS
•Closed loop control systems
•Low power converter for remote data acquisition
•Battery operated equipment
•Acquisition of analog values in automotive, audio and
TV applications.
3 GENERAL DESCRIPTION
The PCF8591 is a single-chip, single-supply low power
8-bit CMOS data acquisition device with four analog
inputs, one analog output and a serial I2C-bus interface.
Three address pins A0, A1 and A2 are used for
programming the hardware address, allowing the use of
up to eight devices connected to the I2C-bus without
additionalhardware.Address,controlanddatatoandfrom
the device are transferred serially via the two-line
bidirectional I2C-bus.
The functions of the device include analog input
multiplexing, on-chip track and hold function, 8-bit
analog-to-digital conversion and an 8-bit digital-to-analog
conversion. The maximum conversion rate is given by the
maximum speed of the I2C-bus.
4 ORDERING INFORMATION
TYPE
NUMBER PACKAGE
NAME DESCRIPTION VERSION
PCF8591P DIP16 plastic dual in-line package; 16 leads (300 mil) SOT38-4
PCF8591T SO16 plastic small outline package; 16 leads; body width 7.5 mm SOT162-1
2003 Jan 27 4
Philips Semiconductors Product specification
8-bit A/D and D/A converter PCF8591
5 BLOCK DIAGRAM
handbook, full pagewidth
MBL821
I2C BUS
INTERFACE
ANALOGUE
MULTIPLEXER
POWER ON
RESET
OSCILLATOR
SAMPLE
AND
HOLD
SAMPLE
AND
HOLD
CONTROL
LOGIC
DAC DATA
REGISTER
SUCCESSIVE
APPROXIMATION
REGISTER/LOGIC
DAC
STATUS
REGISTER
PCF8591 ADC DATA
REGISTER
SCL
SDA
A0
A1
A2
EXT
AIN0
AIN1
AIN2
AIN3
AOUT VREF
AGND
OSC
VSS
VDD
COMPARATOR
Fig.1 Block diagram.
6 PINNING
SYMBOL PIN DESCRIPTION
AINO 1 analog inputs (A/D converter)
AIN1 2
AIN2 3
AIN3 4
A0 5 hardware address
A1 6
A2 7
VSS 8 negative supply voltage
SDA 9 I2C-bus data input/output
SCL 10 I2C-bus clock input
OSC 11 oscillator input/output
EXT 12 external/internal switch for
oscillator input
AGND 13 analog ground
VREF 14 voltage reference input
AOUT 15 analog output (D/A converter)
VDD 16 positive supply voltage
handbook, halfpage
PCF8591P
MBL822
1
2
3
4
5
6
7
8
AIN0
AIN1
AIN2
AIN3
A0
A1
A2
VSS
VDD
AOUT
VREF
AGND
EXT
OSC
SCL
SDA
16
15
14
13
12
11
10
9
Fig.2 Pinning diagram (DIP16).
2003 Jan 27 5
Philips Semiconductors Product specification
8-bit A/D and D/A converter PCF8591
7 FUNCTIONAL DESCRIPTION
7.1 Addressing
EachPCF8591deviceinanI2C-bussystemisactivatedby
sending a valid address to the device. The address
consists of a fixed part and a programmable part. The
programmable part must be set according to the address
pins A0, A1 and A2. The address always has to be sent as
the first byte after the start condition in the I2C-bus
protocol. The last bit of the address byte is the
read/write-bit which sets the direction of the following data
transfer (see Figs 4, 16 and 17).
7.2 Control byte
The second byte sent to a PCF8591 device will be stored
in its control register and is required to control the device
function.Theuppernibble of thecontrolregisteris used for
enabling the analog output, and for programming the
analog inputs as single-ended or differential inputs. The
lower nibble selects one of the analog input channels
defined by the upper nibble (see Fig.5). If the
auto-increment flag is set, the channel number is
incremented automatically after each A/D conversion.
If the auto-increment mode is desired in applications
where the internal oscillator is used, the analog output
enable flag in the control byte (bit 6) should be set. This
allows the internal oscillator to run continuously, thereby
preventing conversion errors resulting from oscillator
start-updelay. The analogoutput enable flagmay be reset
at other times to reduce quiescent power consumption.
The selection of a non-existing input channel results in the
highest available channel number being allocated.
Therefore, if the auto-increment flag is set, the next
selected channel will be always channel 0. The most
significant bits of both nibbles are reserved for future
functions and have to be set to logic 0. After a Power-on
reset condition all bits of the control register are reset to
logic 0. The D/A converter and the oscillator are disabled
for power saving. The analog output is switched to a
high-impedance state.
handbook, halfpage
MBL823
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
AIN0
AIN1
AIN2
AIN3
A0
A1
A2
VSS
VDD
AOUT
VREF
AGND
EXT
OSC
SCL
SDA
PCF8591T
Fig.3 Pinning diagram (SO16).
handbook, halfpage
MBL824
1
msb lsb
0 0
fixed part programmable part
1 A2 A1 A0 R/W
Fig.4 Address byte.
2003 Jan 27 6
Philips Semiconductors Product specification
8-bit A/D and D/A converter PCF8591
handbook, full pagewidth
MBL825
0 X X X 0 X X X
msb lsb
CONTROL BYTE
A/D CHANNEL NUMBER:
00 channel 0
01 channel 1
10 channel 2
11 channel 3
AUTO-INCREMENT FLAG:
(active if 1)
ANALOGUE INPUT PROGRAMMING:
ANALOGUE OUTPUT ENABLE FLAG:
(analogue output active if 1)
00 Four single-ended inputs
01 Three differential inputs
10 Single-ended and differential mixed
channel 0
channel 1
channel 2
AIN0
AIN0 channel 0
AIN1 channel 1
AIN1
AIN2
AIN3
channel 2
AIN2
AIN3
AIN0 channel 0
AIN1 channel 1
11 Two differential inputs
channel 0
AIN0
AIN1
channel 1
AIN2
AIN3
AIN2 channel 2
AIN3 channel 3
Fig.5 Control byte.
2003 Jan 27 7
Philips Semiconductors Product specification
8-bit A/D and D/A converter PCF8591
7.3 D/A conversion
The third byte sent to a PCF8591 device is stored in the
DAC data register and is converted to the corresponding
analog voltage using the on-chip D/A converter. This D/A
converter consists of a resistor divider chain connected to
the external reference voltage with 256 taps and selection
switches. The tap-decoder switches one of these taps to
the DAC output line (see Fig.6).
The analog output voltage is buffered by an auto-zeroed
unity gain amplifier. This buffer amplifier may be switched
on or off by setting the analog output enable flag of the
control register. In the active state the output voltage is
held until a further data byte is sent.
The on-chip D/A converter is also used for successive
approximation A/D conversion. In order to release the
DAC for an A/D conversion cycle the unity gain amplifier is
equippedwithatrack and holdcircuit.Thiscircuit holds the
output voltage while executing the A/D conversion.
The output voltage supplied to the analog output AOUT is
given by the formula shown in Fig.7. The waveforms of a
D/A conversion sequence are shown in Fig.8.
handbook, full pagewidth
MBL826
TAP
DECODER
FF
02
01
00
R256
DAC out
R255
VREF
AGND
R3
R2
R1
D7
D6
D0
Fig.6 DAC resistor divider chain.
2003 Jan 27 8
Philips Semiconductors Product specification
8-bit A/D and D/A converter PCF8591
handbook, full pagewidth
D7
msb lsb
D6 D5 D4 D3 D2 D1 D0
VAOUT
VDD
VREF
00
VAGND
VSS 01 02 03 04 FE FF
HEX code
DAC data
register
VAOUT = VAGND + Di × 2i
VREF - VAGND
256
MBL827
∑
7
i = 0
Fig.7 DAC data and DC conversion characteristics.
handbook, full pagewidth
MBL828
S 0 A A A AADDRESS DATA BYTE 1 DATA BYTE 2CONTROL BYTE
12 981 91 91
high impedance state or
previous value held in DAC register previous value held in
DAC register value of data byte 1
PROTOCOL
SCL
SDA
VAOUT
time
Fig.8 D/A conversion sequence.
2003 Jan 27 9
Philips Semiconductors Product specification
8-bit A/D and D/A converter PCF8591
7.4 A/D conversion
The A/D converter makes use of the successive
approximation conversion technique. The on-chip D/A
converter and a high-gain comparator are used
temporarily during an A/D conversion cycle.
An A/D conversion cycle is always started after sending a
valid read mode address to a PCF8591 device. The A/D
conversion cycle is triggered at the trailing edge of the
acknowledge clock pulse and is executed while
transmitting the result of the previous conversion (see
Fig.9).
Once a conversion cycle is triggered an input voltage
sample of the selected channel is stored on the chip and is
convertedtothecorresponding8-bitbinarycode. Samples
picked up from differential inputs are converted to an 8-bit
twos complement code (see Figs 10 and 11).
The conversion result is stored in the ADC data register
and awaits transmission. If the auto-increment flag is set
the next channel is selected.
The first byte transmitted in a read cycle contains the
conversion result code of the previous read cycle. After a
Power-on reset condition the first byte read is a
hexadecimal 80. The protocol of an I2C-bus read cycle is
shown in Chapter 8, Figs 16 and 17.
The maximum A/D conversion rate is given by the actual
speed of the I2C-bus.
handbook, full pagewidth
S 1 A A A AADDRESS DATA BYTE 1 DATA BYTE 2DATA BYTE 0
12 981 91 91
PROTOCOL
SCL
SDA
conversion of byte 2 conversion of byte 3conversion of byte 1
transmission
of previously
converted byte
sampling byte 2 sampling byte 3sampling byte 1
transmission
of byte 1 transmission
of byte 2
MBL829
Fig.9 A/D conversion sequence.
2003 Jan 27 10
Philips Semiconductors Product specification
8-bit A/D and D/A converter PCF8591
handbook, full pagewidth
10
00
01
02
03
04
2 3 4 254 255 VAIN − VAGND
Vlsb
FE
FF
HEX
code
VREF − VAGND
256
Vlsb =
MBL830
Fig.10 A/D conversion characteristics of single-ended inputs.
handbook, full pagewidth
102−2
HEX
CODE
−127−128 −1126 127
7F
7E
02
01
FF
FE
81
80
00
VREF − VAGND
256
Vlsb =
VAIN + − VAIN −
Vlsb
MBL831
Fig.11 A/D conversion characteristics of differential inputs.
2003 Jan 27 11
Philips Semiconductors Product specification
8-bit A/D and D/A converter PCF8591
7.5 Reference voltage
For the D/A and A/D conversion either a stable external
voltage reference or the supply voltage has to be applied
to the resistor divider chain (pins VREF and AGND).
The AGND pin has to be connected to the system analog
ground and may have a DC off-set with reference to VSS.
A low frequency may be applied to the VREF and AGND
pins. This allows the use of the D/A converter as a
one-quadrant multiplier; see Chapter 15 and Fig.7.
The A/D converter may also be used as a one or two
quadrant analog divider. The analog input voltage is
dividedby thereference voltage.The resultis converted to
a binary code. In this application the user has to keep the
reference voltage stable during the conversion cycle.
7.6 Oscillator
An on-chip oscillator generates the clock signal required
for the A/D conversion cycle and for refreshing the
auto-zeroedbuffer amplifier.When using this oscillator the
EXT pin has to be connected to VSS. At the OSC pin the
oscillator frequency is available.
If the EXT pin is connected to VDD the oscillator output
OSC is switched to a high-impedance state allowing the
user to feed an external clock signal to OSC.
2003 Jan 27 12
Philips Semiconductors Product specification
8-bit A/D and D/A converter PCF8591
8 CHARACTERISTICS OF THE I2C-BUS
The I2C-bus is for bidirectional, two-line communication between different ICs or modules. The two lines are a serial data
line (SDA) and a serial clock line (SCL). Both lines must be connected to a positive supply via a pull-up resistor. Data
transfer may be initiated only when the bus is not busy.
8.1 Bit transfer
One data bit is transferred during each clock pulse. The data on the SDA line must remain stable during the HIGH period
of the clock pulse as changes in the data line at this time will be interpreted as a control signal.
8.2 Start and stop conditions
Both data and clock lines remain HIGH when the bus is not busy. A HIGH-to-LOW transition of the data line, while the
clock is HIGH, is defined as the start condition (S). A LOW-to-HIGH transition of the data line while the clock is HIGH, is
defined as the stop condition (P).
Fig.12 Bit transfer.
handbook, full pagewidth
MBC621
data line
stable;
data valid
change
of data
allowed
SDA
SCL
Fig.13 Definition of START and STOP condition.
handbook, full pagewidth
MBC622
SDA
SCL P
STOP condition
SDA
SCL
S
START condition
2003 Jan 27 13
Philips Semiconductors Product specification
8-bit A/D and D/A converter PCF8591
8.3 System configuration
A device generating a message is a ‘transmitter’, a device receiving a message is the ‘receiver’. The device that controls
the message is the ‘master’ and the devices which are controlled by the master are the ‘slaves’.
8.4 Acknowledge
The number of data bytes transferred between the start and stop conditions from transmitter to receiver is not limited.
Each data byte of eight bits is followed by one acknowledge bit. The acknowledge bit is a HIGH level put on the bus by
the transmitter whereas the master also generates an extra acknowledge related clock pulse. A slave receiver which is
addressed must generate an acknowledge after the reception of each byte. Also a master must generate an
acknowledge after the reception of each byte that has been clocked out of the slave transmitter. The device that
acknowledges has to pull down the SDA line during the acknowledge clock pulse, so that the SDA line is stable LOW
during the HIGH period of the acknowledge related clock pulse. A master receiver must signal an end of data to the
transmitter by not generating an acknowledge on the last byte that has been clocked out of the slave. In this event the
transmitter must leave the data line HIGH to enable the master to generate a stop condition.
MBA605
MASTER
TRANSMITTER /
RECEIVER SLAVE
RECEIVER SLAVE
TRANSMITTER /
RECEIVER MASTER
TRANSMITTER MASTER
TRANSMITTER /
RECEIVER
SDA
SCL
Fig.14 System configuration.
Fig.15 Acknowledgement on the I2C-bus.
handbook, full pagewidth
MBC602
S
START
condition
9821
clock pulse for
acknowledgement
not acknowledge
acknowledge
DATA OUTPUT
BY TRANSMITTER
DATA OUTPUT
BY RECEIVER
SCL FROM
MASTER
2003 Jan 27 14
Philips Semiconductors Product specification
8-bit A/D and D/A converter PCF8591
8.5 I2C-bus protocol
After a start condition a valid hardware address has to be sent to a PCF8591 device. The read/write bit defines the
direction of the following single or multiple byte data transfer. For the format and the timing of the start condition (S), the
stop condition (P) and the acknowledge bit (A) refer to the I2C-bus characteristics. In the write mode a data transfer is
terminated by sending either a stop condition or the start condition of the next data transfer.
handbook, full pagewidth
0
MBL833
S ADDRESS CONTROL BYTE DATA BYTE
acknowledge
from PCF8591
A
acknowledge
from PCF8591
A A P/S
acknowledge
from PCF8591
N = 0 to M
data bytes
Fig.16 Bus protocol for write mode, D/A conversion.
handbook, full pagewidth
1
MBL834
S ADDRESS DATA BYTE LAST DATA BYTE
acknowledge
from PCF8591
A
acknowledge
from master
A 1 P
no acknowledge
N = 0 to M
data bytes
Fig.17 Bus protocol for read mode, A/D conversion.
2003 Jan 27 15
Philips Semiconductors Product specification
8-bit A/D and D/A converter PCF8591
9 LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 60134).
10 HANDLING
Inputs and outputs are protected against electrostatic discharge in normal handling. However it is good practice to take
normal precautions appropriate to handling MOS devices (see
“Handling MOS devices”
).
SYMBOL PARAMETER MIN. MAX. UNIT
VDD supply voltage (pin 16) −0.5 +8.0 V
VIinput voltage (any input) −0.5 VDD + 0.5 V
IIDC input current −±10 mA
IODC output current −±20 mA
IDD, ISS VDD or VSS current −±50 mA
Ptot total power dissipation per package −300 mW
POpower dissipation per output −100 mW
Tamb operating ambient temperature −40 +85 °C
Tstg storage temperature −65 +150 °C
2003 Jan 27 16
Philips Semiconductors Product specification
8-bit A/D and D/A converter PCF8591
11 DC CHARACTERISTICS
VDD = 2.5 V to 6 V; VSS =0V; T
amb =−40 °Cto+85 °C unless otherwise specified.
Notes
1. The power on reset circuit resets the I2C-bus logic when VDD is less than VPOR.
2. A further extension of the range is possible, if the following conditions are fulfilled:
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Supply
VDD supply voltage (operating) 2.5 −6.0 V
IDD supply current
standby VI=V
SS or VDD; no load −115µA
operating, AOUT off fSCL = 100 kHz −125 250 µA
operating, AOUT active fSCL = 100 kHz −0.45 1.0 mA
VPOR Power-on reset level note 1 0.8 −2.0 V
Digital inputs/output: SCL, SDA, A0, A1, A2
VIL LOW level input voltage 0 −0.3 ×VDD V
VIH HIGH level input voltage 0.7 ×VDD −VDD V
ILleakage current
A0, A1, A2 VI=V
SS to VDD −250 −+250 nA
SCL, SDA VI=V
SS to VDD −1−+1 µA
Ciinput capacitance −−5pF
I
OL LOW level SDA output current VOL = 0.4 V 3.0 −−mA
Reference voltage inputs
VREF reference voltage VREF >V
AGND; note 2 VSS + 1.6 −VDD V
VAGND analog ground voltage VREF >V
AGND; note 2 VSS −VDD −0.8 V
ILI input leakage current −250 −+250 nA
RREF input resistance pins VREF and AGND −100 −kΩ
Oscillator: OSC, EXT
ILI input leakage current −−250 nA
fOSC oscillator frequency 0.75 −1.25 MHz
VREF VAGND
+
2
-------------------------------------- 0.8V≥VDD VREF VAGND
+
2
--------------------------------------
–0.4V≥,
2003 Jan 27 17
Philips Semiconductors Product specification
8-bit A/D and D/A converter PCF8591
12 D/A CHARACTERISTICS
VDD = 5.0 V; VSS =0V;V
REF = 5.0 V; VAGND =0V;R
L=10kΩ;C
L= 100 pF; Tamb =−40 °C to +85 °C unless otherwise
specified.
13 A/D CHARACTERISTICS
VDD = 5.0 V; VSS =0V; V
REF = 5.0 V; VAGND =0V; R
S=10kΩ; Tamb =−40 °C to +85 °C unless otherwise specified.
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Analog output
VOA output voltage no resistive load VSS −VDD V
RL=10kΩV
SS −0.9 ×VDD V
ILO output leakage current AOUT disabled −−250 nA
Accuracy
OSeoffset error Tamb =25°C−−50 mV
Lelinearity error −−±1.5 LSB
Gegain error no resistive load −−1%
t
DAC settling time to 1⁄2LSB full scale step −−90 µs
fDAC conversion rate −−11.1 kHz
SNRR supply noise rejection ratio f = 100 Hz;
VDDN = 0.1 ×VPP
−40 −dB
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Analog inputs
VIA analog input voltage VSS −VDD V
ILIA analog input leakage current −−100 nA
CIA analog input capacitance −10 −pF
CID differential input capacitance −10 −pF
VIS single-ended voltage measuring range VAGND −VREF V
VID differential voltage measuring range;
VFS =V
REF −VAGND
−V
Accuracy
OSeoffset error Tamb =25°C−−20 mV
Lelinearity error −−±1.5 LSB
Gegain error −−1%
GSesmall-signal gain error ∆Vi= 16 LSB −−5%
CMRR common-mode rejection ratio −60 −dB
SNRR supply noise rejection ratio f = 100 Hz;
VDDN = 0.1 ×VPP
−40 −dB
tADC conversion time −−90 µs
fADC sampling/conversion rate −−11.1 kHz
VFS
–2
------------- +VFS
2
--------------
2003 Jan 27 18
Philips Semiconductors Product specification
8-bit A/D and D/A converter PCF8591
handbook, halfpage
234 6
200
150
50
0
100
5
MBL835
VDD (V)
IDD
(µA)
handbook, halfpage
234 6
160
120
40
0
80
5
MBL836
VDD (V)
IDD
(µA) −40 °c
+27 °c
+85 °c
Fig.18 Operating supply current as a function of supply voltage (analog output disabled).
a. Internal oscillator; Tamb =+27° C. b. External oscillator.
handbook, halfpage
500
00 02 04 06 08 0A
0
100
200
300
400
MBL837
hex input code
D/A output
impedance (Ω)
handbook, halfpage
500
BO CO DO EO FO FF
0
100
200
300
400
MBL838
hex input code
D/A output
impedance (Ω)
Fig.19 Output impedance of analog output buffer (near power rails).
a. Output impedance near negative power rail;
Tamb = +27 °C. b. Output impedance near positive power rail;
Tamb = +27 °C.
The x-axis represents the hex input-code equivalent of the output voltage.
2003 Jan 27 19
Philips Semiconductors Product specification
8-bit A/D and D/A converter PCF8591
14 AC CHARACTERISTICS
All timing values are valid within the operating supply voltage and ambient temperature range and reference to VIL and
VIH with an input voltage swing of VSS to VDD.
Note
1. A detailed description of the I2C-bus specification, with applications, is given in brochure
“The I
2
C-bus and how to
use it”
. This brochure may be ordered using the code 9398 393 40011.
SYMBOL PARAMETER MIN. TYP. MAX. UNIT
I2C-bus timing (see Fig.20; note 1)
fSCL SCL clock frequency −−100 kHz
tSP tolerable spike width on bus −−100 ns
tBUF bus free time 4.7 −−µs
t
SU;STA START condition set-up time 4.7 −−µs
t
HD;STA START condition hold time 4.0 −−µs
t
LOW SCL LOW time 4.7 −−µs
t
HIGH SCL HIGH time 4.0 −−µs
t
rSCL and SDA rise time −−1.0 µs
tfSCL and SDA fall time −−0.3 µs
tSU;DAT data set-up time 250 −−ns
tHD;DAT data hold time 0 −−ns
tVD;DAT SCL LOW-to-data out valid −−3.4 µs
tSU;STO STOP condition set-up time 4.0 −−µs
handbook, full pagewidth
PROTOCOL
SCL
SDA
MBD820
BIT 0
LSB
(R/W)
tHD;STA tSU;DAT tHD;DAT tVD;DAT tSU;STO
tf
r
t
tBUF
tSU;STA tLOW tHIGH 1 / fSCL
START
CONDITION
(S)
BIT 7
MSB
(A7)
BIT 6
(A6) ACKNOWLEDGE
(A) STOP
CONDITION
(P)
Fig.20 I2C-bus timing diagram; rise and fall times refer to VIL and VIH.
2003 Jan 27 20
Philips Semiconductors Product specification
8-bit A/D and D/A converter PCF8591
15 APPLICATION INFORMATION
Inputs must be connected to VSS or VDD when not in use. Analog inputs may also be connected to AGND or VREF.
In order to prevent excessive ground and supply noise and to minimize cross-talk of the digital to analog signal paths the
user has to design the printed-circuit board layout very carefully. Supply lines common to a PCF8591 device and noisy
digital circuits and ground loops should be avoided. Decoupling capacitors (>10 µF) are recommended for power supply
and reference voltage inputs.
handbook, full pagewidth
MBL839
I2C bus
AIN0
AIN1
AIN2
AIN3
A0
A1
A2
AOUT
VDD
VSS
VREF
AGND
EXT
OSC
SCL
SDA
VDD
VDD VDD VDD
VOUT
+θ
+θ
V0
AIN0
AIN1
AIN2
AIN3
A0
A1
A2
AOUT
VDD
VSS
VREF
AGND
EXT
OSC
SCL
SDA
VDD
VDD
VOUT
V1V2
V0
VDD
PCF8591
PCF8591
MASTER
TRANSMITTER
ANALOGUE GROUND
DIGITAL GROUND
Fig.21 Application diagram.
2003 Jan 27 21
Philips Semiconductors Product specification
8-bit A/D and D/A converter PCF8591
16 PACKAGE OUTLINES
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC EIAJ
SOT38-4 92-11-17
95-01-14
MH
c
(e )
1
ME
A
L
seating plane
A1
wM
b1
b2
e
D
A2
Z
16
1
9
8
E
pin 1 index
b
0 5 10 mm
scale
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
UNIT A
max. 12 b
1(1) (1) (1)
b2cD E e M Z
H
L
mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
A
min. A
max. bmax.
w
ME
e1
1.73
1.30 0.53
0.38 0.36
0.23 19.50
18.55 6.48
6.20 3.60
3.05 0.2542.54 7.62 8.25
7.80 10.0
8.3 0.764.2 0.51 3.2
inches 0.068
0.051 0.021
0.015 0.014
0.009
1.25
0.85
0.049
0.033 0.77
0.73 0.26
0.24 0.14
0.12 0.010.10 0.30 0.32
0.31 0.39
0.33 0.0300.17 0.020 0.13
DIP16: plastic dual in-line package; 16 leads (300 mil) SOT38-4
2003 Jan 27 22
Philips Semiconductors Product specification
8-bit A/D and D/A converter PCF8591
UNIT A
max. A1A2A3bpcD
(1) E(1) (1)
eH
ELL
pQZ
ywv θ
REFERENCES
OUTLINE
VERSION EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC EIAJ
mm
inches
2.65 0.30
0.10 2.45
2.25 0.49
0.36 0.32
0.23 10.5
10.1 7.6
7.4 1.27 10.65
10.00 1.1
1.0 0.9
0.4 8
0
o
o
0.25 0.1
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
1.1
0.4
SOT162-1
8
16
wM
bp
D
detail X
Z
e
9
1
y
0.25
075E03 MS-013
pin 1 index
0.10 0.012
0.004 0.096
0.089 0.019
0.014 0.013
0.009 0.41
0.40 0.30
0.29 0.050
1.4
0.055
0.419
0.394 0.043
0.039 0.035
0.016
0.01
0.25
0.01 0.004
0.043
0.016
0.01
X
θ
A
A1
A2
HE
Lp
Q
E
c
L
vMA
(A )
3
A
0 5 10 mm
scale
SO16: plastic small outline package; 16 leads; body width 7.5 mm SOT162-1
97-05-22
99-12-27
2003 Jan 27 23
Philips Semiconductors Product specification
8-bit A/D and D/A converter PCF8591
17 SOLDERING
17.1 Introduction to soldering through-hole mount
packages
This text gives a brief insight to wave, dip and manual
soldering.Amore in-depth accountof soldering ICscanbe
found in our
“Data Handbook IC26; Integrated Circuit
Packages”
(document order number 9398 652 90011).
Wave soldering is the preferred method for mounting of
through-hole mount IC packages on a printed-circuit
board.
17.2 Soldering by dipping or by solder wave
The maximum permissible temperature of the solder is
260 °C; solder at this temperature must not be in contact
with the joints for more than 5 seconds.
Thetotalcontacttimeofsuccessive solder waves mustnot
exceed 5 seconds.
The device may be mounted up to the seating plane, but
the temperature of the plastic body must not exceed the
specified maximum storage temperature (Tstg(max)). If the
printed-circuit board has been pre-heated, forced cooling
may be necessary immediately after soldering to keep the
temperature within the permissible limit.
17.3 Manual soldering
Apply the soldering iron (24 V or less) to the lead(s) of the
package, either below the seating plane or not more than
2 mm above it. If the temperature of the soldering iron bit
is less than 300 °C it may remain in contact for up to
10 seconds. If the bit temperature is between
300 and 400 °C, contact may be up to 5 seconds.
17.4 Suitability of through-hole mount IC packages for dipping and wave soldering methods
Note
1. For SDIP packages, the longitudinal axis must be parallel to the transport direction of the printed-circuit board.
PACKAGE SOLDERING METHOD
DIPPING WAVE
DBS, DIP, HDIP, SDIP, SIL suitable suitable(1)
2003 Jan 27 24
Philips Semiconductors Product specification
8-bit A/D and D/A converter PCF8591
18 DATA SHEET STATUS
Notes
1. Please consult the most recently issued data sheet before initiating or completing a design.
2. The product status of the device(s) described in this data sheet may have changed since this data sheet was
published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.
3. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.
LEVEL DATA SHEET
STATUS(1) PRODUCT
STATUS(2)(3) DEFINITION
I Objective data Development This data sheet contains data from the objective specification for product
development. Philips Semiconductors reserves the right to change the
specification in any manner without notice.
II Preliminary data Qualification This data sheet contains data from the preliminary specification.
Supplementary data will be published at a later date. Philips
Semiconductors reserves the right to change the specification without
notice, in order to improve the design and supply the best possible
product.
III Product data Production This data sheet contains data from the product specification. Philips
Semiconductors reserves the right to make changes at any time in order
to improve the design, manufacturing and supply. Relevant changes will
be communicated via a Customer Product/Process Change Notification
(CPCN).
19 DEFINITIONS
Short-form specification The data in a short-form
specification is extracted from a full data sheet with the
same type number and title. For detailed information see
the relevant data sheet or data handbook.
Limiting values definition Limiting values given are in
accordance with the Absolute Maximum Rating System
(IEC 60134). Stress above one or more of the limiting
values may cause permanent damage to the device.
These are stress ratings only and operation of the device
attheseor at anyotherconditions above thosegivenin the
Characteristics sections of the specification is not implied.
Exposure to limiting values for extended periods may
affect device reliability.
Application information Applications that are
described herein for any of these products are for
illustrative purposes only. Philips Semiconductors make
norepresentationorwarrantythatsuchapplicationswillbe
suitable for the specified use without further testing or
modification.
20 DISCLAIMERS
Life support applications These products are not
designed for use in life support appliances, devices, or
systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips
Semiconductorscustomersusingorsellingtheseproducts
for use in such applications do so at their own risk and
agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.
Right to make changes Philips Semiconductors
reserves the right to make changes in the products -
including circuits, standard cells, and/or software -
described or contained herein in order to improve design
and/or performance. When the product is in full production
(status ‘Production’), relevant changes will be
communicated via a Customer Product/Process Change
Notification (CPCN). Philips Semiconductors assumes no
responsibility or liability for the use of any of these
products, conveys no licence or title under any patent,
copyright, or mask work right to these products, and
makes no representations or warranties that these
products are free from patent, copyright, or mask work
right infringement, unless otherwise specified.
2003 Jan 27 25
Philips Semiconductors Product specification
8-bit A/D and D/A converter PCF8591
21 PURCHASE OF PHILIPS I2C COMPONENTS
Purchase of Philips I2C components conveys a license under the Philips’ I2C patent to use the
components in the I2C system provided the system conforms to the I2C specification defined by
Philips. This specification can be ordered using the code 9398 393 40011.
2003 Jan 27 26
Philips Semiconductors Product specification
8-bit A/D and D/A converter PCF8591
NOTES
2003 Jan 27 27
Philips Semiconductors Product specification
8-bit A/D and D/A converter PCF8591
NOTES
© Koninklijke Philips Electronics N.V. 2003 SCA75
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
Philips Semiconductors – a world wide company
Contact information
For additional information please visit http://www.semiconductors.philips.com. Fax: +31 40 27 24825
For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com.
Printed in The Netherlands 403512/06/pp28 Date of release: 2003 Jan 27 Document order number: 9397 750 10464
