SN75ALS174A
QUADRUPLE DIFFERENTIAL LINE DRIVER
SLLS122E – JULY 1991 – REVISED APRIL 1998
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
D
Meets or Exceeds the Requirements of
ANSI EIA/TIA-422-B and RS-485
D
High-Speed Advanced Low-Power Schottky
Circuitry
D
Designed for up to 20-Mbit/s Operation in
Both Serial and Parallel Applications
D
Designed for Multipoint Transmission on
Long Bus Lines in Noisy Environments
D
Low Supply Current Requirements
55 mA Max
D
Wide Positive and Negative Input/Output
Bus Voltage Ranges
D
Driver Output Capacity...±60 mA
D
Thermal-Shutdown Protection
D
Driver Positive- and Negative-Current
Limiting
D
Functionally Interchangeable With SN75174
description
The SN75ALS174A is a quadruple line driver with
3-state differential outputs. It is designed to meet
the requirements of ANSI Standards
EIA/TIA-422-B and RS-485. This device is
optimized for balanced multipoint bus
transmission at rates of up to 20 Mbit/s. Each
driver features wide positive and negative
common-mode output voltage ranges that make
them suitable for party-line applications in noisy
environments.
The SN75ALS174A provides positive- and negative-current limiting and thermal shutdown for protection from
line fault conditions on the transmission bus line. Shutdown occurs at a junction temperature of
approximately 150°C.
The SN75ALS174A is characterized for operation from 0°C to 70°C.
FUNCTION TABLE
(each driver)
INPUT
ENABLES
OUTPUTS
A
ENABLES
Y Z
H H H L
L H L H
X L Z Z
H = high level, L = low level, X = irrelevant,
Z = high impedance (off)
Copyright 1998, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
DW PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
1A
1Y
NC
1Z
1,2EN
2Z
NC
2Y
2A
GND
VCC
4A
4Y
NC
4Z
3,4EN
3Z
NC
3Y
3A
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
1A
1Y
1Z
1,2EN
2Z
2Y
2A
GND
VCC
4A
4Y
4Z
3,4EN
3Z
3Y
3A
N PACKAGE
(TOP VIEW)
NC – No internal connection
SN75ALS174A
QUADRUPLE DIFFERENTIAL LINE DRIVER
SLLS122E – JULY 1991 – REVISED APRIL 1998
2POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
logic symbol†
1Y
2
1Z
3
2Y
6
2Z
5
1
1A
7
2A
EN
4
1,2EN
3Y
10
3Z
11
4Y
14
4Z
13
9
3A
15
4A
EN
12
3,4EN
†This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
Pin numbers shown are for the N package.
logic diagram (positive logic)
Pin numbers shown are for the N package.
4
1
7
2
3
6
5
1,2EN
1A
2A
1Y
1Z
2Y
2Z
12
9
15
10
11
14
13
3,4EN
3A
4A
3Y
3Z
4Y
4Z
SN75ALS174A
QUADRUPLE DIFFERENTIAL LINE DRIVER
SLLS122E – JULY 1991 – REVISED APRIL 1998
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
schematics of inputs and outputs
Input
VCC
Output
GND
VCC
EQUIVALENT OF EACH INPUT TYPICAL OF ALL OUTPUTS
35 kΩ NOM
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage, VCC (see Note 1) 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage, VI 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output voltage range, VO –9 V to 14 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous total dissipation See Dissipation Rating Table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, Tstg –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 260°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only , and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may af fect device reliability.
NOTE 1: All voltage values are with respect to network GND.
DISSIPATION RATING TABLE
PACKAGE TA ≤ 25°C
POWER RATING DERATING
FACTOR TA = 70°C
POWER RATING TA = 85°C
POWER RATING
DW 1125 mW 9.0 mW/°C 720 mW 585 mW
N 1150 mW 9.2 mW/°C 736 mW 598 mW
recommended operating conditions
MIN NOM MAX UNIT
Supply voltage, VCC 4.75 5 5.25 V
High-level input voltage, VIH 2 V
Low-level input voltage, VIL 0.8 V
Common-mode output voltage, VOC 12
–7 V
High-level output current, IOH –60 mA
Low-level output current, IOL 60 mA
Operating free-air temperature, TA0 70 °C
SN75ALS174A
QUADRUPLE DIFFERENTIAL LINE DRIVER
SLLS122E – JULY 1991 – REVISED APRIL 1998
4POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP†MAX UNIT
VIK Input clamp voltage II = –18 mA –1.5 V
VOOutput voltage IO = 0 0 6 V
|VOD1|Differential output voltage IO = 0 1.5 6 V
|V
OD2
|Differential output voltage RL = 100 ΩSee Figure 1 1/2VOD1
or 2‡V
OD2
g
RL = 54 Ω
g
1.5 2.5 5
|VOD3|Differential output voltage See Note 2 1.5 5 V
∆|VOD|Change in magnitude of
differential output voltage§RL = 54 Ω or 100 Ω,See Figure 1 ±0.2 V
VOC Common-mode output voltageRL = 54 Ω or 100 Ω,See Figure 1 3
–1 V
∆|VOC|Change in magnitude of
common-mode output voltage§RL = 54 Ω or 100 Ω,See Figure 1 ±0.2 V
IOOutput current with power off VCC = 0, VO = –7 V to 12 V ±100 µA
IOZ High-impedance-state output current VO = –7 V to 12 V ±100 µA
IIH High-level input current VI = 2.7 V 20 µA
IIL Low-level input current VI = 0.4 V –100 µA
IOS Short-circuit output current VO = –7 V to 12 V ±250 mA
ICC
Su
pp
ly current (all drivers)
No load
Outputs enabled 36 55
mA
I
CC
S
u
ppl
y
c
u
rrent
(all
dri
v
ers)
No
load
Outputs disabled 16 30
mA
†All typical values are at VCC = 5 V and TA = 25°C.
‡The minimum VOD2 with a 100-Ω load is either 1/2 VOD1 or 2 V, whichever is greater.
§∆|VOD| and ∆|VOC| are the changes in magnitude of VOD and VOC, respectively , that occur when the input is changed from a high level to a low
level.
In ANSI Standard EIA/TIA-422-B, VOC, which is the average of the two output voltages with respect to ground, is called output offset voltage,
VOS.
NOTE 2: See EIA Standard RS-485, Figure 3-5, Test Termination Measurement 2.
switching characteristics over recommended ranges of supply voltage and operating free-air
temperature, CL = 50 pF
PARAMETER TEST CONDITIONS MIN TYP†MAX UNIT
td(OD) Differential output delay time RL = 54 Ω,See Figure 2 9 15 22 ns
tPZH Output enable time to high level RL = 110 Ω,See Figure 3 30 45 70 ns
tPZL Output enable time to low level RL = 110 Ω,See Figure 4 25 40 65 ns
tPHZ Output disable time from high level RL = 110 Ω,See Figure 3 10 20 35 ns
tPLZ Output disable time from low level RL = 110 Ω,See Figure 4 10 30 45 ns
†All typical values are at VCC = 5 V and TA = 25°C.
SN75ALS174A
QUADRUPLE DIFFERENTIAL LINE DRIVER
SLLS122E – JULY 1991 – REVISED APRIL 1998
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
VOC
RL
2
RL
2
VOD2
Figure 1. Differential and Common-Mode Output Voltages
VOLTAGE WAVEFORMSTEST CIRCUIT
Output Y
Output Z
Input 0 V
3 V
td(ODL)
td(ODH)
3 V
Generator
(see Note A) CL = 50 pF
(see Note B)
CLRL =
54 Ω
50 Ω
Y
Z
1.5 V 1.5 V
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR = 1 MHz, ZO = 50 Ω, duty cycle = 50%, tf ≤ 5 ns,
tr ≤ 5 ns.
B. CL includes probe and stray capacitance.
Figure 2. Differential-Output Test Circuit and Delay and Transition Times Voltage Waveforms
tPZH 0.5 V
RL = 110 Ω
0 V or 3 V
Output VOH
Output
VOLTAGE WAVEFORMSTEST CIRCUIT
50 Ω
Input 0 V
3 V
Generator
(see Note A)
tPHZ
S1
Voff ≈0
V
CL = 50 pF
(see Note B)
1.5 V 1.5 V
2.3 V
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR = 1 MHz, ZO = 50 Ω, duty cycle = 50%, tf ≤ 5 ns,
tr ≤ 5 ns.
B. CL includes probe and stray capacitance.
Figure 3. Test Circuit and Voltage Waveforms, tPZH and tPHZ
SN75ALS174A
QUADRUPLE DIFFERENTIAL LINE DRIVER
SLLS122E – JULY 1991 – REVISED APRIL 1998
6POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
tPZL
RL = 110 Ω
0 V or 3 V
Output VOL
Output
VOLTAGE WAVEFORMSTEST CIRCUIT
50 Ω
Input 0 V
3 V
Generator
(see Note A)
S1
5 V
CL = 50 pF
(see Note B)
1.5 V 1.5 V
2.3 V
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR = 1 MHz, ZO = 50 Ω, duty cycle = 50%, tf ≤ 5 ns,
tr ≤ 5 ns.
B. CL includes probe and stray capacitance.
5 V
tPLZ
0.5 V
Figure 4. Test Circuit and Voltage Waveforms, tPZL and tPLZ
PACKAGING INFORMATION
Orderable Device Status (1) Package
Type Package
Drawing Pins Package
Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
SN75ALS174ADW ACTIVE SOIC DW 20 25 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN75ALS174ADWE4 ACTIVE SOIC DW 20 25 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN75ALS174ADWG4 ACTIVE SOIC DW 20 25 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN75ALS174ADWR ACTIVE SOIC DW 20 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN75ALS174ADWRE4 ACTIVE SOIC DW 20 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN75ALS174ADWRG4 ACTIVE SOIC DW 20 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN75ALS174AN ACTIVE PDIP N 16 25 Pb-Free
(RoHS) CU NIPD N / A for Pkg Type
SN75ALS174ANE4 ACTIVE PDIP N 16 25 Pb-Free
(RoHS) CU NIPD N / A for Pkg Type
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
PACKAGE OPTION ADDENDUM
www.ti.com 10-May-2007
Addendum-Page 1
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
SN75ALS174ADWR SOIC DW 20 2000 330.0 24.4 10.8 13.1 2.65 12.0 24.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
SN75ALS174ADWR SOIC DW 20 2000 367.0 367.0 45.0
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 2
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