6N137S1 - Everlight International Corp.

8 PIN DIP HIGH SPEED 10MBit/s LOGIC GATE

PHOTOCOUPLER

Everlight Electronics Co., Ltd. 1 http://www.everlight.com

Document No：DPC-000020 Rev. 2 February 23, 2009

6N137

Features:

• High speed 10Mbit/s

• Guaranteed performance from -40 to 85℃

• Logic gate output

• High isolation voltage between input

and output (Viso=5000 V rms )

• Pb free and RoHS compliant.

• UL approved (No. 214129)

• VDE approved (No. 132249)

• SEMKO approved

• NEMKO approved

• DEMKO approved

• FIMKO approved

• CSA approved (No. 2037145)

Description

The 6N137 consists of an infrared emitting diode optically

coupled to a high speed integrated photo detector logic gate

with a strobable output.

Schematic

It is packaged in a 8-pin DIP package and available in

wide-lead spacing and SMD options. 1 8

2 7

Applications

3 6

• Ground loop elimination

• LSTTL to TTL, LSTTL or 5 volt CMOS 4 5

• Line receiver, data transmission

• Data multiplexing A 0.1μF bypass capacitor must be

connected between pins 8 and 5 *3

• Switching power supplies

• Pulse transformer replacement

• Computer peripheral interface

Pin Configuration

1, No Connection

Truth Table (Positive Logic) 2, Anode

Input Enable Output

H H L

L H H

H L H

L L H

H NC L

L NC H

3, Cathode

4. No Connection

5, Gnd

6, Vout

7, VE

8, VCC

8 PIN DIP HIGH SPEED 10MBit/s LOGIC GATE

PHOTOCOUPLER

Everlight Electronics Co., Ltd. 2 http://www.everlight.com

Document No：DPC-000020 Rev. 2 February 23, 2009

6N137

Absolute Maximum Ratings (Ta=25°C)

Parameter Symbol Rating Unit

Forward current IF 50 mA

Enable input voltage Not exceed VCC by

more than 500mV VE 5.5 V

Reverse voltage VR 5 V

Input

Power dissipation PD 100 mW

Power dissipation PC 85 mW

Output current IO 50 mA

Output voltage VO 7.0 V

Output

Supply voltage VCC 7.0 V

Output Power Dissipation PO 100 mW

Isolation voltage *1 V

ISO 5000 V rms

Operating temperature TOPR -40 ~ +85 °C

Storage temperature TSTG -55 ~ +125 °C

Soldering temperature *2 T

SOL 260 °C

Notes

*1 AC for 1 minute, R.H.= 40 ~ 60% R.H. In this test, pins 1 & 2 are shorted together, and pins 3 & 4

are shorted together.

*2 For 10 seconds.

8 PIN DIP HIGH SPEED 10MBit/s LOGIC GATE

PHOTOCOUPLER

Everlight Electronics Co., Ltd. 3 http://www.everlight.com

Document No：DPC-000020 Rev. 2 February 23, 2009

6N137

Electrical Characteristics (Ta=-40 to 85°C unless specified otherwise)

Input

Parameter Symbol Min. Typ.* Max. Unit Condition

Forward voltage VF - 1.4 1.8 V

IF = 10mA

Reverse voltage VR 5.0 - - V

IR = 10μA

Temperature coefficient of

forward voltage ΔVF/ΔTA - -1.8 - mV/°C IF =10mA

Input capacitance CIN - 60 - pF

VF=0, f=1MHz

Output

Parameter Symbol Min. Typ.* Max. Unit Condition

High level supply current ICCH - 7 10

mA IF=10mA, VE=0.5V,

VCC=5.5V

Low level supply current ICCL - 9 13 mA

IF=0mA, VE=0.5V,

VCC=5.5V

High level enable current IEH - - 0.6 -1.6 mA

VE=0.5V, VCC=5.5V

Low level enable current IEL - - 0.8 -1.6 mA

VE=2.0V, VCC=5.5V

High level enable voltage VEH 2.0 - - V

IF=10mA, VCC=5.5V

Low level enable voltage VEL - - 0.8 V

IF=10mA, VCC=5.5V

Transfer Characteristics (Ta=-40 to 85°C unless specified otherwise)

Parameter Symbol Min. Typ.* Max. Unit Condition

HIGH Level Output Current IOH - 2.1 100 uA

VCC=5.5V, VO=5.5V,

IF=250μA, VE=2.0V

LOW Level Output Current VOL - 0.35 0.6 V VCC = 5.5V, IF=5mA,

VE=2.0V,ICL=13mA

Input Threshold Current IFT - 2.5 5

mA VCC= 5.5V, VO=0.6V,

VE =2.0V,IOL=13mA

8 PIN DIP HIGH SPEED 10MBit/s LOGIC GATE

PHOTOCOUPLER

Everlight Electronics Co., Ltd. 4 http://www.everlight.com

Document No：DPC-000020 Rev. 2 February 23, 2009

6N137

Switching Characteristics (Ta=-40 to 85°C, VCC=5V, IF=7.5mA unless specified otherwise)

Parameter Symbol Min. Typ.* Max. Unit Condition

Propagation delay time to

output High level

(Fig.12)

TPHL - 35 75 ns

CL = 15pF, RL=350Ω,

TA=25°C

Propagation delay time to

output Low level

(Fig.12) TPLH - 40 75

ns CL = 15pF, RL=350Ω,

TA=25°C

Pulse width distortion |Tphl – Tplh| - 5 35

ns CL = 15pF, RL=350Ω

Output rise time

(Fig.12) tr - 40 - ns CL = 15pF, RL=350Ω

Output fall time

(Fig.12) tf - 10 - ns CL = 15pF, RL=350Ω

Switching Characteristics (Ta=-40 to 85°C, VCC=5V, IF=7.5mA unless specified otherwise)

Enable Propagation Delay

Time to Output High Level

(Fig.13) tELH - 15 - ns IF = 7.5mA , VEH=3.5V,

CL = 15pF, RL=350Ω

Enable Propagation Delay

Time to Output Low Level

(Fig.13) tEHL - 15 - ns IF = 7.5mA , VEH=3.5V,

CL = 15pF, RL=350Ω

Common Mode Transient

Immunity at Logic High *4 CMH 5000 - - V/µS

IF = 0mA , VCM=50Vp-p,

VOH=2.0V, RL=350Ω,

TA=25°C

Common Mode Transient

Immunity at Logic Low *5 CML 5000 - - V/µS

IF = 7.5mA ,

VCM=50Vp-p, VOL=0.8V,

RL=350Ω, TA=25°C

8 PIN DIP HIGH SPEED 10MBit/s LOGIC GATE

PHOTOCOUPLER

Everlight Electronics Co., Ltd. 5 http://www.everlight.com

Document No：DPC-000020 Rev. 2 February 23, 2009

6N137

Typical Performance Curves

8 PIN DIP HIGH SPEED 10MBit/s LOGIC GATE

PHOTOCOUPLER

Everlight Electronics Co., Ltd. 6 http://www.everlight.com

Document No：DPC-000020 Rev. 2 February 23, 2009

6N137

8 PIN DIP HIGH SPEED 10MBit/s LOGIC GATE

PHOTOCOUPLER

Everlight Electronics Co., Ltd. 7 http://www.everlight.com

Document No：DPC-000020 Rev. 2 February 23, 2009

6N137

IF=7.5mA

IF=3.75mA

1.5V

t

90%

Output

(Vo)

Output

(Vo)

Input

10%

(

I

F

)

Ω

r

tf

tPLH

tPHL

Fig. 12 Test circuit and waveforms for tPHL, tPLH, tr, and tf

Output

(Vo)

Input

(

Ω

3.0V

1.5V

tELH

tEHL

V

E

)

Fig. 13 Test circuit and waveform for tEHLand tELH

8 PIN DIP HIGH SPEED 10MBit/s LOGIC GATE

PHOTOCOUPLER

Everlight Electronics Co., Ltd. 8 http://www.everlight.com

Document No：DPC-000020 Rev. 2 February 23, 2009

6N137

Ω

Switching Pos. (B), IF=7.5mA

Switching Pos. (A), IF=0

CML

CMH

VO(Min)

VO(Max)

Peak

VCM

0V

5V

Vo

VCM

0.5V

Fig. 14 Test circuit Common mode Transient Immunity

Notes:

*3 The VCC supply must be bypassed by a 0.1μF capacitor or larger. This can be either a ceramic or solid

tantalum capacitor with good high frequency characteristic and should be connected as close as possible to

the package VCC and GND pins

*4 CMH– The maximum tolerable rate of rise of the common mode voltage to ensure the output will remain in

the HIGH state (i.e., VOUT > 2.0V).

*5 CML– The maximum tolerable rate of rise of the common mode voltage to ensure the output will remain in

the LOW output state (i.e., VOUT < 0.8V).

8 PIN DIP HIGH SPEED 10MBit/s LOGIC GATE

PHOTOCOUPLER

Everlight Electronics Co., Ltd. 9 http://www.everlight.com

Document No：DPC-000020 Rev. 2 February 23, 2009

6N137

Order Information

Part Number

6N137Y(Z)-V

Note

Y = Lead form option (S, S1, M or none)

Z = Tape and reel option (TA, TB or none).

V = VDE (optional)

Option Description Packing quantity

None Standard DIP-8 45 units per tube

M Wide lead bend (0.4 inch spacing) 45 units per tube

S (TA) Surface mount lead form + TA tape & reel option 1000 units per reel

S (TB) Surface mount lead form + TB tape & reel option 1000 units per reel

S1 (TA) Surface mount lead form (low profile) + TA tape & reel option 1000 units per reel

S1 (TB) Surface mount lead form (low profile) + TB tape & reel option 1000 units per reel

8 PIN DIP HIGH SPEED 10MBit/s LOGIC GATE

PHOTOCOUPLER

Everlight Electronics Co., Ltd. 10 http://www.everlight.com

Document No：DPC-000020 Rev. 2 February 23, 2009

6N137

Package Drawing

(Dimensions in mm)

Standard DIP Type

Option M Type

8 PIN DIP HIGH SPEED 10MBit/s LOGIC GATE

PHOTOCOUPLER

Everlight Electronics Co., Ltd. 11 http://www.everlight.com

Document No：DPC-000020 Rev. 2 February 23, 2009

6N137

Option S Type

Option S1 Type

8 PIN DIP HIGH SPEED 10MBit/s LOGIC GATE

PHOTOCOUPLER

Everlight Electronics Co., Ltd. 12 http://www.everlight.com

Document No：DPC-000020 Rev. 2 February 23, 2009

6N137

Recommended pad layout for surface mount leadform

Device Marking

6N137

YWWV

EL

Notes

6N137 denotes Device Number

Y denotes 1 digit Year code

WW denotes 2 digit Week code

V denotes VDE (optional)

8 PIN DIP HIGH SPEED 10MBit/s LOGIC GATE

PHOTOCOUPLER

Everlight Electronics Co., Ltd. 13 http://www.everlight.com

Document No：DPC-000020 Rev. 2 February 23, 2009

6N137

Tape & Reel Packing Specifications

ape dimensions

Dimension No. A B Do D1 E F

Option TA Option TB

Direction of feed from reel Direction of feed from reel

T

Dimension(mm) 10.4±0.1 10.0±0.1 1.5±0.1 1.5±0.1 1.75±0.1 7.5±0.1

Dimension No. Po P1 P2 t W K

12.0±0.1 2.0±0.1 0.4±0.1 16.0+0.3/

-0.1 4.5±0.1 Dimension(mm) 4.0±0.1

8 PIN DIP HIGH SPEED 10MBit/s LOGIC GATE

PHOTOCOUPLER

Everlight Electronics Co., Ltd. 14 http://www.everlight.com

Document No：DPC-000020 Rev. 2 February 23, 2009

6N137

Solder Reflow Tem P

perature rofile

TIME

(

S

)

150°

1-3 °C/Sec

70

–

170 Sec

200°

217°

>255 °C

(

30s Max

)

1-3 °C/Sec 60

–

140 Sec

260 °C

(

p

eak

,

10 Sec Max

)

8 PIN DIP HIGH SPEED 10MBit/s LOGIC GATE

PHOTOCOUPLER

Everlight Electronics Co., Ltd. 15 http://www.everlight.com

Document No：DPC-000020 Rev. 2 February 23, 2009

6N137

DISCLAIMER

. Above specification may be changed without notice. EVERLIGHT will reserve authority on material change

for above specification.

. When using this product, please observe the absolute maximum ratings and the instructions for using

outlined in these specification sheets. EVERLIGHT assumes no responsibility for any damage resulting

from use of the product which does not comply with the absolute maximum ratings and the instructions

ese specification sheets.

e anyone to reproduce them without EVERLIGHT’s consent.

1

2

included in th

3. These specification sheets include materials protected under copyright of EVERLIGHT corporation. Please

don’t reproduce or caus