TIBPAL20L8-7C, TIBPAL20R4-7C, TIBPAL20R6-7C, TIBPAL20R8-7C
TIBPAL20L8-10M, TIBPAL20R4-10M, TIBPAL20R6-10M, TIBPAL20R8-10M
HIGH-PERFORMANCE IMPACT-XPAL® CIRCUITS
SRPS005E D3307, OCTOBER 1989 REVISED DECEMBER 2010
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Copyright © 2010, Texas Instruments Incorporated
1
PRODUCTION DATA information is current as of publication date. Products
conform to specifications per the terms of Texas Instruments standard
warranty. Production processing does not necessarily include testing of all
parameters.
High-Performance Operation:
fmax (no feedback)
TIBPAL20R’ -7C Series . . . 100 MHz
TIBPAL20R’ -10M Series . . . 62.5 MHz
fmax (internal feedback)
TIBPAL20R -7C Series . . . 100 MHz
TIBPAL20R -10M Series . . . 62.5 MHz
fmax (external feedback)
TIBPAL20R’ -7C Series . . . 74 MHz
TIBPAL20R’ -10M Series . . . 50 MHz
Propagation Delay
TIBPAL20L8-7C Series . . . 7 ns Max
TIBPAL20L8-10M Series . . . 10 ns Max
Functionally Equivalent, but Faster Than
Existing 24-Pin PLD Circuits
Preload Capability on Output Registers
Simplifies Testing
Power-Up Clear on Registered Devices (All
Register Outputs are Set Low, but Voltage
Levels at the Output Pins Go High)
Package Options Include Both Plastic and
Ceramic Chip Carriers in Addition to Plastic
and Ceramic DIPs
Security Fuse Prevents Duplication
Dependable Texas Instruments Quality and
Reliability
DEVICE I
INPUTS
3-STATE
O OUTPUTS
REGISTERED
Q OUTPUTS
I/O
PORT
S
PAL20L8 14 2 0 6
PAL20R4 12 0 4 (3-state buffers) 4
PAL20R6 12 0 6 (3-state buffers) 2
PAL20R8 12 0 8 (3-state buffers) 0
description
These programmable array logic devices feature high speed and functional equivalency when compared with
currently available devices. These IMPACT-X circuits combine the latest Advanced Low-Power Schottky
technology with proven titanium-tungsten fuses to provide reliable, high-performance substitutes for
conventional TTL logic. Their easy programmability allows for quick design of custom functions and typically
results in a more compact circuit board. In addition, chip carriers are available for futher reduction in board
space.
All of the register outputs are set to a low level during power-up. Extra circuitry has been provided to allow loading
of each register asynchronously to either a high or low state. This feature simplifies testing because the registers
can be set to an initial state prior to executing the test sequence.
The TIBPAL20’ C series is characterized from 0°C to 75°C. The TIBPAL20’ M series is characterized for
operation over the full military temperature range of 55°C to 125°C.
IMPACT-X is a trademark of Texas Instruments Incorporated.
PAL is a registered trademark of Advanced Micro Devices Inc.
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
I
I
I
I
I
I
I
I
I
I
I
GND
VCC
I
O
I/O
I/O
I/O
I/O
I/O
I/O
O
I
I
TIBPAL20L8’
C SUFFIX . . . JT OR NT PACKAGE
M SUFFIX . . . JT PACKAGE
(TOP VIEW)
3212827
12 13
5
6
7
8
9
10
11
25
24
23
22
21
20
19
I/O
I/O
I/O
NC
I/O
I/O
I/O
I
I
I
NC
I
I
I
426
14 15 16 17 18
I
I
GND
NC
I
I
O
I
I
I
NC
I
O
TIBPAL20L8’
C SUFFIX . . . FN PACKAGE
M SUFFIX . . . FK PACKAGE
(TOP VIEW)
NC No internal connection
Pin assignments in operating mode
V
CC
OBSOLETE - No Longer Available
TIBPAL20R4-7C, TIBPAL20R6-7C, TIBPAL20R8-7C
TIBPAL20R4-10M, TIBPAL20R6-10M, TIBPAL20R8-10M
HIGH-PERFORMANCE IMPACT-XPAL® CIRCUITS
SRPS005E D3307, OCTOBER 1989 REVISED DECEMBER 2010
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
2
CLK
I
I
I
I
I
I
I
I
I
I
GND
I
I/O
I/O
Q
Q
Q
Q
I/O
I/O
I
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
VCC
OE
TIBPAL20R4’
C SUFFIX . . . JT OR NT PACKAGE
M SUFFIX . . . JT PACKAGE
(TOP VIEW)
I
I
GND
NC
I
I/O
I
I
CLK
NC
I
I/O
(TOP VIEW)
VCC
11 19
12 13 14 15 16 17 18
4
10
9
8
7
6
5 I/O
20
21
22
23
24
25
3 2 1 282726
I
I
I
NC
I
I
I
Q
Q
NC
Q
Q
I/O
TIBPAL20R4’
C SUFFIX . . . FN PACKAGE
M SUFFIX . . . FK PACKAGE
NC No internal connection
OE
CLK
I
I
I
I
I
I
I
I
I
I
GND
I
I/O
Q
Q
Q
Q
Q
Q
I/O
I
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13 OE
I
I
GND
NC
I
I/O
I
I
CLK
NC
I
I/O
VCC
11 19
12 13 14 15 16 17 18
4
10
9
8
7
6
5Q
20
21
22
23
24
25
3 2 1 282726
I
I
I
NC
I
I
I
Q
Q
NC
Q
Q
Q
OE
VCC
(TOP VIEW)
TIBPAL20R6’
C SUFFIX . . . JT OR NT PACKAGE
M SUFFIX . . . JT PACKAGE
(TOP VIEW)
TIBPAL20R6’
C SUFFIX . . . FN PACKAGE
M SUFFIX . . . FK PACKAGE
CLK
I
I
I
I
I
I
I
I
I
I
GND
I
Q
Q
Q
Q
Q
Q
Q
Q
I
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13 OE
I
I
GND
NC
I
Q
I
I
CLK
NC
I
Q
VCC
11 19
12 13 14 15 16 17 18
4
10
9
8
7
6
5Q
20
21
22
23
24
25
3 2 1 282726
I
I
I
NC
I
I
I
Q
Q
NC
Q
Q
Q
OE
VCC
(TOP VIEW)
TIBPAL20R8’
C SUFFIX . . . JT OR NT PACKAGE
M SUFFIX . . . JT PACKAGE
(TOP VIEW)
TIBPAL20R8’
C SUFFIX . . . FN PACKAGE
M SUFFIX . . . FK PACKAGE
Pin assignments in operating mode
OBSOLETE - No Longer Available
TIBPAL20L8-7C, TIBPAL20R4-7C
TIBPAL20L8-10M, TIBPAL20R4-10M
HIGH-PERFORMANCE IMPACT-XPAL® CIRCUITS
SRPS005E D3307, OCTOBER 1989 REVISED DECEMBER 2010
POST OFFICE BOX 655303 DALLAS, TEXAS 75265 3
functional block diagrams (positive logic)
O
O
I/O
I/O
I/O
I/O
I/O
I/O
I
EN 1
&
40 X 64
14 20
206
7
7
7
7
7
7
7
7
6
20 x
denotes fused inputs
Q
I/O
I/O
I/O
I/O
I
EN
12 20
204
7
7
7
8
8
8
7
4
20 x
1
&
40 X 64
1
8
Q
Q
Q
4
1D
I = 0 2
CLK C1
EN 2
OE
4
TIBPAL20L8’
TIBPAL20R4’
OBSOLETE - No Longer Available
TIBPAL20R6-7C, TIBPAL20R8-7C
TIBPAL20R6-10M, TIBPAL20R8-10M
HIGH-PERFORMANCE IMPACT-XPAL® CIRCUITS
SRPS005E D3307, OCTOBER 1989 REVISED DECEMBER 2010
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
4
functional block diagrams (positive logic)
denotes fused inputs
TIBPAL20R6’
TIBPAL20R8’
Q
I/O
I/O
I
EN
12 20
202
7
8
8
8
7
2
20 x
1
&
40 X 64
1
8
Q
Q
Q
6
1D
I = 0 2
CLK C1
EN 2
OE
6
8Q
8Q
Q
I12 20
208
8
8
8
8
20 x
8
Q
Q
Q
1D
I = 0 2
CLK C1
EN 2
8Q
8Q
&
40 X 64
1
OE
8Q
8Q
OBSOLETE - No Longer Available
4 8 12 16 20 24 28 32
I3
I4
I5
I6
I7
I8
I9
I10
O
22
I/O
21
I/O
20
I/O
19
I/O
18
I/O
17
I/O
16
O
15
I
14
Increment
I1
Fuse number = First fuse number + Increment
Pin numbers shown are for JT and NT packages.
0
40
80
120
160
200
240
280
320
360
400
440
480
520
560
600
640
680
720
760
800
840
880
920
960
1000
1040
1080
1120
1160
1200
1240
1280
1320
1360
1400
1440
1480
1520
1560
1600
1640
1680
1720
1760
1800
1840
1880
1920
1960
2000
2040
2080
2120
2160
2200
2240
2280
2320
2360
2400
2440
2480
2520
First Fuse
Numbers
36 390
I2I
23
I11 I
13
TIBPAL20L8-7C
TIBPAL20L8-10M
HIGH-PERFORMANCE IMPACT-XPAL® CIRCUITS
SRPS005E D3307, OCTOBER 1989 REVISED DECEMBER 2010
POST OFFICE BOX 655303 DALLAS, TEXAS 75265 5
logic diagram (positive logic)
OBSOLETE - No Longer Available
Fuse number = First fuse number + Increment
Pin numbers shown are for JT and NT packages.
4 8 12 16 20 24 28 32
I3
I4
I5
I6
I7
I8
I9
I10
I/O
22
I/O
21
I/O
16
I/O
15
Increment
0
40
80
120
160
200
240
280
320
360
400
440
480
520
560
600
640
680
720
760
800
840
880
920
960
1000
1040
1080
1120
1160
1200
1240
1280
1320
1360
1400
1440
1480
1520
1560
1600
1640
1680
1720
1760
1800
1840
1880
1920
1960
2000
2040
2080
2120
2160
2200
2240
2280
2320
2360
2400
2440
2480
2520
First Fuse
Numbers
36 390
I2I
23
I11 I
14
Q
20
Q
19
Q
18
Q
17
C1
1D
I = 0
C1
1D
I = 0
C1
1D
I = 0
C1
1D
I = 0
13 OE
CLK 1
TIBPAL20R4-7C
TIBPAL20R4-10M
HIGH-PERFORMANCE IMPACT-XPAL® CIRCUITS
SRPS005E D3307, OCTOBER 1989 REVISED DECEMBER 2010
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
6
logic diagram (positive logic)
OBSOLETE - No Longer Available
Fuse number = First fuse number + Increment
Pin numbers shown are for JT and NT packages.
4 8 12 16 20 24 28 32
I3
I4
I5
I6
I7
I8
I9
I10
I/O
22
I/O
15
Increment
0
40
80
120
160
200
240
280
320
360
400
440
480
520
560
600
640
680
720
760
800
840
880
920
960
1000
1040
1080
1120
1160
1200
1240
1280
1320
1360
1400
1440
1480
1520
1560
1600
1640
1680
1720
1760
1800
1840
1880
1920
1960
2000
2040
2080
2120
2160
2200
2240
2280
2320
2360
2400
2440
2480
2520
First Fuse
Numbers
36 390
I2I
23
I11 I
14
Q
20
Q
19
Q
18
Q
17
C1
1D
I = 0
C1
1D
I = 0
C1
1D
I = 0
C1
1D
I = 0
13 OE
CLK 1
Q
21
C1
1D
I = 0
Q
16
C1
1D
I = 0
TIBPAL20R6-7C
TIBPAL20R6-10M
HIGH-PERFORMANCE IMPACT-XPAL® CIRCUITS
SRPS005E D3307, OCTOBER 1989 REVISED DECEMBER 2010
POST OFFICE BOX 655303 DALLAS, TEXAS 75265 7
logic diagram (positive logic)
OBSOLETE - No Longer Available
Fuse number = First fuse number + Increment
Pin numbers shown are for JT and NT packages.
4 8 12 16 20 24 28 32
I3
I4
I5
I6
I7
I8
I9
I10
Increment
0
40
80
120
160
200
240
280
320
360
400
440
480
520
560
600
640
680
720
760
800
840
880
920
960
1000
1040
1080
1120
1160
1200
1240
1280
1320
1360
1400
1440
1480
1520
1560
1600
1640
1680
1720
1760
1800
1840
1880
1920
1960
2000
2040
2080
2120
2160
2200
2240
2280
2320
2360
2400
2440
2480
2520
First Fuse
Numbers
36 390
I2I
23
I11 I
14
Q
20
Q
19
Q
18
Q
17
C1
1D
I = 0
C1
1D
I = 0
C1
1D
I = 0
C1
1D
I = 0
13 OE
CLK 1
Q
21
C1
1D
I = 0
Q
16
C1
1D
I = 0
Q
22
C1
1D
I = 0
Q
15
C1
1D
I = 0
TIBPAL20R8-7C
TIBPAL20R8-10M
HIGH-PERFORMANCE IMPACT-XPAL® CIRCUITS
SRPS005E D3307, OCTOBER 1989 REVISED DECEMBER 2010
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
8
logic diagram (positive logic)
OBSOLETE - No Longer Available
TIBPAL20L8-7C, TIBPAL20R4-7C, TIBPAL20R6-7C, TIBPAL20R8-7C
HIGH-PERFORMANCE IMPACT-XPAL® CIRCUITS
SRPS005E D3307, OCTOBER 1989 REVISED DECEMBER 2010
POST OFFICE BOX 655303 DALLAS, TEXAS 75265 9
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VCC (see Note 1) 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage (see Note 1) 5.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage applied to disabled output (see Note 1) 5.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating free-air temperature range 0°C to 75°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range 65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
NOTE 1: These ratings apply except for programming pins during a programming cycle.
recommended operating conditions
MIN NOM MAX UNIT
VCC Supply voltage 4.75 5 5.25 V
VIH High-level input voltage (see Note 2) 2 5.5 V
VIL Low-level input voltage (see Note 2) 0.8 V
IOH High-level output current 3.2 mA
IOL Low-level output current 24 mA
fclockClock frequency 0 100 MHz
High 5
Low 5
tsuSetup time, input or feedback before clock7 ns
thHold time, input or feedback after clock0 ns
TAOperating free-air temperature 0 25 75 °C
fclock, tw, tsu, and th do not apply for TIBPAL20L8’.
NOTE 2: These are absolute voltage levels with respect to the ground pin of the device and include all overshoots due to system and/or tester
noise. Testing these parameters should not be attempted without suitable equipment.
ns
Pulse duration, clock (see Note 2)tw
OBSOLETE - No Longer Available
I, I/O O, I/Otpd ns
TIBPAL20L8-7C, TIBPAL20R4-7C, TIBPAL20R6-7C, TIBPAL20R8-7C
HIGH-PERFORMANCE IMPACT-XPAL® CIRCUITS
SRPS005E D3307, OCTOBER 1989 REVISED DECEMBER 2010
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
10
electrical characteristics over recommended operating free-air temperature range
PARAMETER TEST CONDITIONS MIN TYPMAX UNIT
VIK VCC = 4.75 V, II = 18 mA 0.8 1.5 V
VOH VCC = 4.75 V, IOH = 3.2 mA 2.4 3.2 V
VOL VCC = 4.75 V, IOL = 24 mA 0.3 0.5 V
IOZHVCC = 5.25 V, VO = 2.7 V 100 μA
IOZLVCC = 5.25 V, VO = 0.4 V 100 μA
IIVCC = 5.25 V, VI = 5.5 V 100 μA
IIHVCC = 5.25 V, VI = 2.7 V 25 μA
IILVCC = 5.25 V, VI = 0.4 V 80 250 μA
IOS§VCC = 5.25 V, VO = 0.5 V 30 70 130 mA
ICC VCC = 5.25 V, VI = 0, Outputs open 150 210 mA
Cif = 1 MHz, VI = 2 V 5 pF
Cof = 1 MHz, VO = 2 V 6 pF
Cclk f = 1 MHz, VCLK = 2 V 6 pF
switching characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted)
PARAMETER FROM
(INPUT)
TO
(OUTPUT) TEST CONDITION MIN TYPMAX UNIT
without feedback 100
fmaxwith internal feedback
(counter configuration) 100 MHz
with external feedback 74
1 or 2 outputs switching 3 5.5 7
8 outputs switching R1 = 200 Ω, 3 6 7.5
tpd CLKQR2 = 390 Ω, 2 4 6.5 ns
tpd#CLKFeedback input See Figure 6 3 ns
ten OEQ 4 7.5 ns
tdis OEQ 4 7.5 ns
ten I, I/O O, I/O 6 9 ns
tdis I, I/O O, I/O 6 9 ns
tsk(o)|| Skew between registered outputs 0.5 ns
All typical values are at VCC = 5 V, TA = 25°C.
I/O leakage is the worst case of IOZL and IIL or IOZH and IIH respectively.
§Not more than one output should be shorted at a time, and the duration of the short circuit should not exceed one second. VO is set at 0.5 V to
avoid test problems caused by test equipment ground degradation.
See section for fmax specifications.
#This parameter applies to TIBPAL20R4’ and TIBPAL20R6’ only (see Figure 4 for illustration) and is calculated from the measured fmax with internal
feedback in the counter configuration.
|| This parameter is the measurement of the difference between the fastest and slowest tpd (CLK-to-Q) observed when multiple registered outputs
are switching in the same direction.
OBSOLETE - No Longer Available
TIBPAL20L8-10M, TIBPAL20R4-10M, TIBPAL20R6-10M, TIBPAL20R8-10M
HIGH-PERFORMANCE IMPACT-XPAL® CIRCUITS
SRPS005E D3307, OCTOBER 1989 REVISED DECEMBER 2010
POST OFFICE BOX 655303 DALLAS, TEXAS 75265 11
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, VCC (see Note 1) 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage (see Note 1) 5.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage applied to disabled output (see Note 1) 5.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating free-air temperature range 55°C to 125°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range 65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
NOTE 1: These ratings apply except for programming pins during a programming cycle.
recommended operating conditions
MIN NOM MAX UNIT
VCC Supply voltage 4.5 5 5.5 V
VIH High-level input voltage 2 5.5 V
VIL Low-level input voltage 0.8 V
IOH High-level output current 2 mA
IOL Low-level output current 12 mA
fclockClock frequency 0 62.5 MHz
High 8
Low 8
tsuSetup time, input or feedback before clock10 ns
thHold time, input or feedback after clock0 ns
TAOperating free-air temperature 55 25 125 °C
fclock, tw, tsu, and th do not apply for TIBPAL20L8’.
NOTE 2: These are absolute voltage levels with respect to the ground pin of the device and include all overshoots due to system and/or tester
noise. Testing these parameters should not be attempted without suitable equipment.
ns
Pulse duration, clock (see Note 2)tw
OBSOLETE - No Longer Available