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September 2015
FDS89161LZ Dual N-Channel Shielded Gate PowerTrench® MOSFET
©2011 Fairchild Semiconductor Corporation 1www.fairchildsemi.com
FDS89161LZ Rev. 1.2
FDS89161LZ
Dual N-Channel Shielded Gate PowerTrench® MOSFET
100 V, 2.7 A, 105 mΩ
Features
Shielded Gate MOSFET Technology
Max rDS(on) = 105 mΩ at VGS = 10 V, ID = 2.7 A
Max rDS(on) = 160 mΩ at VGS = 4.5 V, ID = 2.1 A
High performance trench technology for extremely low rDS(on)
High power and current handling capability in a widely used
surface mount package
CDM ESD protection level > 2KV typical (Note 4)
100% UIL Tested
RoHS Compliant
General Description
This N-Channel logic Level MOSFETs are produced using
Fairchild Semiconductor‘s advanced PowerTrench® process
that incorporates Shielded Gate technology. This process has
been optimized for the on-state resisitance and yet maintain
superior switching performance. G-S zener has been added to
enhance ESD voltage level.
Application
DC-DC conversion
MOSFET Maximum Ratings TA = 25 °C unless otherwise noted
Thermal Characteristics
Package Marking and Ordering Information
Symbol Parameter Ratings Units
VDS Drain to Source Voltage 100 V
VGS Gate to Source Voltage ±20 V
IDDrain Current -Continuous 2.7 A
-Pulsed 15
EAS Single Pulse Avalanche Energy (Note 3) 13 mJ
PDPower Dissipation TC = 25 °C 31 W
Power Dissipation T A = 25 °C (Note1a) 1.6
TJ, TSTG Operating and Storage Junction Temperature Range -55 to +150 °C
RθJC Thermal Resistance, Junction to Case (Note 1) 40 °C/W
RθJA Thermal Resistance, Junction to Ambient (Note 1a) 78
Device Marking Device Package Reel Size Tape Width Quantity
FDS89161LZ FDS89161LZ SO-8 13 ’’ 12 mm 2500 units
G2
S1
G1
S2
D2
D2
D1
D1
Pin 1
SO-8
D1
D1
D2
D2
S2
S1 G1
G2
4
3
2
1
5
6
7
8
Q2
Q1
FDS89161LZ Dual N-Channel Shielded Gate PowerTrench® MOSFET
©2011 Fairchild Semiconductor Corporation 2 www.fairchildsemi.com
FDS89161LZ Rev. 1.2
Electrical Characteristics TJ = 25°C unless otherwise noted
Off Characteristics
On Characteristics
Dynamic Characteristics
Switching Characteristics
Drain-Source Diode Characteristics
Symbol Parameter Test Conditions Min Typ Max Units
BVDSS Drain to Source Breakdown Voltage ID = 250 μA, VGS = 0 V 100 V
ΔBVDSS
ΔTJ
Breakdown Voltage Temperature
Coefficient ID = 250 μA, referenced to 25 °C 68 mV/°C
IDSS Zero Gate Voltage Drain Current VDS = 80 V, VGS = 0 V 1 μA
IGSS Gate to Source Leakage Current VGS = ±20 V, VDS = 0 V ±10 μA
VGS(th) Gate to Source Threshold Voltage VGS = VDS, ID = 250 μA11.72.2V
ΔVGS(th)
ΔTJ
Gate to Source Threshold Voltage
Temperature Coefficient ID = 250 μA, referenced to 25 °C -6 mV/°C
rDS(on) Static Drain to Source On Resistance VGS = 10 V, ID = 2.7 A 81 105 mΩVGS = 4.5 V, ID = 2.1 A 110 160
VGS = 10 V, ID = 2.7 A, TJ = 125 °C 140 182
gFS Forward Transconductance VDS = 10 V, ID = 2.7 A 7.8 S
Ciss Input Capacitance VDS = 50 V, VGS = 0 V,
f = 1MHz
227 302 pF
Coss Output Capacitance 44 58 pF
Crss Reverse Transfer Capacitance 3 4 pF
RgGate Resistance 0.9 Ω
td(on) Turn-On Delay Time VDD = 50 V, ID = 2.7 A,
VGS = 10 V, RGEN = 6 Ω
3.8 10 ns
trRise Time 1.2 10 ns
td(off) Turn-Off Delay Time 9.5 17 ns
tfFall Time 1.6 10 ns
Qg(TOT) Total Gate Charge VGS = 0 V to 10 V VDD = 50 V,
ID = 2.7 A
3.8 5.3 nC
Qg(TOT) Total Gate Charge VGS = 0 V to 5 V 2.1 2.9 nC
Qgs Gate to Source Charge 0.7 nC
Qgd Gate to Drain “Miller” Charge 0.7 nC
VSD Source to Drain Diode Forward Voltage VGS = 0 V, IS = 2.7 A (Note 2) 0.8 1.3 V
VGS = 0 V, IS = 2 A (Note 2) 0.8 1.2
trr Reverse Recovery Time IF = 2.7 A, di/dt = 100 A/μs 31 56 ns
Qrr Reverse Recovery Charge 20 36 nC
b) 135°C/W when
mounted on a
minimun pad
a) 78°C/W when
mounted on a 1 in2
pad of 2 oz copper
NOTES:
1. RθJA is determined with the device mounted on a 1in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 materia l. RθJC is guar anteed by de sign while RθCA is determined by
the user's board design.
2. Pulse Test: Pulse Width < 300μs, Duty cycle < 2.0%.
3. Starting TJ = 25 °C, L = 0.3 mH, IAS =25 A, VDD = 27 V, VGS = 10V.
4. The diode connected between gate and source serves only as protection against ESD. No gate overvoltage rating is implied.
FDS89161LZ Dual N-Channel Shielded Gate PowerTrench® MOSFET
©2011 Fairchild Semiconducto r Corporation 3 www.fairchildsemi.com
FDS89161LZ Rev. 1.2
Typical Characteristics ( N-Channel) TJ = 25°C unless otherwise noted
Figure 1.
012345
0
3
6
9
12
15 VGS = 8 V
VGS = 3.5 V
VGS = 6 V
PULSE DU R ATION = 80 μs
DUTY CYCLE = 0.5% M AX
VGS =5 V
VGS = 4 V
VGS = 10 V
ID, DRAIN CURRENT (A)
VDS, DRAIN TO SOURCE VOLTAGE (V)
On-Region Characteristics Figure 2.
03691215
0
1
2
3
4
VGS = 4 V
VGS = 3.5 V
PULSE DU R ATION = 80 μs
DUTY CYCLE = 0.5% M A X
NORMALIZED
DRAIN TO SOU RC E ON-RESISTANC E
ID, DRAIN CURRENT (A)
VGS = 5 V
VGS = 6 V
VGS = 8 V VGS = 10 V
Normalized On-Resistance
vs Drain Current and Gate Voltage
Figure 3. Normalized On-Resistance
-75 -50 -25 0 25 50 75 100 125 150
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
ID = 2.7 A
VGS = 10 V
NORMALIZED
DRAIN TO SO UR CE ON-RESISTANCE
TJ, JUNCTION TEMPERATURE (oC)
vs Junction Te mperature Figure 4.
246810
0
100
200
300
400
500
TJ = 125 oC
ID = 2.7 A
TJ = 25 oC
VGS, GA TE TO SOU R CE VO LTA GE (V)
rDS(on), DRAIN TO
SOURCE ON-RESISTANCE (mΩ)
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
On-Resistance vs Gate to
Source Voltage
Figure 5. Transfer Characteristics
0246810
0
3
6
9
12
15
TJ = 150 oC
VDS = 50 V
PULSE DURATION = 80 μs
DUTY CYCLE = 0.5% MAX
TJ = -55 oC
TJ = 25 oC
ID, DRAIN CURRENT (A)
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 6.
0.0 0.2 0.4 0.6 0.8 1.0 1.2
0.001
0.01
0.1
1
10
20
TJ = -55 oC
TJ = 25 oC
TJ = 150 oC
VGS = 0 V
IS, REVERSE DRAIN CU RR ENT (A)
VSD, BODY DIODE FORWARD VOLTAGE (V)
Source to Drain Diode
Forward Voltage vs Source Current
FDS89161LZ Dual N-Channel Shielded Gate PowerTrench® MOSFET
©2011 Fairchild Semiconducto r Corporation 4 www.fairchildsemi.com
FDS89161LZ Rev. 1.2
Figure 7.
012345
0
2
4
6
8
10
ID = 2.7 A
VDD = 50 V
VDD = 25 V
VGS, GATE TO SOURCE VOLTAGE (V)
Qg, GATE CHARGE (nC)
VDD = 75 V
Gate Charge Characteristics Figure 8.
0.1 1 10 100
1
10
100
400
f = 1 MHz
VGS = 0 V
CAPACITANCE (pF)
VDS, DRAIN TO SOURCE VOLTAGE (V)
Crss
Coss
Ciss
Cap ac i tance vs Drain
to Source Voltage
Figure 9.
0.01 0.1 1 2
1.0
1.5
2.0
2.5
3.0
TJ = 100 oC
TJ = 25 oC
TJ = 125 oC
tAV, TIME IN AVALANCHE (m s)
IAS, AVALANCHE CURRENT (A)
Unc l amp e d Ind uct i ve
Switching Capability Figure 10.
Maximum Continuous Drain
Current vs Ambient Temperature
Figure 11. Gate Leakage Current vs
Gate to Source Voltage
0 5 10 15 20 25 30 35
10-9
10-8
10-7
10-6
10-5
10-4
10-3
10-2
10-1
VDS = 0 V
TJ = 25 oC
TJ = 125 oC
VGS, GA TE TO SOURCE V OLTAGE (V)
Ig, GATE LEAK AG E CURR ENT (A)
Figure 12.
0.1 1 10 100 400
0.005
0.01
0.1
1
10
20
10 s
100 us
10 ms
DC
1 s
100 ms
1 ms
ID, DRAIN CURRENT (A)
VDS, DRAIN to SOU R CE VOLTAGE (V)
THIS AREA IS
LIMITED BY rDS(on)
SINGLE PULSE
TJ = MAX RATED
RθJA = 135 oC/W
TA = 25 oC
Forward Bias Safe
Operating Area
Typical Characteristics ( N-Channel) TJ = 25°C unless otherwise noted
FDS89161LZ Dual N-Channel Shielded Gate PowerTrench® MOSFET
©2011 Fairchild Semiconducto r Corporation 5 www.fairchildsemi.com
FDS89161LZ Rev. 1.2
Figure 13. Single Pulse Maximum Power Dissipation
10-4 10-3 10-2 10-1 11010
2103
0.5
1
10
100
1000
P(PK), PEAK TRANSIENT POWER (W)
SINGLE PULSE
RθJA = 135 oC/W
TA = 25 oC
t, PULSE WIDTH (sec)
Figure 14.
10-4 10-3 10-2 10-1 110
100 1000
0.001
0.01
0.1
1
2
SINGLE PULSE
RθJA = 135 oC/W
DUTY CYCLE-DESCENDING OR DER
NORMALIZED THERMAL
IMPEDANCE, ZθJA
t, RECTANGULAR PUL SE D U R ATION (sec)
D = 0.5
0.2
0.1
0.0 5
0.0 2
0.0 1
PDM
t1t2
NOTES:
DUTY FA CTOR: D = t1/t2
PEAK TJ = PDM x ZθJA x RθJA + TA
Junction-to-Ambient Transient Thermal Response Curve
Typical Characteristics ( N-Channel) TJ = 25°C unless otherwise noted
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1
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
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