2009-2013 Microchip Technology Inc. DS20002200D-page 1
Features:
• 150 mA Output Current
• Low Dropout Voltage, 260 mV Typical @ 20 mA,
VR=3.3V
• 50 µA Typical Quiescent Current
• 0.01 µA Typical Shutdown Current
• Input Operating Voltage Range: 2.0V to 28.0V
• Standard Output Voltage Options
(1.8V, 2.5V, 3.0V, 3.3V, 5.0V, 10.0V, 12.0V)
• Output Voltage Accuracy: ±2%
• Output Voltages from 1.8V to 18.0V in 0.1V
Increments are Available upon Request
• Stable with Ceramic Output Capacitors
• Current Limit Protection with Current Foldback
• Shutdown Pin
• High PSRR: 50 dB Typical @ 1 kHz
Applications:
• Cordless Phones, Wireless Communications
• PDAs, Notebook and Netbook Computers
•Digital Cameras
• Microcontroller Power
• Car Audio and Navigation Systems
• Home Appliances
Related Literature:
• AN765, “Using Microchip’s Micropower LDOs”
(DS00765), Microchip Technology Inc., ©2002
• AN766, “Pin-Compatible CMOS Upgrades to
BiPolar LDOs” (DS00766), Microchip Technology
Inc., ©2002
• AN792, “A Method to Determine How Much
Power a SOT23 Can Dissipate in an Application”
(DS00792), Microchip Technology Inc., ©2001
Description:
The MCP1804 is a family of CMOS low dropout (LDO)
voltage regulators that can deliver up to 150 mA of
current while consuming only 50 µA of quiescent
current (typical, 1.8V VOUT 5.0V). The input
operating range is specified from 2.0V to 28.0V.
The MCP1804 is capable of delivering 100 mA with
only 1300 mV (typical) of input to output voltage
differential (VOUT = 3.3V). The output voltage tolerance
of the MCP1804 at +25°C is a maximum of ±2%. Line
regulation is ±0.15% typical at +25°C.
The LDO input and output are stable with 0.1 µF of
input and output capacitance. Ceramic, tantalum or
aluminum electrolytic capacitors can all be used for
input and output. Overcurrent limit with current foldback
to 40 mA (typical) provides short circuit protection.
A shutdown (SHDN) function allows the output to be
enabled or disabled. When disabled, the MCP1804
draws only 0.01 µA of current (typical).
Package options include the 3-lead SOT-89, 3-lead
SOT-223, 5-lead SOT-23 and 5-lead SOT-89.
Package Types
123
54
VOUT
VIN NC
SHDN
GND
SOT-89-5
(Top View)
123
VOUT VIN
GND
(Top View)
SOT-89-3
SOT-23-5
123
54
VOUT SHDN
VIN NCGND
123
VOUT VIN
GND
(Top View)
SOT-223-3
150 mA, 28V LDO Regulator With Shutdown
MCP1804
MCP1804
DS20002200D-page 2 2009-2013 Microchip Technology Inc.
Functional Block Diagram
Typical Application Circuit
Thermal
+
-
VIN VOUT
GND
Error Amplifier
Voltage
Reference Current Limiter
Shutdown
Control
SHDN
Protection
*5-Pin Versions Only
*
VIN
CIN
1µF
COUT
1µFCeramic
VIN
12V
Battery
+
VOUT
SHDN
GND
NC
Ceramic
VOUT
5.0V @ 30 mA
1
2
3
5
4
SOT-23
MCP1804
2009-2013 Microchip Technology Inc. DS20002200D-page 3
MCP1804
1.0 ELECTRICAL
CHARACTERISTICS
Absolute Maximum Ratings †
Input Voltage ........................................................................................................................................................... +30V
Output Current (Continuous)............................................................................................................. PD/(VIN -V
OUT) mA
Output Current (Peak).......................................................................................................................................... 300 mA
Output Voltage ...................................................................................................................... (VSS - 0.3V) to (VIN +0.3V)
SHDN Voltage.................................................................................................................................. (VSS - 0.3V) to +30V
† Notice: Stresses above those listed under “Maximum
Ratings” may cause permanent damage to the device.
This is a stress rating only and functional operation of
the device at those or any other conditions above those
indicated in the operational listings of this specification
is not implied. Exposure to maximum rating conditions
for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
Electrical Specifications: Unless otherwise specified, all limits are established for VIN =V
R+2.0V, Note 1,
COUT = 1 µF (X7R), CIN = 1 µF (X7R), VSHDN =V
IN, TA=+25°C
Parameters Sym. Min. Typ. Max. Units Conditions
Input / Output Characteristics
Input Operating
Voltage
VIN 2.0 — 28.0 V Note 1
Input Quiescent
Current
IQ—I
L=0mA
—50105 µA1.8VVOUT 5.0V
— 60 115 µA 5.1V VOUT 12.0V
— 65 125 µA 12.1V VOUT 18.0V
Shutdown Current ISHDN — 0.01 0.10 µA SHDN =0V
Maximum Output
Current
IOUT —V
IN =V
R+3.0V
100 — — mA VOUT <3.0V
150 — — mA VOUT 3.0V
Current Limiter ILIMIT — 200 — mA
Output Short Circuit
Current
IOUT_SC —40 — mA
Output Voltage
Regulation
VOUT VR-2.0% V
RVR+2.0% V I
OUT =10mA, Note 2
VOUT Temperature
Coefficient
TCVOUT — ±100 — ppm/°C IOUT =20mA,
-40°C TA85°C, Note 3
Note 1: The minimum VIN must meet one condition: VIN (VR+2.0V).
2: VR is the nominal regulator output voltage with an input voltage of VIN =V
R+2.0V.
For example: VR= 1.8V, 2.5V, 3.0V, 3.3V, etc.
3: TCVOUT =(V
OUT-HIGH -V
OUT-LOW)*10
6 / (VR*Temperature), VOUT-HIGH = highest voltage measured
over the temperature range. VOUT-LOW = lowest voltage measured over the temperature range.
4: Load regulation is measured at a constant junction temperature using low duty cycle pulse testing.
Changes in output voltage due to heating effects are determined using thermal regulation specification
TCVOUT.
5: Dropout voltage is defined as the input to output differential at which the output voltage drops 2% below its
measured value with an applied input voltage of VR+2.0V.
MCP1804
DS20002200D-page 4 2009-2013 Microchip Technology Inc.
Line Regulation VOUT/(VOUT-
XVIN)
—(V
R+2V)VIN 28V, Note 1
— 0.05 0.10 %/V IOUT =5mA
— 0.15 0.30 %/V IOUT =13mA
Load Regulation VOUT/VOUT —I
L= 1.0 mA to 50 mA, Note 4
—50 90 mV1.8VVOUT 5.0V
— 110 175 mV 5.1V VOUT 12.0V
— 180 275 mV 12.1V VOUT 18.0V
Dropout Voltage
Note 1, Note 5
VDROPOUT —I
L=20mA
— 550 710 mV 1.8V VR1.9V
— 450 600 mV 2.0V VR2.1V
— 390 520 mV 2.2V VR2.4V
— 310 450 mV 2.5V VR2.9V
— 260 360 mV 3.0V VR3.9V
— 220 320 mV 4.0V VR4.9V
— 190 280 mV 5.0V VR6.4V
— 170 230 mV 6.5V VR8.0V
— 130 190 mV 8.1V VR10.0V
— 120 170 mV 10.1V VR18.0V
—I
L=100mA
— 2200 2700 mV 1.8V VR1.9V
— 1900 2600 mV 2.0V VR2.1V
— 1700 2200 mV 2.2V VR2.4V
— 1500 1900 mV 2.5V VR2.9V
— 1300 1700 mV 3.0V VR3.9V
— 1100 1500 mV 4.0V VR4.9V
— 1000 1300 mV 5.0V VR6.4V
— 800 1150 mV 6.5V VR8.0V
— 700 950 mV 8.1V VR10.0V
— 650 850 mV 10.1V VR18.0V
SHDN “H” Voltage VSHDN_H 1.1 — VIN VV
IN = 28V
SHDN “L” Voltage VSHDN_L 0—0.35VV
IN =28V
SHDN Current ISHDN -0.1 — 0.1 µA VIN =28V, V
SHDN = GND or
VIN
ELECTRICAL CHARACTERISTICS (CONTINUED)
Electrical Specifications: Unless otherwise specified, all limits are established for VIN =V
R+2.0V, Note 1,
COUT = 1 µF (X7R), CIN = 1 µF (X7R), VSHDN =V
IN, TA=+25°C
Parameters Sym. Min. Typ. Max. Units Conditions
Note 1: The minimum VIN must meet one condition: VIN (VR+2.0V).
2: VR is the nominal regulator output voltage with an input voltage of VIN =V
R+2.0V.
For example: VR= 1.8V, 2.5V, 3.0V, 3.3V, etc.
3: TCVOUT =(V
OUT-HIGH -V
OUT-LOW)*10
6 / (VR*Temperature), VOUT-HIGH = highest voltage measured
over the temperature range. VOUT-LOW = lowest voltage measured over the temperature range.
4: Load regulation is measured at a constant junction temperature using low duty cycle pulse testing.
Changes in output voltage due to heating effects are determined using thermal regulation specification
TCVOUT.
5: Dropout voltage is defined as the input to output differential at which the output voltage drops 2% below its
measured value with an applied input voltage of VR+2.0V.
2009-2013 Microchip Technology Inc. DS20002200D-page 5
MCP1804
Power Supply Ripple
Rejection Ratio
PSRR — 50 — dB f = 1 kHz, IL=20 mA,
VIN_AC =0.5V pk-pk,
CIN =0µF
Thermal Shutdown
Protection
TSD — 150 — °C TJ= 150°C
Thermal Shutdown
Hysteresis
TSD — 25 — °C
TEMPERATURE SPECIFICATIONS
Parameters Sym. Min. Typ. Max. Units Conditions
Temperature Ranges
Operating Temperature Range TA-40 — +85 °C
Operating Junction Temperature
Range TJ-40 — +125 °C
Storage Temperature Range TA-55 — +125 °C
Thermal Package Resistance
Thermal Resistance, 3LD SOT-89 JA — 180 — °C/W EIA/JEDEC® JESD51-7
FR-4 0.063 4-Layer Board
JC —52—
Thermal Resistance, 3LD SOT-223 JA —62—
°C/W EIA/JEDEC JESD51-7
FR-4 0.063 4-Layer Board
JC —15—
Thermal Resistance, 5LD SOT-23 JA — 256 — °C/W EIA/JEDEC JESD51-7
FR-4 0.063 4-Layer Board
JC —81—
Thermal Resistance, 5LD SOT-89 JA — 180 — °C/W EIA/JEDEC JESD51-7
FR-4 0.063 4-Layer Board
JC —52—
ELECTRICAL CHARACTERISTICS (CONTINUED)
Electrical Specifications: Unless otherwise specified, all limits are established for VIN =V
R+2.0V, Note 1,
COUT = 1 µF (X7R), CIN = 1 µF (X7R), VSHDN =V
IN, TA=+25°C
Parameters Sym. Min. Typ. Max. Units Conditions
Note 1: The minimum VIN must meet one condition: VIN (VR+2.0V).
2: VR is the nominal regulator output voltage with an input voltage of VIN =V
R+2.0V.
For example: VR= 1.8V, 2.5V, 3.0V, 3.3V, etc.
3: TCVOUT =(V
OUT-HIGH -V
OUT-LOW)*10
6 / (VR*Temperature), VOUT-HIGH = highest voltage measured
over the temperature range. VOUT-LOW = lowest voltage measured over the temperature range.
4: Load regulation is measured at a constant junction temperature using low duty cycle pulse testing.
Changes in output voltage due to heating effects are determined using thermal regulation specification
TCVOUT.
5: Dropout voltage is defined as the input to output differential at which the output voltage drops 2% below its
measured value with an applied input voltage of VR+2.0V.
MCP1804
DS20002200D-page 6 2009-2013 Microchip Technology Inc.
2.0 TYPICAL PERFORMANCE CURVES
Note: Unless otherwise indicated: COUT = 1 µF Ceramic (X7R), CIN = 1 µF Ceramic (X7R), TA=+25°C,
VIN =V
R+2.0V.
FIGURE 2-1: Output Voltage vs. Output
Current.
FIGURE 2-2: Output Voltage vs. Output
Current.
FIGURE 2-3: Output Voltage vs. Output
Current.
FIGURE 2-4: Output Voltage vs. Output
Current.
FIGURE 2-5: Output Voltage vs. Output
Current.
FIGURE 2-6: Output Voltage vs. Output
Current.
Note: The graphs and tables provided following this note are a statistical summary based on a limited number of
samples and are provided for informational purposes only. The performance characteristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
06
0.8
1.0
1.2
1.4
1.6
1.8
2.0
put Voltage (V)
TA= -40°C
TA= 25°C
TA= 85°C
0.0
0.2
0.4
0
.
6
0 50 100 150 200 250 300
Out
Output Current (mA)
VIN = SHDN = 4.8V
VR= 2.8V
2.0
3.0
4.0
5.0
6.0
t
put Voltage (V)
TA= -40°C
TA= 25°C
TA= 85°C
0.0
1.0
2.0
0 50 100 150 200 250 300
Ou
t
Output Current (mA)
VIN = SHDN = 8.0V
VR= 5V
6.0
8.0
10.0
12.0
14.0
p
ut Voltage (V)
TA= -40°C
TA= 25°C
TA= 85°C
0.0
2.0
4.0
0 50 100 150 200 250 300
Out
p
Output Current (mA)
VIN = SHDN = 15V
VR= 12 V
06
0.8
1.0
1.2
1.4
1.6
1.8
2.0
u
tput Voltage (V)
VIN = 2.8V
VIN = 3.8V
VIN = 4.8V
0.0
0.2
0.4
0
.
6
0 50 100 150 200 250 300
O
u
Output Current (mA)
VR= 1.8V
2.0
3.0
4.0
5.0
6.0
u
t Voltage (V)
VIN = 6V
VIN = 7V
VIN = 8V
0.0
1.0
2.0
0 50 100 150 200 250 300
Outp
u
Output Current (mA)
VR= 5.0V
6.0
8.0
10.0
12.0
14.0
ut Voltage (V)
VIN = 13V
VIN = 14V
VIN = 15V
0.0
2.0
4.0
0 50 100 150 200 250 300
Outp
Output Current (mA)
VR= 12V
2009-2013 Microchip Technology Inc. DS20002200D-page 7
MCP1804
Note: Unless otherwise indicated: COUT = 1 µF Ceramic (X7R), CIN = 1 µF Ceramic (X7R), TA=+25°C,
VIN =V
R+2.0V.
FIGURE 2-7: Output Voltage vs. Input
Voltage.
FIGURE 2-8: Output Voltage vs. Input
Voltage.
FIGURE 2-9: Output Voltage vs. Input
Voltage.
FIGURE 2-10: Output Voltage vs. Input
Voltage.
FIGURE 2-11: Output Voltage vs. Input
Voltage.
FIGURE 2-12: Output Voltage vs. Input
Voltage.
1.7
1.8
1.9
2.0
2.1
p
ut Voltage (V)
VR= 1.8V
IOUT = 1 mA
IOUT = 10 mA
IOUT = 30 mA
1.5
1.6
1.7
0.8 1.3 1.8 2.3 2.8 3.3 3.8
Out
p
Input Voltage (V)
4.8
5.0
5.2
5.4
5.6
5.8
6.0
p
ut Voltage (V)
VR= 5V
IOUT = 1 mA
IOUT = 10 mA
IOUT = 30 mA
4.0
4.2
4.4
4.6
4.0 4.5 5.0 5.5 6.0
Out
p
Input Voltage (V)
11 0
12.0
13.0
14.0
15.0
u
t Voltage (V)
VR= 12V
I
=1mA
9.0
10.0
11
.
0
10 11 12 13 14
Outp
u
Input Voltage (V)
I
OUT
=1mA
IOUT = 10 mA
IOUT = 30 mA
1.7
1.8
1.9
2.0
2.1
t Voltage (V)
VR= 1.8V
I
=1mA
1.5
1.6
1.7
4 8 12 16 20 24 28
Outpu
Input Voltage (V)
I
OUT
=1mA
IOUT = 10 mA
IOUT = 30 mA
4.8
5.0
5.2
5.4
5.6
5.8
6.0
p
ut Voltage (V)
VR= 5V
4.0
4.2
4.4
4.6
8 1216202428
Out
p
Input Voltage (V)
IOUT = 1 mA
IOUT = 10 mA
IOUT = 30 mA
11 0
12.0
13.0
14.0
15.0
p
ut Voltage (V)
VR= 12V
9.0
10.0
11
.
0
14 16 18 20 22 24 26 28
Out
p
Input Voltage (V)
IOUT = 1 mA
IOUT = 10 mA
IOUT = 30 mA
MCP1804
DS20002200D-page 8 2009-2013 Microchip Technology Inc.
Note: Unless otherwise indicated: COUT = 1 µF Ceramic (X7R), CIN = 1 µF Ceramic (X7R), TA=+25°C,
VIN =V
R+2.0V.
FIGURE 2-13: Dropout Voltage vs. Load
Current.
FIGURE 2-14: Dropout Voltage vs. Load
Current.
FIGURE 2-15: Dropout Voltage vs. Load
Current.
FIGURE 2-16: Supply Current vs. Input
Voltage.
FIGURE 2-17: Supply Current vs. Input
Voltage.
FIGURE 2-18: Supply Current vs. Input
Voltage.
1.5
2.0
2.5
3.0
3.5
4.0
o
ut Voltage (V)
VR= 1.8V
TA= 85°C
TA= 25°C
TA= -40°C
0.0
0.5
1.0
0 25 50 75 100 125 150
Drop
o
Output Current (mA)
1.5
2.0
2.5
3.0
3.5
4.0
p
out Voltage (V)
VR= 5V
TA= 85°C
TA= 25°C
TA= -40°C
0.0
0.5
1.0
0 25 50 75 100 125 150
Dro
p
Output Current (mA)
1.5
2.0
2.5
3.0
3.5
4.0
pout Voltage (V)
VR= 12V
TA= 85°C
TA= 25°C
TA= -40°C
0.0
0.5
1.0
0 25 50 75 100 125 150
Dro
Output Current (mA)
30
40
50
60
70
p
ply Current (µA)
VR= 1.8V
8
°
C
0
10
20
0 4 8 1216202428
Su
p
Input Voltage (V)
TA=
8
5
°
C
TA= 25°C
TA= -40°C
30
40
50
60
70
p
ply Current (µA)
VR= 5V
0
10
20
0 4 8 12 16 20 24 28
Su
p
Input Voltage (V)
TA= 85°C
TA= 25°C
TA= -40°C
30
40
50
60
70
p
ply Current (µA)
VR= 12V
T
A
= 85°C
0
10
20
0 4 8 12 16 20 24 28
Su
p
Input Voltage (V)
A
TA= 25°C
TA= -40°C
2009-2013 Microchip Technology Inc. DS20002200D-page 9
MCP1804
Note: Unless otherwise indicated: COUT = 1 µF Ceramic (X7R), CIN = 1 µF Ceramic (X7R), TA=+25°C,
VIN =V
R+2.0V.
FIGURE 2-19: Supply Current vs. Input
Voltage.
FIGURE 2-20: Supply Current vs. Input
Voltage.
FIGURE 2-21: Supply Current vs. Input
Voltage.
FIGURE 2-22: Output Voltage vs. Ambient
Temperature.
FIGURE 2-23: Output Voltage vs. Ambient
Temperature.
FIGURE 2-24: Output Voltage vs. Ambient
Temperature.
30
40
50
60
70
p
ply Current (µA)
VR= 1.8V
0
10
20
-40-200 20406080100
Su
p
Ambient Temperature (°C)
30
40
50
60
70
p
ply Current (µA)
VR= 5V
0
10
20
-40-200 20406080100
Su
p
Ambient Temperature (°C)
30
40
50
60
70
p
ply Current (µA)
VR= 12V
0
10
20
-40-20 0 20406080100
Su
p
Ambient Temperature (°C)
1.75
1.80
1.85
1.90
1.95
2.00
t
put Voltage (V)
VR= 1.8V
1.60
1.65
1.70
-50-250 255075100
Ou
t
Ambient Temperature (°C㸧
IOUT = 1 mA
IOUT = 10 mA
IOUT = 20 mA
4.95
5.00
5.05
5.10
5.15
5.20
u
tput Voltage (V)
VR= 5V
4.80
4.85
4.90
-50 -25 0 25 50 75 100
O
u
Ambient Temperature (°C㸧
IOUT =1 mA
IOUT = 10 mA
IOUT = 20 mA
11.9
12.0
12.1
12.2
12.3
12.4
12.5
tput Voltage (V)
VR= 12V
11.5
11.6
11.7
11.8
-50 -25 0 25 50 75 100
Ou
Ambient Temperature (°C㸧
IOUT = 1 mA
IOUT = 10 mA
IOUT = 20 mA
MCP1804
DS20002200D-page 10 2009-2013 Microchip Technology Inc.
Note: Unless otherwise indicated: COUT = 1 µF Ceramic (X7R), CIN = 1 µF Ceramic (X7R), TA=+25°C,
VIN =V
R+2.0V.
FIGURE 2-25: Dynamic Line Response.
FIGURE 2-26: Dynamic Line Response.
FIGURE 2-27: Dynamic Line Response.
FIGURE 2-28: Dynamic Line Response.
FIGURE 2-29: Dynamic Line Response.
FIGURE 2-30: Dynamic Line Response.
3.32
3.34
3.36
3.38
4.3
5.3
6.3
7.3
p
ut Voltage (V)
ut Voltage (V)
VOUT
VIN
VR= 3.3V
IOUT = 1 mA
3.26
3.28
3.30
1.3
2.3
3.3
Out
p
Inp
Time (1 ms/div)
5.02
5.04
5.06
5.08
6
7
8
9
p
ut Voltage (V)
u
t Voltage (V)
VOUT
VIN
VR= 5V
IOUT = 1 mA
4.96
4.98
5.00
3
4
5
Out
p
Inp
u
Time (1 ms/div)
12.02
12.04
12.06
12.08
13
14
15
16
p
ut Voltage (V)
u
t Voltage (V)
VOUT
VIN
VR= 12V
IOUT = 1 mA
11.96
11.98
12.00
10
11
12
Out
p
Inp
u
Time (1 ms/div)
3.32
3.34
3.36
3.38
4.3
5.3
6.3
7.3
p
ut Voltage (V)
u
t Voltage (V)
V
OUT
VIN
VR= 3.3V
IOUT = 30 mA
3.26
3.28
3.30
1.3
2.3
3.3
Out
p
Inp
u
5.02
5.04
5.06
5.08
6
7
8
9
t
put Voltage (V)
p
ut Voltage (V)
VOUT
VIN
VR= 5V
IOUT = 30 mA
4.96
4.98
5.00
3
4
5
Ou
t
In
p
Time (1 ms/div)
12.02
12.04
12.06
12.08
13
14
15
16
put Voltage (V)
p
ut Voltage (V)
VR= 12V
IOUT = 30 mA
VOUT
VIN
11.96
11.98
12.00
10
11
12
Out
In
p
Time (1 ms/div)
2009-2013 Microchip Technology Inc. DS20002200D-page 11
MCP1804
Note: Unless otherwise indicated: COUT = 1 µF Ceramic (X7R), CIN = 1 µF Ceramic (X7R), TA=+25°C,
VIN =V
R+2.0V.
FIGURE 2-31: Dynamic Load Response.
FIGURE 2-32: Dynamic Load Response.
FIGURE 2-33: Dynamic Load Response.
FIGURE 2-34: Start-up Response.
FIGURE 2-35: Start-up Response.
FIGURE 2-36: Start-up Response.
60
90
120
150
3.0
3.1
3.2
3.3
3.4
3.5
3.6
ut Current (mA)
p
ut Voltage (V)
VOUT
VR= 3.3V
0
30
2.6
2.7
2.8
2.9
Outp
Out
p
Time (1 ms/div)
IOUT
60
90
120
150
4.8
4.9
5.0
5.1
5.2
5.3
5.4
u
t Current (mA)
p
ut Voltage (V)
VOUT
VR= 5V
0
30
4.4
4.5
4.6
4.7
Outp
u
Out
p
Time (1 ms/div)
IOUT
60
90
120
150
11.4
11.6
11.8
12.0
12.2
12.4
12.6
u
t Current (mA)
p
ut Voltage (V)
VOUT
VR= 12V
0
30
60
10.6
10.8
11.0
11.2
11.4
Outp
u
Out
p
Time (1 ms/div)
IOUT
3
4
5
6
7
8
-
2
0
2
4
6
8
p
ut Voltage (V)
p
ut Voltage (V)
VOUT
VIN
0
1
2
3
-8
-6
-4
-
2
Out
p
In
p
Time (1 ms/div)
VR= 3.3V
IOUT = 1 mA
3
4
5
6
7
8
-
2
0
2
4
6
8
p
ut Voltage (V)
p
ut Voltage (V)
VOUT
VIN
0
1
2
3
-8
-6
-4
-
2
Out
p
In
p
Time (1 ms/div)
VR= 3.3V
IOUT = 30 mA
3
4
5
6
7
8
2
0
2
4
6
8
p
ut Voltage (V)
ut Voltage (V)
VOUT
VIN
0
1
2
3
-8
-6
-4
-
2
Out
p
Inp
Time (1 ms/div)
VR= 5.0V
IOUT = 1 mA
MCP1804
DS20002200D-page 12 2009-2013 Microchip Technology Inc.
Note: Unless otherwise indicated: COUT = 1 µF Ceramic (X7R), CIN = 1 µF Ceramic (X7R), TA=+25°C,
VIN =V
R+2.0V.
FIGURE 2-37: Start-up Response.
FIGURE 2-38: Start-up Response.
FIGURE 2-39: Start-up Response.
FIGURE 2-40: SHDN Response.
FIGURE 2-41: SHDN Response.
FIGURE 2-42: SHDN Response.
3
4
5
6
7
8
2
0
2
4
6
8
p
ut Voltage (V)
p
ut Voltage (V)
VOUT
VIN
0
1
2
3
-8
-6
-4
-
2
Out
p
In
p
Time (1 ms/div)
VR= 5.0V
IOUT = 30 mA
9
12
15
18
0
5
10
15
p
ut Voltage (V)
p
ut Voltage (V)
VOUT
VIN
0
3
6
-15
-10
-5
Out
p
In
p
Time (1 ms/div)
VR= 12V
IOUT = 1 mA
9
12
15
18
0
5
10
15
p
ut Voltage (V)
p
ut Voltage (V)
VIN
VOUT
0
3
6
-15
-10
-5
Out
p
In
p
Time (1 ms/div)
VR= 12V
IOUT = 30 mA
3
4
5
6
7
8
-
2
0
2
4
6
8
u
t Voltage (V)
N
Voltage (V)
VOUT
SHDN
0
1
2
3
-8
-6
-4
-
2
Outp
u
SHD
N
Time (1 ms/div)
VR= 3.3V
IOUT = 1 mA
3
4
5
6
7
8
2
0
2
4
6
8
u
t Voltage (V)
D
N Voltage (V)
VOUT
SHDN
0
1
2
3
-8
-6
-4
-
2
Outp
u
SH
D
Time (1 ms/div)
VR= 5V
IOUT = 1 mA
9
12
15
18
0
5
10
15
u
t Voltage (V)
D
N Voltage (V)
VOUT
SHDN
0
3
6
-15
-10
-5
Outp
u
SH
D
Time (1 ms/div)
VR= 12V
IOUT = 1 mA
2009-2013 Microchip Technology Inc. DS20002200D-page 13
MCP1804
Note: Unless otherwise indicated: COUT = 1 µF Ceramic (X7R), CIN = 1 µF Ceramic (X7R), TA=+25°C,
VIN =V
R+2.0V.
FIGURE 2-43: SHDN Response.
FIGURE 2-44: SHDN Response.
FIGURE 2-45: SHDN Response.
FIGURE 2-46: PSRR 3.3V @ 1 mA.
FIGURE 2-47: PSRR 5.0V @ 1 mA.
FIGURE 2-48: PSRR 12.0V @ 1 mA.
3
4
5
6
7
8
2
0
2
4
6
8
u
t Voltage (V)
D
N Voltage (V)
VOUT
SHDN
0
1
2
3
-8
-6
-4
-
2
Outp
u
SH
D
Time (1 ms/div)
VR= 3.3V
IOUT = 30 mA
3
4
5
6
7
8
2
0
2
4
6
8
p
ut Voltage (V)
D
N Voltage (V)
VOUT
SHDN
0
1
2
3
-8
-6
-4
-
2
Out
p
SH
D
Time (1 ms/div)
VR= 5V
IOUT = 30 mA
9
12
15
18
0
5
10
15
u
t Voltage (V)
D
N Voltage (V)
VOUT
SHDN
0
3
6
-15
-10
-5
Outp
u
SH
D
Time (1 ms/div)
VR= 12V
IOUT = 30 mA
30
40
50
60
70
80
90
PSRR (dB)
VOUT = 3.3V
CIN = 0
IOUT = 1 mA
VIN_AC = 0.5Vpk-pk
0
10
20
30
0.01 0.1 1 10 100
Frequency (kHz)
30
40
50
60
70
80
90
PSRR (dB)
VOUT = 5V
CIN = 0
IOUT = 1 mA
VIN_AC = 0.5Vpk-pk
0
10
20
30
0.01 0.1 1 10 100
Frequency (kHz)
30
40
50
60
70
80
90
P
SRR (dB)
VOUT = 12V
CIN = 0
IOUT = 1 mA
VIN_AC = 0.5Vpk-pk
0
10
20
30
0.01 0.1 1 10 100
P
Frequency (kHz)
MCP1804
DS20002200D-page 14 2009-2013 Microchip Technology Inc.
Note: Unless otherwise indicated: COUT = 1 µF Ceramic (X7R), CIN = 1 µF Ceramic (X7R), TA=+25°C,
VIN =V
R+2.0V.
FIGURE 2-49: PSRR 3.3V @ 30 mA.
FIGURE 2-50: PSRR 5.0V @ 30 mA.
FIGURE 2-51: PSRR 12V @ 30 mA.
FIGURE 2-52: Ground Current vs. Output
Current.
FIGURE 2-53: Ground Current vs. Output
Current.
FIGURE 2-54: Ground Current vs. Output
Current.
30
40
50
60
70
80
90
S
RR (dB)
VOUT = 3.3V
CIN = 0
IOUT = 30 mA
VIN_AC = 0.5Vpk-pk
0
10
20
30
0.01 0.1 1 10 100
P
S
Frequency (kHz)
30
40
50
60
70
80
90
P
SRR (dB)
VOUT = 5V
CIN = 0
IOUT = 30 mA
VIN_AC = 0.5Vpk-pk
0
10
20
30
0.01 0.1 1 10 100
P
Frequency (kHz)
30
40
50
60
70
80
90
PSRR (dB)
VOUT = 12V
CIN = 0
IOUT = 30 mA
VIN_AC = 0.5Vp-p
0
10
20
30
0.01 0.1 1 10 100
Frequency (kHz)
40
50
60
70
80
n
d Current (µA)
VOUT = 5V
VIN = 8V
20
30
40
0 25 50 75 100 125 150
Grou
n
Output Current (mA)
40
50
60
70
80
u
nd Current (µA)
VOUT = 12V
VIN = 15V
20
30
40
0 25 50 75 100 125 150
Gro
u
Output Current (mA)
60
70
80
90
100
n
d Current (µA)
VOUT = 15V
VIN = 18V
30
40
50
0 25 50 75 100 125 150
Grou
n
Output Current (mA)
2009-2013 Microchip Technology Inc. DS20002200D-page 15
MCP1804
Note: Unless otherwise indicated: COUT = 1 µF Ceramic (X7R), CIN = 1 µF Ceramic (X7R), TA=+25°C,
VIN =V
R+2.0V.
FIGURE 2-55: Output Noise vs. Frequency.
Output Noise (µV/Hz)
10.00
1.00
0.10
0.01
0.01 0.1 110 100
Frequency (kHz)
VR = 3.3V
VIN = 5.0V
IOUT = 50 mA
MCP1804
DS20002200D-page 16 2009-2013 Microchip Technology Inc.
3.0 PIN DESCRIPTIONS
The descriptions of the pins are listed in Tabl e 3- 1.
.
3.1 Unregulated Input Voltage (VIN)
Connect VIN to the input unregulated source voltage.
Like all low dropout linear regulators, low source
impedance is necessary for the stable operation of the
LDO. The amount of capacitance required to ensure
low source impedance will depend on the proximity of
the input source capacitors or battery type. For most
applications, 0.1 µF to 1.0 µF of capacitance will
ensure stable operation of the LDO circuit. The type of
capacitor used can be ceramic, tantalum or aluminum
electrolytic. The low ESR characteristics of the ceramic
will yield better noise and PSRR performance at high
frequency.
3.2 Ground Terminal (GND)
Regulator ground. Tie GND to the negative side of the
output and the negative side of the input capacitor.
Only the LDO bias current (50 to 60 µA typical) flows
out of this pin; there is no high current. The LDO output
regulation is referenced to this pin. Minimize voltage
drops between this pin and the negative side of the
load.
3.3 Shutdown Input (SHDN)
The SHDN input is used to turn the LDO output voltage
on and off. When the SHDN input is at a logic-high
level, the LDO output voltage is enabled. When the
SHDN input is pulled to a logic-low level, the LDO
output voltage is disabled and the LDO enters a low
quiescent current shutdown state where the typical
quiescent current is 0.01 µA. The SHDN pin does not
have an internal pull-up or pull-down resistor. The
SHDN pin must be connected to either VIN or GND to
prevent the device from becoming unstable.
3.4 Regulated Output Voltage (VOUT)
Connect VOUT to the positive side of the load and the
positive terminal of the output capacitor. The positive
side of the output capacitor should be physically
located as close to the LDO VOUT pin as is practical.
The current flowing out of this pin is equal to the DC
load current. For most applications, 0.1 µF to 1.0 µF of
capacitance will ensure stable operation of the LDO
circuit. Larger values may be used to improve dynamic
load response. The type of capacitor used can be
ceramic, tantalum or aluminum electrolytic. The low
ESR characteristics of the ceramic will yield better
noise and PSRR performance at high frequency.
3.5 No Connect (NC)
No internal connection. The pins marked NC are true
“No Connect” pins.
TABLE 3-1: MCP1804 PIN FUNCTION TABLE
MCP1804
Symbol Description
SOT-23-5 SOT-89-5 SOT-89-3 SOT-223-3
15 3 3V
IN Unregulated Supply Voltage
2 2, TAB 2, TAB 2, TAB GND Ground Terminal
34 ——NC No connection
43 ——
SHDN Shutdown
51 1 1V
OUT Regulated Voltage Output
2009-2013 Microchip Technology Inc. DS20002200D-page 17
MCP1804
4.0 DETAILED DESCRIPTION
4.1 Output Regulation
A portion of the LDO output voltage is fed back to the
internal error amplifier and compared with the precision
internal bandgap reference. The error amplifier output
will adjust the amount of current that flows through the
P-Channel pass transistor, thus regulating the output
voltage to the desired value. Any changes in input
voltage or output current will cause the error amplifier
to respond and adjust the output voltage to the target
voltage (refer to Figure 4-1).
4.2 Overcurrent
The MCP1804 internal circuitry monitors the amount of
current flowing through the P-Channel pass transistor.
In the event that the load current reaches the current
limiter level of 200 mA (typical), the current limiter
circuit will operate and the output voltage will drop. As
the output voltage drops, the internal current foldback
circuit will further reduce the output voltage causing the
output current to decrease. When the output is shorted,
a typical output current of 50 mA flows.
4.3 Shutdown
The SHDN input is used to turn the LDO output voltage
on and off. When the SHDN input is at a logic-high
level, the LDO output voltage is enabled. When the
SHDN input is pulled to a logic-low level, the LDO
output voltage is disabled and the LDO enters a low
quiescent current shutdown state where the typical
quiescent current is 0.01 µA. The SHDN pin does not
have an internal pull-up or pull-down resistor. Therefore
the SHDN pin must be pulled either high or low to
prevent the device from becoming unstable. The
internal device current will increase when the device is
operational and current flows through the pull-up or
pull-down resistor to the SHDN pin internal logic. The
SHDN pin internal logic is equivalent to an inverter
input.
4.4 Output Capacitor
The MCP1804 requires a minimum output capacitance
of 0.1 µF to 1.0 µF for output voltage stability. Ceramic
capacitors are recommended because of their size,
cost and environmental robustness qualities.
Aluminum-electrolytic and tantalum capacitors can be
used on the LDO output as well. The output capacitor
should be located as close to the LDO output as is
practical. Ceramic materials X7R and X5R have low
temperature coefficients.
Larger LDO output capacitors can be used with the
MCP1804 to improve dynamic performance and power
supply ripple rejection performance. Aluminum-
electrolytic capacitors are not recommended for low
temperature applications of < -25°C.
4.5 Input Capacitor
Low input source impedance is necessary for the LDO
output to operate properly. When operating from
batteries or in applications with long lead length
(> 10 inches) between the input source and the LDO,
some input capacitance is recommended. A minimum
of 0.1 µF to 1.0 µF is recommended for most
applications.
For applications that have output step load
requirements, the input capacitance of the LDO is very
important. The input capacitance provides the LDO
with a good local low-impedance source to pull the
transient currents from in order to respond quickly to
the output load step. For good step response
performance, the input capacitor should be of
equivalent or higher value than the output capacitor.
The capacitor should be placed as close to the input of
the LDO as is practical. Larger input capacitors will also
help reduce any high-frequency noise on the input and
output of the LDO and reduce the effects of any
inductance that exists between the input source
voltage and the input capacitance of the LDO.
4.6 Thermal Shutdown
The MCP1804 thermal shutdown circuitry protects the
device when the internal junction temperature reaches
the typical thermal limit value of +150°C. The thermal
limit shuts off the output drive transistor. Device output
will resume when the internal junction temperature falls
below the thermal limit value by an amount equal to the
thermal limit hysteresis value of +25°C.
MCP1804
DS20002200D-page 18 2009-2013 Microchip Technology Inc.
FIGURE 4-1: Block Diagram.
Thermal
+
-
VIN VOUT
GND
Error Amplifier
Voltage
Reference Current Limiter
Shutdown
Control
SHDN
Protection
*5-Pin Versions Only
*
2009-2013 Microchip Technology Inc. DS20002200D-page 19
MCP1804
5.0 FUNCTIONAL DESCRIPTION
The MCP1804 CMOS linear regulator is intended for
applications that need low current consumption while
maintaining output voltage regulation. The operating
continuous load of the MCP1804 ranges from 0 mA to
150 mA. The input operating voltage ranges from 2.0V
to 28.0V, making it capable of operating from a single
12V battery or single and multiple Li-Ion cell batteries.
5.1 Input
The input of the MCP1804 is connected to the source
of the P-Channel PMOS pass transistor. As with all
LDO circuits, a relatively low source impedance
(< 10) is needed to prevent the input impedance from
causing the LDO to become unstable. The size and
type of the capacitor needed depend heavily on the
input source type (battery, power supply) and the
output current range of the application. For most
applications, a 0.1 µF ceramic capacitor will be
sufficient to ensure circuit stability. Larger values can
be used to improve circuit AC performance.
5.2 Output
The maximum rated continuous output current for the
MCP1804 is 150 mA.
A minimum output capacitance of 0.1 µF to 1.0 µF is
required for small signal stability in applications that
have up to 150 mA output current capability. The
capacitor type can be ceramic, tantalum or aluminum
electrolytic.
MCP1804
DS20002200D-page 20 2009-2013 Microchip Technology Inc.
NOTES:
2009-2013 Microchip Technology Inc. DS20002200D-page 21
MCP1804
6.0 APPLICATION CIRCUITS AND
ISSUES
6.1 Typical Application
The MCP1804 is most commonly used as a voltage
regulator. Its low quiescent current and wide input
voltage make it ideal for Li-Ion and 12V battery-
powered applications.
FIGURE 6-1: Typical Application Circuit.
6.1.1 APPLICATION INPUT CONDITIONS
6.2 Power Calculations
6.2.1 POWER DISSIPATION
The internal power dissipation of the MCP1804 is a
function of input voltage, output voltage and output
current. The power dissipation resulting from the
quiescent current draw is so low it is insignificant
(50.0 µA x VIN). The following equation can be used to
calculate the internal power dissipation of the LDO.
EQUATION 6-1:
The maximum continuous operating temperature
specified for the MCP1804 is +85°C. To estimate the
internal junction temperature of the MCP1804, the total
internal power dissipation is multiplied by the thermal
resistance from junction to ambient (RJA). The thermal
resistance from junction to ambient for the SOT-23 pin
package is estimated at 256°C/W.
EQUATION 6-2:
The maximum power dissipation capability for a
package can be calculated given the junction-
to-ambient thermal resistance and the maximum
ambient temperature for the application. The following
equation can be used to determine the package
maximum internal power dissipation.
EQUATION 6-3:
EQUATION 6-4:
EQUATION 6-5:
Package Type = SOT-23
Input Voltage Range = 3.8V to 4.2V
VIN maximum = 4.6V
VOUT typical = 1.8V
IOUT = 50 mA maximum
GND
VOUT VIN
CIN
1µF
COUT
1µF Ceramic
VOUT VIN
4.2V
1.8V
IOUT
50 mA
Ceramic
SHDN NC
MCP1804
PLDO VIN MAX
VOUT MIN
–IOUT
=
Where:
PLDO = Internal power dissipation of the LDO
Pass device
VIN(MAX) = Maximum input voltage
VOUT(MIN) = Minimum output voltage of the LDO
TJMAX
PTOTAL R
JA
TAMAX
+=
Where:
TJ(MAX) = Maximum continuous junction
temperature
PTOTAL = Total power dissipation of the device
RJA = Thermal resistance from junction to
ambient
TA(MAX) = Maximum ambient temperature
PDMAX
TJMAX
TAMAX
–
R
JA
---------------------------------------------------=
Where:
PD(MAX) = Maximum power dissipation of the
device
TJ(MAX) = Maximum continuous junction
temperature
TA(MAX) = Maximum ambient temperature
RJA = Thermal resistance from junction to
ambient
TJRISE
PDMAX
R
JA
=
Where:
TJ(RISE) = Rise in the device’s junction
temperature over the ambient
temperature
PD(MAX) = Maximum power dissipation of the
device
RJA = Thermal resistance from junction to
ambient
TJTJRISE
TA
+=
Where:
TJ= Junction Temperature
TJ(RISE) = Rise in the device’s junction
temperature over the ambient
temperature
TA= Ambient temperature
MCP1804
DS20002200D-page 22 2009-2013 Microchip Technology Inc.
6.3 Voltage Regulator
Internal power dissipation, junction temperature rise,
junction temperature and maximum power dissipation
are calculated in the following example. The power
dissipation resulting from ground current is small
enough to be neglected.
6.3.1 POWER DISSIPATION EXAMPLE
6.3.1.1 Device Junction Temperature Rise
The internal junction temperature rise is a function of
internal power dissipation and the thermal resistance
from junction to ambient for the application. The thermal
resistance from junction to ambient (RJA) is derived
from an EIA/JEDEC standard for measuring thermal
resistance for small surface mount packages. The EIA/
JEDEC specification is JESD51-7, “High Effective
Thermal Conductivity Test Board for Leaded Surface
Mount Packages”. The standard describes the test
method and board specifications for measuring the
thermal resistance from junction to ambient. The actual
thermal resistance for a particular application can vary
depending on many factors, such as copper area and
thickness. Refer to AN792, “A Method to Determine
How Much Power a SOT23 Can Dissipate in an
Application” (DS00792), for more information regarding
this subject.
6.3.1.2 Junction Temperature Estimate
To estimate the internal junction temperature, the
calculated temperature rise is added to the ambient or
offset temperature. For this example, the worst-case
junction temperature is estimated below.
Maximum Package Power Dissipation at +25°C
Ambient Temperature (minimum PCB footprint)
6.4 Voltage Reference
The MCP1804 can be used not only as a regulator, but
also as a low quiescent current voltage reference. In
many microcontroller applications, the initial accuracy
of the reference can be calibrated using production test
equipment or by using a ratio measurement. When the
initial accuracy is calibrated, the thermal stability and
line regulation tolerance are the only errors introduced
by the MCP1804 LDO. The low-cost, low quiescent
current and small ceramic output capacitor are all
advantages when using the MCP1804 as a voltage
reference.
FIGURE 6-2: Using the MCP1804 as a
Voltage Reference.
6.5 Pulsed Load Applications
For some applications, there are pulsed load current
events that may exceed the specified 150 mA
maximum specification of the MCP1804. The internal
current limit of the MCP1804 will prevent high peak
load demands from causing non-recoverable damage.
The 150 mA rating is a maximum average continuous
rating. As long as the average current does not exceed
150 mA or the maximum power dissipation of the
packaged device, pulsed higher load currents can be
applied to the MCP1804. The typical current limit for
the MCP1804 is 200 mA (TA=+25°C).
Package:
Package Type = SOT-23
Input Voltage:
VIN = 3.8V to 4.6V
LDO Output Voltages and Currents:
VOUT =1.8V
IOUT =50mA
Maximum Ambient Temperature:
TA(MAX) =+40°C
Internal Power Dissipation:
Internal Power dissipation is the product of the LDO
output current times the voltage across the LDO
(VIN to VOUT).
PLDO(MAX) =(V
IN(MAX) -V
OUT(MIN))xI
OUT(MAX)
PLDO(MAX) = (4.6V - (0.98 x 1.8V)) x 50 mA
PLDO(MAX) = 141.8 milli-Watts
TJ(RISE) =P
TOTAL xRJA
TJ(RISE) = 141.8 milli-Watts x 256.0°C/Watt
TJ(RISE) =36.3°C
TJ =T
J(RISE) +T
A(MAX)
TJ = 76.3°C
SOT-23 (256°C/Watt = RJA):
PD(MAX) = (125°C - 25°C) / 256°C/W
PD(MAX) = 390 milli-Watts
SOT-89 (180°C/Watt = RJA):
PD(MAX) = (125°C - 25°C) / 180°C/W
PD(MAX) = 555 milli-Watts
PICmicro®
GND
VIN
CIN
1µF COUT
1µF
Bridge Sensor
VOUT VREF
AD0
AD1
Ratio Metric Reference
50 µA Bias Microcontroller
MCP1804
2009-2013 Microchip Technology Inc. DS20002200D-page 23
MCP1804
7.0 PACKAGING INFORMATION
7.1 Package Marking Information
Legend: XX...X Customer-specific information
Y Year code (last digit of calendar year)
YY Year code (last 2 digits of calendar year)
WW Week code (week of January 1 is week ‘01’)
NNN Alphanumeric traceability code
Pb-free JEDEC® designator for Matte Tin (Sn)
*This package is Pb-free. The Pb-free JEDEC designator ( )
can be found on the outer packaging for this package.
Note: In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information.
3
e
3
e
3-Lead SOT-223 Example
84K25
Part Number Code
MCP1804T-1802I/DB 84KXX
MCP1804T-2502I/DB 84TXX
MCP1804T-3002I/DB 84ZXX
MCP1804T-3302I/DB 852XX
MCP1804T-5002I/DB 85MXX
MCP1804T-A002I/DB 879XX
MCP1804T-C002I/DB 87ZXX
3-Lead SOT-89 Example
Part Number Code
MCP1804T-1802I/MB 84KXX
MCP1804T-2502I/MB 84TXX
MCP1804T-3002I/MB 84ZXX
MCP1804T-3302I/MB 852XX
MCP1804T-5002I/MB 85MXX
MCP1804T-A002I/MB 879XX
MCP1804T-C002I/MB 87ZXX
84K
25
5-Lead SOT-23 Example
Part Number Code
MCP1804T-1802I/OT 80KXX
MCP1804T-2502I/OT 80TXX
MCP1804T-3002I/OT 80ZXX
MCP1804T-3302I/OT 812XX
MCP1804T-5002I/OT 81MXX
MCP1804T-A002I/OT 839XX
MCP1804T-C002I/OT 83ZXX
80K25
MCP1804
DS20002200D-page 24 2009-2013 Microchip Technology Inc.
5-Lead SOT-89 Example
80K
25
Part Number Code
MCP1804T-1802I/MT 80KXX
MCP1804T-2502I/MT 80TXX
MCP1804T-3002I/MT 80ZXX
MCP1804T-3302I/MT 812XX
MCP1804T-5002I/MT 81MXX
MCP1804T-A002I/MT 839XX
MCP1804T-C002I/MT 83ZXX
2009-2013 Microchip Technology Inc. DS20002200D-page 25
MCP1804
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DS20002200D-page 26 2009-2013 Microchip Technology Inc.
2009-2013 Microchip Technology Inc. DS20002200D-page 27
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DS20002200D-page 28 2009-2013 Microchip Technology Inc.
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
2009-2013 Microchip Technology Inc. DS20002200D-page 29
MCP1804
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DS20002200D-page 30 2009-2013 Microchip Technology Inc.
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
2009-2013 Microchip Technology Inc. DS20002200D-page 31
MCP1804
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DS20002200D-page 32 2009-2013 Microchip Technology Inc.
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
2009-2013 Microchip Technology Inc. DS20002200D-page 33
MCP1804
APPENDIX A: REVISION HISTORY
Revision D (October 2013)
The following is the list of modifications:
1. Added operating junction temperature range in
Temperature Specifications.
2. Updated the maximum package power
dissipation values in Section 6.3.1.2, Junction
Temperature Estimate.
3. Updated package specification drawings to
reflect all view.
4. Minor typographical changes.
Revision C (June 2011)
The following is the list of modifications:
5. Added seven new characterization graphs to
Section 2.0, Typical Performance Curves
(Figures 2-49 - 2-55).
6. Changed layout of Table 3-1. Added separate
column for SOT-223-3.
7. Updated Package Marking drawings and
examples in the Packaging Information section.
8. Added new voltage option to Product
Identification System table.
Revision B (November 2009)
The following is the list of modifications:
• Electrical characteristics, SHDN “H” Voltage item:
Changed to SHDN “L” Voltage.
Revision A (September 2009)
• Original Release of this Document.
MCP1804
DS20002200D-page 34 2009-2013 Microchip Technology Inc.
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
PART NO. X/XX
-XX
Voltage PackageTemperature
Range
Device
Device: MCP1804T: LDO Voltage Regulator (Tape and Reel)
Voltage Options: 18 = 1.8V
25 = 2.5V
30 = 3.0V
33 = 3.3V
50 = 5.0V
A0 = 10V
C0 = 12V
J0 = 18V
Output Voltage
Tolerance:
02 = ±2%
Temperature
Range:
I= -40C to +85C (Industrial)
Package: DB = 3-lead Plastic Small Outline Transistor (SOT-223)
MB = 3-lead Plastic Small Outline Transistor (SOT-89)
MT = 5-lead Plastic Small Outline Transistor (SOT-89)
OT = 5-lead Plastic Small Outline Transistor (SOT-23)
Examples:
a) MCP1804T-1802I/OT: 1.8V, 5-LD SOT-23
b) MCP1804T-2502I/OT: 2.5V, 5-LD SOT-23
c) MCP1804T-3002I/OT: 3.0V, 5-LD SOT-23
d) MCP1804T-3302I/OT: 3.3V, 5-LD SOT-23
e) MCP1804T-5002I/OT: 5.0V, 5-LD SOT-23
f) MCP1804T-A002I/OT: 10V, 5-LD SOT-23
g) MCP1804T-C002I/OT: 12V, 5-LD SOT-23
a) MCP1804T-1802I/MB: 1.8V, 3-LD SOT-89
b) MCP1804T-2502I/MB: 2.5V, 3-LD SOT-89
c) MCP1804T-3002I/MB: 3.0V, 3-LD SOT-89
d) MCP1804T-3302I/MB: 3.3V, 3-LD SOT-89
e) MCP1804T-5002I/MB: 5.0V, 3-LD SOT-89
f) MCP1804T-A002I/MB: 10V, 3-LD SOT-89
g) MCP1804T-C002I/MB: 12V, 3-LD SOT-89
a) MCP1804T-1802I/MT: 1.8V, 5-LD SOT-89
b) MCP1804T-2502I/MT: 2.5V, 5-LD SOT-89
c) MCP1804T-3002I/MT: 3.0V, 5-LD SOT-89
d) MCP1804T-3302I/MT: 3.3V, 5-LD SOT-89
e) MCP1804T-5002I/MT: 5.0V, 5-LD SOT-89
f) MCP1804T-A002I/MT: 10V, 5-LD SOT-89
g) MCP1804T-C002I/MT: 12V, 5-LD SOT-89
a) MCP1804T-1802I/DB: 1.8V, 3-LD SOT-223
b) MCP1804T-2502I/DB: 2.5V, 3-LD SOT-223
c) MCP1804T-3002I/DB: 3.0V, 3-LD SOT-223
d) MCP1804T-3302I/DB: 3.3V, 3-LD SOT-223
e) MCP1804T-5002I/DB: 5.0V, 3-LD SOT-223
f) MCP1804T-A002I/DB: 10V, 3-LD SOT-223
g) MCP1804T-C002I/DB: 12V, 3-LD SOT-223
T
Tape
and
Reel
XX
Output
Voltage
Tolerance
2009-2013 Microchip Technology Inc. DS20002200D-page 35
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights.
Trademarks
The Microchip name and logo, the Microchip logo, dsPIC,
FlashFlex, KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro,
PICSTART, PIC32 logo, rfPIC, SST, SST Logo, SuperFlash
and UNI/O are registered trademarks of Microchip Technology
Incorporated in the U.S.A. and other countries.
FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor,
MTP, SEEVAL and The Embedded Control Solutions
Company are registered trademarks of Microchip Technology
Incorporated in the U.S.A.
Silicon Storage Technology is a registered trademark of
Microchip Technology Inc. in other countries.
Analog-for-the-Digital Age, Application Maestro, BodyCom,
chipKIT, chipKIT logo, CodeGuard, dsPICDEM,
dsPICDEM.net, dsPICworks, dsSPEAK, ECAN,
ECONOMONITOR, FanSense, HI-TIDE, In-Circuit Serial
Programming, ICSP, Mindi, MiWi, MPASM, MPF, MPLAB
Certified logo, MPLIB, MPLINK, mTouch, Omniscient Code
Generation, PICC, PICC-18, PICDEM, PICDEM.net, PICkit,
PICtail, REAL ICE, rfLAB, Select Mode, SQI, Serial Quad I/O,
Total Endurance, TSHARC, UniWinDriver, WiperLock, ZENA
and Z-Scale are trademarks of Microchip Technology
Incorporated in the U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
GestIC and ULPP are registered trademarks of Microchip
Technology Germany II GmbH & Co. KG, a subsidiary of
Microchip Technology Inc., in other countries.
All other trademarks mentioned herein are property of their
respective companies.
© 2009-2013, Microchip Technology Incorporated, Printed in
the U.S.A., All Rights Reserved.
Printed on recycled paper.
ISBN: 978-1-62077-590-5
Note the following details of the code protection feature on Microchip devices:
• Microchip products meet the specification contained in their particular Microchip Data Sheet.
• Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
• There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
• Microchip is willing to work with the customer who is concerned about the integrity of their code.
• Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Microchip received ISO/TS-16949:2009 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
QUALITY MANAGEMENT S
YSTEM
CERTIFIED BY DNV
== ISO/TS 16949 ==
DS20002200D-page 36 2009-2013 Microchip Technology Inc.
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08/20/13
