2018 Microchip Technology Inc. DS20006046A-page 1
MCP14A0303/4/5
Features
• High-Peak Output Current: 3A (typical)
• Wide Input Supply Voltage Operating Range:
- 4.5 to 18V
• Low Shoot-Through/Cross-Conduction Current in
Output Stage
• High Capacitive Load Drive Capability:
- 1800 pF in 12 ns (typical)
• Short Delay Times: 17 ns (tD1), 21 ns (tD2) (typical)
• Low Supply Current: 620 µA (typical)
• Low-Voltage Threshold Input and Enable with
Hysteresis
• Latch-Up Protected: Withstands 500 mA Reverse
Current
• Space-Saving Packages:
- 8-Lead MSOP
- 8-Lead SOIC
- 8-Lead 2 x 3 TDFN
Applications
• Switch Mode Power Supplies
• Pulse Transformer Drive
• Line Drivers
• Level Translator
• Motor and Solenoid Drive
General Description
The MCP14A0303/4/5 devices are high-speed dual
MOSFET drivers that are capable of providing up to 3A
of peak current while operating from a single 4.5V to
18V supply. There are three output configurations
available: dual inverting (MCP14A0303), dual
noninverting (MCP14A0304) and complementary
(MCP14A0305). These devices feature low
shoot-through current, matched rise and fall times, and
short propagation delays, which make them ideal for
high switching frequency applications.
The MCP14A0303/4/5 family of devices offers
enhanced control with enable functionality. The
active-high Enable pins can be driven low to drive the
corresponding outputs of the MCP14A0303/4/5 low,
regardless of the status of the input pins. Integrated
pull-up resistors allow the user to leave the Enable pins
floating for standard operation.
These devices are highly latch-up resistant under any
condition within their power and voltage ratings. They
can accept up to 500 mA of reverse current being
forced back into their outputs without damage or logic
upset. All terminals are fully protected against
electrostatic discharge (ESD) up to 2 kV (HBM) and
200V (MM).
Package Types
6
1
2
3
8
INA
ENA
7
GND
4 5
OUTA/OUTA/OUTA
VDD
ENB
INB OUTB/OUTB/OUTB
* Includes Exposed Thermal Pad (EP); see Table 3-1.
MCP14A0303/4/5
8-pin MSOP/SOIC
MCP14A0303/4/5
2 x 3 TDFN*
7
1
2
6
3
8
EP
4 5
ENA ENB
INA
GND
INB
OUTA/OUTA/OUTA
VDD
OUTB/OUTB/OUTB
3A Dual MOSFET Driver
with Low Threshold Input and Enable
MCP14A0303/4/5
DS20006046A-page 2 2018 Microchip Technology Inc.
Functional Block Diagram
MCP14A0303: Dual Inverting
MCP14A0304: Dual Noninverting
MCP14A0305: Complementary: One Inverting, One Noninverting
No ni nve rtin g
Enable
Input
VDD
Output
Inverting
VREF
VREF
VDD
GND
Internal
Pull-Up
GND
2018 Microchip Technology Inc. DS20006046A-page 3
MCP14A0303/4/5
1.0 ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings †
VDD, Supply Voltage..................................................................................................................................................+20V
VIN, Input Voltage............................................................................................................... (VDD + 0.3V) to (GND – 0.3V)
VEN, Enable Voltage........................................................................................................... (VDD + 0.3V) to (GND – 0.3V)
Package Power Dissipation (TA=+50°C)
8L MSOP .................................................................................................................................................0.63W
8L SOIC ...................................................................................................................................................1.00W
8L 2 x 3 TDFN..........................................................................................................................................1.85W
ESD Protection on all pins .............................................................................................................................2 kV (HBM)
ESD Protection on all pins ............................................................................................................................. 200V (MM)
† Notice: Stresses above those listed under “Maximum ratings” may cause permanent damage to the device. This is
a stress rating only and functional operation of the device at those or any other conditions above those indicated in
the operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods
may affect device reliability.
MCP14A0303/4/5
DS20006046A-page 4 2018 Microchip Technology Inc.
DC CHARACTERISTICS
Electrical Specifications: Unless otherwise noted, TA= +25°C, with 4.5V VDD 18V.
Parameters Sym. Min. Typ. Max. Units Conditions
Input
Input Voltage Range VIN GND – 0.3V — VDD +0.3 V
Logic ‘1’ High Input Voltage VIH 2.0 1.6 — V
Logic ‘0’ Low Input Voltage VIL —1.30.8V
Input Voltage Hysteresis VHYST(IN) —0.3— V
Input Current IIN –1 — +1 µA 0V VIN VDD
Enable
Enable Voltage Range VEN GND – 0.3V — VDD +0.3 V
Logic ‘1’ High Enable Voltage VEH 2.0 1.6 — V
Logic ‘0’ Low Enable Voltage VEL —1.30.8V
Enable Voltage Hysteresis VHYST(EN) —0.3— V
Enable Pin Pull-Up Resistance RENBL —1.8—MΩVDD = 18V, ENB = AGND
Enable Input Current IEN —12—µAV
DD = 18V, ENB = AGND
Propagation Delay tD3 —1723nsV
DD = 18V, VEN =5V,
see Figure 4-3 (Note 1)
Propagation Delay tD4 —2126nsV
DD = 18V, VEN =5V,
see Figure 4-3 (Note 1)
Output
High Output Voltage VOH VDD –0.025 — — V I
OUT =0A
Low Output Voltage VOL ——0.025VI
OUT =0A
Output Resistance, High ROH —2.44 ΩIOUT =10mA, V
DD =18V
Output Resistance, Low ROL —1.63 ΩIOUT =10mA, V
DD =18V
Peak Output Current IPK —3—AV
DD = 18V (Note 1)
Latch-Up Protection Withstand
Reverse Current
IREV 0.5 — — A Duty cycle 2%, t 300 µs
(Note 1)
Switching Time (Note 1)
Rise Time tR—1217nsV
DD = 18V, CL=1800pF,
see Figure 4-1, Figure 4-2
Fall Time tF—1217nsV
DD = 18V, CL=1800pF,
see Figure 4-1, Figure 4-2
Delay Time tD1 —1723nsV
DD = 18V, VIN =5V,
see Figure 4-1, Figure 4-2
tD2 —2126nsV
DD = 18V, VIN =5V,
see Figure 4-1, Figure 4-2
Power Supply
Supply Voltage VDD 4.5 — 18 V
Power Supply Current
IDD — 620 900 µA VINA/B =3V, V
ENA/B = 3V
IDD — 620 900 µA VINA/B =0V, V
ENA/B = 3V
IDD — 620 900 µA VINA/B =3V, V
ENA/B = 0V
IDD — 620 900 µA VINA/B =0V, V
ENA/B = 0V
Note 1: Tested during characterization, not production tested.
2018 Microchip Technology Inc. DS20006046A-page 5
MCP14A0303/4/5
DC CHARACTERISTICS (OVER OPERATING TEMPERATURE RANGE)
Electrical Specifications: Unless otherwise indicated, over the operating range with 4.5V VDD 18V.
Parameters Sym. Min. Typ. Max. Units Conditions
Input
Input Voltage Range VIN GND – 0.3V — VDD +0.3 V
Logic ‘1’ High Input Voltage VIH 2.0 1.6 — V
Logic ‘0’ Low Input Voltage VIL —1.30.8V
Input Voltage Hysteresis VHYST(IN) —0.3—V
Input Current IIN –10 — +10 µA 0V VIN VDD
Enable
Enable Voltage Range VEN GND – 0.3V — VDD +0.3 V
Logic ‘1’ High Enable Voltage VEH 2.0 1.6 — V
Logic ‘0’ Low Enable Voltage VEL —1.30.8V
Enable Voltage Hysteresis VHYST(EN) —0.3—V
Enable Input Current IEN —12—µAV
DD = 18V, ENB = AGND
Propagation Delay tD3 —2127nsV
DD = 18V, VEN =5V,
TA= +125°C, see Figure 4-3
(Note 1)
Propagation Delay tD4 —2531nsV
DD = 18V, VEN =5V,
TA= +125°C, see Figure 4-3
(Note 1)
Output
High Output Voltage VOH VDD – 0.025 — — V DC Test
Low Output Voltage VOL — — 0.025 V DC Test
Output Resistance, High ROH ——5ΩIOUT =10mA, V
DD =18V
Output Resistance, Low ROL ——4ΩIOUT =10mA, V
DD =18V
Note 1: Tested during characterization, not production tested.
MCP14A0303/4/5
DS20006046A-page 6 2018 Microchip Technology Inc.
Switching Time (Note 1)
Rise Time tR—1419nsV
DD = 18V, CL=1800pF,
TA= +125°C, see Figure 4-1,
Figure 4-2
Fall Time tF—1419nsV
DD = 18V, CL=1800pF,
TA= +125°C, see Figure 4-1,
Figure 4-2
Delay Time tD1 —2127nsV
DD = 18V, VIN =5V, T
A= +125°C,
see Figure 4-1, Figure 4-2
tD2 —2531nsV
DD = 18V, VIN =5V, T
A= +125°C,
see Figure 4-1, Figure 4-2
Power Supply
Supply Voltage VDD 4.5 — 18 V
Power Supply Current
IDD ——1100µAV
INA/B =3V, V
ENA/B = 3V
IDD ——1100µAV
INA/B =0V, V
ENA/B = 3V
IDD ——1100µAV
INA/B =3V, V
ENA/B = 0V
IDD ——1100µAV
INA/B =0V, V
ENA/B = 0V
TEMPERATURE CHARACTERISTICS
Electrical Specifications: Unless otherwise noted, all parameters apply with 4.5V VDD 18V
Parameters Sym. Min. Typ. Max. Units Comments
Temperature Ranges
Specified Temperature Range TA–40 — +125 °C
Maximum Junction Temperature TJ——+150°C
Storage Temperature Range TA–65 — +150 °C
Package Thermal Resistances
Junction-to-Ambient Thermal Resistance, 8LD MSOP JA —158—°C/WNote 1
Junction-to-Ambient Thermal Resistance, 8LD SOIC JA —100—°C/WNote 1
Junction-to-Ambient Thermal Resistance, 8LD TDFN JA —54—°C/WNote 1
Junction-to-Top Characterization Parameter, 8LD MSOP JT —2.4—°C/WNote 1
Junction-to-Top Characterization Parameter, 8LD SOIC JT —5.9—°C/WNote 1
Junction-to-Top Characterization Parameter, 8LD TDFN JT —0.5—°C/WNote 1
Junction-to-Board Characterization Parameter, 8LD MSOP JB —115—°C/WNote 1
Junction-to-Board Characterization Parameter, 8LD SOIC JB —65—°C/WNote 1
Junction-to-Board Characterization Parameter, 8LD TDFN JB —24—°C/WNote 1
Note 1: Parameter is determined using High K 2S2P 4-Layer board as described in JESD 51-7, as well as JESD
51-5 for packages with exposed pads.
DC CHARACTERISTICS (OVER OPERATING TEMPERATURE RANGE)
Electrical Specifications: Unless otherwise indicated, over the operating range with 4.5V VDD 18V.
Parameters Sym. Min. Typ. Max. Units Conditions
Note 1: Tested during characterization, not production tested.
2018 Microchip Technology Inc. DS20006046A-page 7
MCP14A0303/4/5
2.0 TYPICAL PERFORMANCE CURVES
Note: Unless otherwise indicated, TA= +25°C with 4.5V VDD 18V.
FIGURE 2-1: Rise Time vs. Supply
Voltage.
FIGURE 2-2: Rise Time vs. Capacitive
Load.
FIGURE 2-3: Fall Time vs. Supply
Voltage.
FIGURE 2-4: Fall Time vs. Capacitive
Load.
FIGURE 2-5: Rise an d Fa ll Time vs.
Temperature.
FIGURE 2-6: Crossover Current vs.
Supply Voltage.
Note: The graphs and tables provided following this note are a statistical summary based on a limited number of
samples and are provided for informational purposes only. The performance characteristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
0
20
40
60
80
100
120
140
160
4 6 8 10 12 14 16 18
Rise Time (ns)
Supply Voltage (V)
10000 pF
6800 pF
4700 pF
3300 pF
1800 pF
1000 pF
0
20
40
60
80
100
120
140
160
1000
10000
Rise Time (ns)
Capacitive Load (pF)
18V
12V
5V
0
20
40
60
80
100
4 6 8 10 12 14 16
18
Fall Time (ns)
Supply Voltage (V)
10000 pF
6800 pF
4700 pF
3300 pF
1800 pF
1000 pF
0
10
20
30
40
50
60
70
80
90
100
1000
10000
Fall Time (ns)
Capacitive Load (pF)
18V
12V
5V
8
10
12
14
16
18
20
22
24
26
-40 -25 -10 5 20 35 50 65 80 95 110
125
Time (ns)
Temperature (°C)
tF, 3600 pF
tR, 3600 pF
tR, 1800 pF
tF, 1800 pF
10
100
1000
10000
4681012141618
Crossover Current (μA)
Supply Voltage (V)
1 MHz
500 kHz
200 kHz
100 kHz
50 kHz
MCP14A0303/4/5
DS20006046A-page 8 2018 Microchip Technology Inc.
Note: Unless otherwise indicated, TA= +25°C with 4.5V VDD 18V.
FIGURE 2-7: Input Propagation Delay vs.
Supply Voltage.
FIGURE 2-8: Input Propagation Delay
Time vs. Input Amplitude.
FIGURE 2-9: Input Propagation Delay vs.
Temperature.
FIGURE 2-10: Enable Propagation Delay
vs. Supply Voltage.
FIGURE 2-11: Enable Propagation Delay
Time vs. Enable Voltage Amplitude.
FIGURE 2-12: Enable Propagation Delay
vs. Temperature.
10
15
20
25
30
35
40
45
50
4 6 8 10 12 14 16
18
Input Propagation Delay (ns)
Supply Voltage (V)
VIN = 5V
tD1
tD2
10
15
20
25
2 4 6 8 10 12 14 16
18
Input Propogation Delay (ns)
Input Voltage Amplitude (V)
tD2
tD1
VDD = 18V
12
14
16
18
20
22
24
26
-40 -25 -10 5 20 35 50 65 80 95 110
125
Input Propagation Delay (ns)
Temperature (°C)
V
DD
= 18V
VIN = 5V
tD2
tD1
10
15
20
25
30
35
40
45
50
4 6 8 10 12 14 16
18
Enable Propagation Delay (ns)
Supply Voltage (V)
VEN = 5V
tD3
tD4
10
15
20
25
30
246810121416
18
Enable Propagation Delay (ns)
Enable Voltage Amplitude (V)
tD4
tD3
VDD = 18V
14
16
18
20
22
24
26
-40 -25 -10 5 20 35 50 65 80 95 110
125
Enable Propagation Delay (ns)
Temperature (°C)
tD4
tD3
VDD = 18V
VEN = 5V
2018 Microchip Technology Inc. DS20006046A-page 9
MCP14A0303/4/5
Note: Unless otherwise indicated, TA= +25°C with 4.5V VDD 18V.
FIGURE 2-13: Quiescent Supply Current
vs. Supply Voltage.
FIGURE 2-14: Quiescent Supply Current
vs. Temperature.
FIGURE 2-15: Input Threshold vs.
Temperature.
FIGURE 2-16: Input Threshold vs. Supply
Voltage.
FIGURE 2-17: Enable Threshold vs.
Temperature.
FIGURE 2-18: Enable Threshold vs.
Supply Voltage.
550
600
650
4 6 8 10 12 14 16
18
Quiescent Current (μA)
Supply Voltage (V)
500
550
600
650
700
750
800
-40 -25 -10 5 20 35 50 65 80 95 110
125
Quiescent Current (μA)
Temperature (°C)
VDD = 18V
1
1.1
1.2
1.3
1.4
1.5
1.6
1.7
1.8
-40 -25 -10 5 20 35 50 65 80 95 110
125
Input Threshold (V)
Temperature (°C)
VDD = 18V
VIL
VIH
1.00
1.10
1.20
1.30
1.40
1.50
1.60
1.70
1.80
4 6 8 10 12 14 16
18
Input Threshold (V)
Supply Voltage (V)
VIL
VIH
1
1.1
1.2
1.3
1.4
1.5
1.6
1.7
1.8
-40 -25 -10 5 20 35 50 65 80 95 110
125
Enable Threshold (V)
Temperature (°C)
VDD = 18V
VEL
VEH
1
1.1
1.2
1.3
1.4
1.5
1.6
1.7
1.8
4 6 8 1012141618
Enable Threshold (V)
Supply Voltage (V)
VEL
VEH
MCP14A0303/4/5
DS20006046A-page 10 2018 Microchip Technology Inc.
Note: Unless otherwise indicated, TA= +25°C with 4.5V VDD 18V.
FIGURE 2-19: Output Resistance (Output
High) vs. Supply V oltage.
FIGURE 2-20: Output Resistance (Output
Low) vs. Supply V oltage.
FIGURE 2-21: Supply Current vs.
Capacitive Load (VDD = 18V).
FIGURE 2-22: Supply Current vs.
Capacitive Load (VDD = 12V).
FIGURE 2-23: Supply Current vs.
Capacitive Load (VDD = 6V).
FIGURE 2-24: Supply Current vs.
Frequency (VDD = 18V).
2.0
3.0
4.0
5.0
6.0
4 6 8 10121416
18
ROH - Output Resistance (Ω
)
Supply Voltage (V)
TA= +25°C
TA= +125°C
VIN
= 0V (MCP14A0303)
VIN
= 5V (MCP14A0304)
1.0
1.5
2.0
2.5
3.0
3.5
46810121416
18
ROL - Output Resistance (Ω
)
Supply Voltage (V)
TA= +25°C
TA= +125°C
VIN
= 5V (MCP14A0303)
VIN
= 0V (MCP14A0304)
0
10
20
30
40
50
60
70
80
90
100
100 1000
10000
Supply Current (mA)
Capacitive Load (pF)
1 MHz
500 kHz
200 kHz
100 kHz
50 kHz
10 kHz
VDD = 18V
0
5
10
15
20
25
30
35
40
45
50
100 1000 10000
Supply Current (mA)
Capacitive Load (pF)
1 MHz
500 kHz
200 kHz
100 kHz
50 kHz
10 kHz
VDD = 12V
0
5
10
15
20
25
30
100 1000
10000
Supply Current (mA)
Capacitive Load (pF)
1 MHz
500 kHz
200 kHz
100 kHz
50 kHz
10 kHz
VDD = 6V
0
10
20
30
40
50
60
70
80
90
100
10 100
1000
Supply Current (mA)
Switching Frequency (kHz)
10000 pF
6800 pF
3300 pF
1000 pF
470 pF
100 pF
VDD = 18V
2018 Microchip Technology Inc. DS20006046A-page 11
MCP14A0303/4/5
Note: Unless otherwise indicated, TA= +25°C with 4.5V VDD 18V.
FIGURE 2-25: Supply Current vs.
Frequency (VDD = 12V).
FIGURE 2-26: Supply Current vs.
Frequency (VDD = 6V).
FIGURE 2-27: Enable Current vs. Supply
Voltage.
0
5
10
15
20
25
30
35
40
45
50
10 100
1000
Supply Current (mA)
Switching Frequency (kHz)
10000 pF
6800 pF
3300 pF
1000 pF
470 pF
100 pF
VDD = 12V
0
5
10
15
20
25
30
10 100
1000
Supply Current (mA)
Switching Frequency (kHz)
10000 pF
6800 pF
3300 pF
1000 pF
470 pF
100 pF
VDD = 6V
10
10.5
11
11.5
12
12.5
13
13.5
14
4 6 8 10 12 14 16
18
Enable Current (μA)
Supply Voltage (V)
MCP14A0303/4/5
DS20006046A-page 12 2018 Microchip Technology Inc.
NOTES:
2018 Microchip Technology Inc. DS20006046A-page 13
MCP14A0303/4/5
3.0 PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 3-1.
3.1 Output Pins (OUTA/OUTA/OUTA,
OUTB/OUTB/OUTB)
The outputs are CMOS push-pull circuits that are
capable of sourcing and sinking 3A of peak current
(VDD = 18V). The low output impedance ensures the
gate of the external MOSFET stays in the intended
state, even during large transients. This output also has
a reverse current latch-up rating of 500 mA.
3.2 Device Ground Pin (GND)
GND is the device return pin for the input and output
stages. The GND pin should have a low-impedance
connection to the bias supply source return. When the
capacitive load is discharged, high-peak currents flow
through the ground pin.
3.3 Device Enable Pins (ENA, ENB)
The MOSFET driver device enable pins are
high-impedance inputs featuring low threshold levels.
The enable inputs also have hysteresis between the
high and low input levels, allowing them to be driven
from slow rising and falling signals, and to provide
noise immunity. Driving the enable pins below the
threshold disables the corresponding output of the
device, pulling OUT/OUT low, regardless of the status
of the input pin. Driving the enable pins above the
threshold allows normal operation of the OUT/OUT pin
based on the status of the input pin. The enable pins
utilize internal pull-up resistors, allowing the pins to be
left floating for standard driver operation.
3.4 Control Input Pins (INA, INB)
The MOSFET driver control inputs are high-impedance
inputs featuring low threshold levels. The inputs also
have hysteresis between the high and low input levels,
allowing them to be driven from slow rising and falling
signals, and to provide noise immunity.
3.5 Supply Input Pin (VDD)
VDD is the bias supply input for the MOSFET driver and
has a voltage range of 4.5V to 18V. This input must be
decoupled to ground with a local capacitor. This bypass
capacitor provides a localized low-impedance path for
the peak currents that are provided to the load.
3.6 Exposed Metal Pad Pin (EP)
The exposed metal pad of the TDFN package is
internally connected to GND. Therefore, this pad
should be connected to a ground plane to aid in heat
removal from the package.
TABLE 3-1: PIN FUNCTION TABLE
MCP14A0303/4/5 Symbol Description
8L 2 x 3 TDFN 8L MSOP/SOIC
1 1 ENA Enable for Driver A
2 2 INA Input for Driver A
3 3 GND Device Ground
4 4 INB Input for Driver B
55OUTB
/OUTB/OUTB Push-Pull for Output B
66V
DD Supply Input Voltage
77OUTA
/OUTA/OUTA Push-Pull for Output A
8 8 ENB Enable for Driver B
EP — EP Exposed Thermal Pad (GND)
MCP14A0303/4/5
DS20006046A-page 14 2018 Microchip Technology Inc.
NOTES:
2018 Microchip Technology Inc. DS20006046A-page 15
MCP14A0303/4/5
4.0 APPLICATION INFORMATION
4.1 General Information
MOSFET drivers are high-speed, high-current devices
that are intended to source/sink high-peak currents to
charge/discharge the gate capacitance of external
MOSFETs or Insulated-Gate Bipolar Transistors
(IGBTs). In high-frequency switching power supplies,
the Pulse-Width Modulation (PWM) controller may not
have the drive capability to directly drive the power
MOSFET. A MOSFET driver such as the
MCP14A0303/4/5 family can be used to provide
additional source/sink current capability.
4.2 MOSFET Driver Timing
The ability of a MOSFET driver to transition from a
fully-off state to a fully-on state is characterized by the
driver’s rise time (tR), fall time (tF) and propagation
delays (tD1 and tD2). Figure 4-1 and Figure 4-2 show
the test circuit and timing waveform used to verify the
MCP14A0303/4/5 timing.
FIGURE 4-1: Inverting Driver Timing
Waveform.
FIGURE 4-2: Noninverting Driver Timing
Waveform.
4.3 Enable Function
The enable pins (ENA, ENB) provide additional control
of the output pins (OUT). These pins are active-high
and are internally pulled up to VDD so that the pins can
be left floating to provide standard MOSFET driver
operation.
When the enable pin input voltages are above the
enable pin high-voltage threshold (VEN_H), the
corresponding output is enabled and allowed to react to
the status of the input pin. However, when the voltage
applied to the enable pins falls below the low threshold
voltage (VEN_L), the driver’s corresponding output is
disabled and does not respond to changes in the status
of the input pins. When the driver is disabled, the output
is pulled down to a low state. Refer to Table 4-1 for the
enable pin logic. The threshold voltage levels for the
enable pin are similar to the threshold voltage levels of
the input pin and are TTL compatible. Hysteresis is
provided to help increase the noise immunity of the
enable function, avoiding false triggers of the enable
signal during driver switching.
There are propagation delays associated with the
driver receiving an enable signal and the output
reacting. These propagation delays, tD3 and tD4, are
graphically represented in Figure 4-3.
Input Output
CL = 180 0 pF
1 µF 0.1 µF
VDD = 18V
MCP14A0303
tD1
10%
90%
Input
Output
5V
18V
0V
0V
VIH (Typ.) VIL (Typ.)
tD2
tFtR
Input S ignal: tRI SE = tFALL ≤ 10 ns,
100 Hz, 0-5V Square Wave
Input Output
CL = 180 0 pF
1 µF 0.1 µF
VDD = 18V
MCP14A0304
t
D1
10%
90%
Input
Output
5V
18V
0V
0V
V
IH
(Typ.)
VIL (Typ.)
t
D2
t
R
t
F
Input Signal: tRI SE = tFALL ≤ 10 ns,
100 Hz, 0-5V Square Wave
MCP14A0303/4/5
DS20006046A-page 16 2018 Microchip Technology Inc.
TABLE 4-1: ENABLE PIN LOGIC
FIGURE 4-3: Enable Timing Waveform.
4.4 Decoupling Capacitors
Careful Printed Circuit Board (PCB) layout and
decoupling capacitors are required when using power
MOSFET drivers. Large current is required to charge
and discharge capacitive loads quickly. For example,
approximately 720 mA are needed to charge a 1000 pF
load with 18V in 25 ns.
To operate the MOSFET driver over a wide frequency
range with low supply impedance, it is recommended to
place 1.0 µF and 0.1 µF low ESR ceramic capacitors in
parallel between the driver VDD and GND. These
capacitors should be placed close to the driver to
minimize circuit board parasitics and provide a local
source for the required current.
4.5 PCB Layout Considerations
Proper PCB layout is important in high-current, fast-
switching circuits to provide proper device operation
and robustness of design. Improper component
placement may cause errant switching, excessive
voltage ringing or circuit latch-up. The PCB trace loop
length and inductance should be minimized by the use
of ground planes or traces under the MOSFET gate
drive signal. Separate analog and power grounds and
local driver decoupling should also be used.
Placing a ground plane beneath the MCP14A0303/4/5
devices will help as a radiated noise shield, as well as
providing some heat sinking for power dissipated within
the device.
4.6 Power Dissipatio n
The total internal power dissipation in a MOSFET driver
is the summation of three separate power dissipation
elements, as shown in Equation 4-1.
EQUATION 4-1:
4.6.1 CAPACITIVE LOAD DISSIPATION
The power dissipation caused by a capacitive load is a
direct function of the frequency, total capacitive load
and supply voltage. The power lost in the MOSFET
driver for a complete charging and discharging cycle of
a MOSFET is shown in Equation 4-2.
EQUATION 4-2:
4.6.2 QUIESCENT POWER DISSIPATION
The power dissipation associated with the quiescent
current draw depends on the state of the Input and
Enable pins. See Section 1.0 “Electrical
Characteristics” for typical quiescent current draw
values in different operating states. The quiescent
power dissipation is shown in Equation 4-3.
EQUATION 4-3:
EN IN OUT OUT
HH L H
HL H L
LX L L
tD3
10%
90%
Enable
Output
5V
18V
0V
0V
VEH (Typ.) VEL (Typ.)
tD4
Enable Signal: t
RI SE
= t
FALL
≤ 10 ns,
100 Hz, 0-5V Square Wave
PTPLPQPCC
++=
Where:
PT= Total power dissipation
PL= Load power dissipation
PQ= Quiescent power dissipation
PCC = Operating power dissipation
PLfC
T
VDD2
=
Where:
f = Switching frequency
CT= Total load capacitance
VDD = MOSFET driver supply voltage
PQIQH DI
QL 1D–+VDD
=
Where:
IQH = Quiescent current in the High state
D = Duty cycle
IQL = Quiescent current in the Low state
VDD = MOSFET driver supply voltage
2018 Microchip Technology Inc. DS20006046A-page 17
MCP14A0303/4/5
4.6.3 OPERATING POWER DISSIPATION
The operating power dissipation occurs each time the
MOSFET driver output transitions because, for a very
short period of time, both MOSFETs in the output stage
are on simultaneously. This cross-conduction current
leads to a power dissipation described in Equation 4-4.
EQUATION 4-4:
PCC VDD ICO
=
Where:
ICO = Crossover current
VDD = MOSFET driver supply voltage
MCP14A0303/4/5
DS20006046A-page 18 2018 Microchip Technology Inc.
NOTES:
2018 Microchip Technology Inc. DS20006046A-page 19
MCP14A0303/4/5
5.0 PACKAGING INFORMATION
5.1 Package Marking Information
Legend: XX...X Customer-specific information
Y Year code (last digit of calendar year)
YY Year code (last 2 digits of calendar year)
WW Week code (week of January 1 is week ‘01’)
NNN Alphanumeric traceability code
Pb-free JEDEC® designator for Matte Tin (Sn)
*This package is Pb-free. The Pb-free JEDEC designator ( )
can be found on the outer packaging for this package.
Note: In the event the full Microchip part number cannot be marked on one line, it will be carried over
to the next line, thus limiting the number of available characters for customer-specific
information.
3
e
3
e
Example:
8-Lead MSOP
Part Number Code
MCP14A0303-E/MS A0303
MCP14A0304-E/MS A0304
MCP14A0305-E/MS A0305
A0303
826256
Example:
8-Lead SOIC
14A0303
1826
256
Part Number Code
MCP14A0303-E/SN 14A0303
MCP14A0304-E/SN 14A0304
MCP14A0305-E/SN 14A0305
3
e
Example:
Part Number Code
MCP14A0303-E/MNY EG9
MCP14A0304-E/MNY EH1
MCP14A0305-E/MNY EH2
8-Lead TDFN
EG9
826
25
MCP14A0303/4/5
DS20006046A-page 20 2018 Microchip Technology Inc.
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
2018 Microchip Technology Inc. DS20006046A-page 21
MCP14A0303/4/5
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
MCP14A0303/4/5
DS20006046A-page 22 2018 Microchip Technology Inc.
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
2018 Microchip Technology Inc. DS20006046A-page 23
MCP14A0303/4/5
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
MCP14A0303/4/5
DS20006046A-page 24 2018 Microchip Technology Inc.
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
2018 Microchip Technology Inc. DS20006046A-page 25
MCP14A0303/4/5
 !"#$%
& 

MCP14A0303/4/5
DS20006046A-page 26 2018 Microchip Technology Inc.
B
A
0.15 C
0.15 C
0.10 C A B
0.05 C
(DATUM B)
(DATUM A)
C
SEATING
PLANE
NOTE 1
12
N
2X
TOP VIEW
SIDE VIEW
BOTTOM VIEW
NOTE 1
12
N
0.10 C A B
0.10 C A B
0.10 C
0.08 C
Microchip Technology Drawing No. C04-129-MNY Rev E Sheet 1 of 2
2X
8X
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
Note:
8-Lead Plastic Dual Flat, No Lead Package (MNY) – 2x3x0.8 mm Body [TDFN]
D
E
D2
E2
A
(A3)
A1
e
8X b
L
K
With 1.4x1.3 mm Exposed Pad (JEDEC Package type WDFN)
2018 Microchip Technology Inc. DS20006046A-page 27
MCP14A0303/4/5
Microchip Technology Drawing No. C04-129-MNY Rev E Sheet 2 of 2
8-Lead Plastic Dual Flat, No Lead Package (MNY) – 2x3x0.8 mm Body [TDFN]
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
Note:
NOM
MILLIMETERS
0.50 BSC
2.00 BSC
3.00 BSC
0.20 REF
1. Pin 1 visual index feature may vary, but must be located within the hatched area.
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
REF: Reference Dimension, usually without tolerance, for information purposes only.
Contact-to-Exposed Pad
Contact Thickness
Exposed Pad Width
Exposed Pad Length
4. Dimensioning and tolerancing per ASME Y14.5M
3. Package is saw singulated
2. Package may have one or more exposed tie bars at ends.
Notes:
Contact Width
Overall Width
Overall Length
Contact Length
Standoff
Number of Pins
Overall Height
Pitch
K0.20
Units
N
e
A
Dimension Limits
D
A3
A1
b
D2
E2
E
L
0.20
1.35
1.25
0.25
0.00
0.70
MIN
--
0.25
0.30
1.30
1.40
1.35
0.30
0.45
1.45
8
0.75
0.02 0.05
0.80
MAX
With 1.4x1.3 mm Exposed Pad (JEDEC Package type WDFN)
MCP14A0303/4/5
DS20006046A-page 28 2018 Microchip Technology Inc.
RECOMMENDED LAND PATTERN
Dimension Limits
Units
Optional Center Pad Width
Optional Center Pad Length
Contact Pitch
Y2
X2
1.50
1.60
MILLIMETERS
0.50 BSC
MIN
E
MAX
Contact Pad Length (X8)
Contact Pad Width (X8)
Y1
X1
0.85
0.25
Microchip Technology Drawing No. C04-129-MNY Rev. B
NOM
8-Lead Plastic Dual Flat, No Lead Package (MNY) – 2x3x0.8 mm Body [TDFN]
12
8
CContact Pad Spacing 2.90
Thermal Via Diameter V
Thermal Via Pitch EV
0.30
1.00
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
Notes:
Dimensioning and tolerancing per ASME Y14.5M
For best soldering results, thermal vias, if used, should be filled or tented to avoid solder loss during
reflow process
1.
2.
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
Note:
C
E
X1
Y1
Y2
X2
EV
EV
ØV
SILK SCREEN
With 1.4x1.3 mm Exposed Pad (JEDEC Package type WDFN)
2018 Microchip Technology Inc. DS20006046A-page 29
MCP14A0303/4/5
APPENDIX A: REVISION HISTORY
Revision A (June 2018)
• Original Release of this Document.
MCP14A0303/4/5
DS20006046A-page 30 2018 Microchip Technology Inc.
NOTES:
2018 Microchip Technology Inc. DS20006046A-page 31
MCP14A0303/4/5
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
Device: MCP14A0303: High-Speed MOSFET Driver
MCP14A0303T: High-Speed MOSFET Driver
(Tape and Reel)
MCP14A0304: High-Speed MOSFET Driver
MCP14A0304T: High-Speed MOSFET Driver
(Tape and Reel)
MCP14A0305: High-Speed MOSFET Driver
MCP14A0305T: High-Speed MOSFET Driver
(Tape and Reel)
Temperature Range: E = -40°C to +125°C (Extended)
Package: MS = Plastic Micro Small Outline Package (MSOP), 8-lead
SN = Plastic Small Outline Package (SOIC), 8-lead
MNY = Plastic Dual Flat, No Lead Package (TDFN), 8-lead
PART NO. –X /XX
PackageTemperature
Range
Device
[X](1)
Tape and Reel
Examples:
a) MCP14A0303T-E/MS: Tape and Reel,
Extended temperature,
8LD MSOP package
b) MCP14A0304T-E/SN: Tape and Reel,
Extended temperature,
8LD SOIC package
c) MCP14A0305T-E/MNY: Tape and Reel
Extended temperature,
8LD TDFN package
Note 1: Tape and Reel identifier only appears in the
catalog part number description. This
identifier is used for ordering purposes and
is not printed on the device package. Check
with your Microchip Sales Office for package
availability with the Tape and Reel option.
MCP14A0303/4/5
DS20006046A-page 32 2018 Microchip Technology Inc.
NOTES:
2018 Microchip Technology Inc. DS20006046A-page 33
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights unless otherwise stated.
Trademarks
The Microchip name and logo, the Microchip logo, AnyRate, AVR,
AVR logo, AVR Freaks, BitCloud, chipKIT, chipKIT logo,
CryptoMemory, CryptoRF, dsPIC, FlashFlex, flexPWR, Heldo,
JukeBlox, KeeLoq, Kleer, LANCheck, LINK MD, maXStylus,
maXTouch, MediaLB, megaAVR, MOST, MOST logo, MPLAB,
OptoLyzer, PIC, picoPower, PICSTART, PIC32 logo, Prochip
Designer, QTouch, SAM-BA, SpyNIC, SST, SST Logo,
SuperFlash, tinyAVR, UNI/O, and XMEGA are registered
trademarks of Microchip Technology Incorporated in the U.S.A.
and other countries.
ClockWorks, The Embedded Control Solutions Company,
EtherSynch, Hyper Speed Control, HyperLight Load, IntelliMOS,
mTouch, Precision Edge, and Quiet-Wire are registered
trademarks of Microchip Technology Incorporated in the U.S.A.
Adjacent Key Suppression, AKS, Analog-for-the-Digital Age, Any
Capacitor, AnyIn, AnyOut, BodyCom, CodeGuard,
CryptoAuthentication, CryptoAutomotive, CryptoCompanion,
CryptoController, dsPICDEM, dsPICDEM.net, Dynamic Average
Matching, DAM, ECAN, EtherGREEN, In-Circuit Serial
Programming, ICSP, INICnet, Inter-Chip Connectivity,
JitterBlocker, KleerNet, KleerNet logo, memBrain, Mindi, MiWi,
motorBench, MPASM, MPF, MPLAB Certified logo, MPLIB,
MPLINK, MultiTRAK, NetDetach, Omniscient Code Generation,
PICDEM, PICDEM.net, PICkit, PICtail, PowerSmart, PureSilicon,
QMatrix, REAL ICE, Ripple Blocker, SAM-ICE, Serial Quad I/O,
SMART-I.S., SQI, SuperSwitcher, SuperSwitcher II, Total
Endurance, TSHARC, USBCheck, VariSense, ViewSpan,
WiperLock, Wireless DNA, and ZENA are trademarks of
Microchip Technology Incorporated in the U.S.A. and other
countries.
SQTP is a service mark of Microchip Technology Incorporated in
the U.S.A.
Silicon Storage Technology is a registered trademark of Microchip
Technology Inc. in other countries.
GestIC is a registered trademark of Microchip Technology
Germany II GmbH & Co. KG, a subsidiary of Microchip
Technology Inc., in other countries.
All other trademarks mentioned herein are property of their
respective companies.
© 2018, Microchip Technology Incorporated, All Rights Reserved.
ISBN: 978-1-5224-3269-2
Note the following details of the code protection feature on Microchip devices:
• Microchip products meet the specification contained in their particular Microchip Data Sheet.
• Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
• There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
• Microchip is willing to work with the customer who is concerned about the integrity of their code.
• Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Microchip received ISO/TS-16949:2009 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresha m, Oregon and design centers in California
and India. The Company’ s quality system processes and procedures
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, micro perip hera ls, n onvolat ile memory and
analog products . In add ition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:200 0 certified.
QUALITY MANAGEMENT S
YSTEM
CERTIFIED BY DNV
== ISO/TS 16949 ==
DS20006046A-page 34 2018 Microchip Technology Inc.
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