MIC2267
Input Current Limiting
Synchronous Buck Regulator
USB Power Maximizer™
USB Power Maximizer is a trademark of Micrel, Inc.
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com
January 2011 M9999-011711-A
General Description
The MIC2267 is a USB Power Maximizer™ which
transfers the maximum power from the limited USB current
source by shaping the input current limit profile. It
incorporates a high efficiency, integrated synchronous step
down regulator. Internal 150m switches and adjustable
operating frequency allows the MIC2267 to achieve
greater than 90% efficiency across a broad load range. It
replaces the USB current limit switch, 5V buck regulator
and minimizes capacitance for many USB applications.
The adjustable frequency control can be utilized to move
harmonics away from sensitive frequency bands.
The MIC2267 allows the input current limit profile to be
shaped for various applications. With a current mode
control with external compensation, the MIC2267 transient
response can be optimized over load and output
capacitance making it highly flexible for many applications.
Additional features include 1µA shutdown current, output
current limit and thermal shutdown protection. The
MIC2267 is available in a 12-pin 3mm x 3mm MLF® with a
junction operating range from –40°C to +125°C.
Datasheets and support documentation can be found on
Micrel’s web site at: www.micrel.com.
Features
• Input voltage range: 3.0V to 5.5V
• Output voltage adjustable down to 1.0V
• Up to 96% efficiency at 500mA output
• Efficiency >90% across a broad load range
• Fast transient response
• Adjustable frequency from 400kHz to 1.5MHz
• Adjustable input current limiting 100mA to over 1A
• 100% maximum duty cycle
• Fully integrated MOSFET switches
• Micropower shutdown
• Thermal shutdown and output current limit protection
• 12-pin 3mm x 3mm MLF®
• Junction temperature range: −40°C to +125°C
Applications
• USB power
• Wireless router cards
• General buck converter applications
_______________________________________________________________________________________________________
Typical Application
Efficiency vs.
Output Current
50
55
60
65
70
75
80
85
90
95
100
00.511.52
OUTPUT CURRENT (A)
EFFICIENCY (%)
V
OUT
= 3.3V
V
IN
= 4.2V
V
IN
= 5.5V
MIC2267 USB Input Current Limiting Synchronous Buck Regulator Efficiency 5VIN to 3.3VOUT
Micrel Inc. MIC2267
January 2011 2 M9999-011711-A
Ordering Information
Part Number Voltage Mark Code Temperature Range Package(1)
MIC2267YML Adjustable 2267 –40°C to +125°C 12-Pin 3mm x 3mm MLF®
Note:
1. Package is GREEN RoHS compliant. Lead finish is NiPdAu. Mold compound is halogen free.
Pin Configuration
12-Pin 3mm x 3mm MLF® (ML)
(Top View)
Pin Description
Pin Number Pin Name Pin Function
1 AGND Analog Ground: The ground return for the low power blocks of the MIC2267.
2 FB Feedback (Input): Input to the error amplifier. Connect a resistor divider between VOUT and
ground to adjust the output voltage.
3 COMP Compensation Pin: Output of the internal gm error amplifier. Place a series connected,
Resistor and Capacitor to GND for external compensation.
4 PGOOD Power Good (Output): Open drain of an N-Channel MOSFET. Connect a resistor to VIN or
VOUT for power good signalling.
5 SW Switch (Output): Internal power MOSFET output switches.
6 PGND Power Ground: The ground return for the switching currents.
7 VIN Power Supply Voltage (Input): Requires bypass capacitor to GND
8 EN Enable/Delay (Input): Apply a Logic High to start the device. Apply Logic Low to stop the
device; placing it in a low quiescent current mode.
9 FILTER Input Current Limit Filter: Place a capacitor to VIN to adjust the time constant for the input
current limit filter.
10 LIMIT Input Current Limit: Place a resistor to ground to adjust the average current limit from the input
supply.
11 SLOPEC Slope Compensation: Sets current mode slope compensation
12 FREQ Frequency Control: The switching frequency is adjusted from 400kHz to 1.5MHz with a resistor
from this pin to ground.
ePAD HS Pad
Exposed Heatsink Pad: Thermal connection between die and external ground plane. A solid
connection to a large ground plane is required for full output power. This pad must be
connected to ground.
Micrel Inc. MIC2267
January 2011 3 M9999-011711-A
Absolute Maximum Ratings (1)
Supply Voltage (VIN)........................................ −0.3V to +6V
Output Switch Voltage (VSW) ........................... −0.3V to +6V
Power Good Voltage (VPGOOD) ........................ −0.3V to +6V
Enable Input Voltage (VEN)................................ −0.3V to VIN
Feedback Voltage (VFB) .................................... −0.3V to VIN
AGND to PGND Voltage .............................. −0.3V to +0.3V
Switch Current (ISW) .................................Internally Limited
Power Dissipation .....................................Internally Limited
Lead Temperature (soldering, 10sec.)....................... 260°C
Storage Temperature (Ts) .........................−65°C to +150°C
ESD Human Body Model Rating (3) ................................ 2kV
ESD Machine Model Rating (3) .....................................200V
Operating Ratings (2)
Supply Voltage (VIN)..................................... +3.0V to +5.5V
Power Good Voltage (VPGOOD) ......................... 0V to +5.5V
Enable Input Voltage (VEN) .................................... 0V to VIN
Feedback Voltage (VFB) ........................................ 0V to VIN
AGND to PGND Voltage .............................. −0.3V to +0.3V
Junction Temperature (TJ) ........................–40°C to +125°C
Junction Thermal Resistance
3mm x 3mm MLF®-12(θJA).................................61°C/W
3mm x 3mm MLF®-12(θJC).................................27°C/W
Electrical Characteristics (4)
VIN = VEN = 5.0V, VOUT = 3.3V, ILOAD = 10mA, CIN = 10µF, L = 4.7µH, COUT = 47µF, RFREQ = 100k; RSLOPEC = 100k, RLIM = 100k,
RCOMP = 11.5k, CCOMP = 15nF, TA = 25°C; bold values indicate –40°C ≤ TJ ≤ 125°C; unless noted.
Parameter Conditions Min. Typ. Max. Units
Power Input Supply
Input Voltage Range (VIN) 3.0 5.5 V
VIN UVLO Threshold Rising 2.75 2.9 3.0 V
VIN UVLO Hysteresis 320 mV
Quiescent Current PWM Mode, VEN > 1.8V, VFB = 0.9V, IOUT = 0A 1 mA
Shutdown Current VEN = 0V 1 5 µA
Reference Voltage
Feedback Voltage ±2% over temperature 0.98 1 1.02 V
Feedback Bias Current VFB = 1V 1
nA
Output Voltage Line Regulation VIN = VEN = 4V to 5.5V, ILOAD = 100mA 0.2 %
Output Voltage Load Regulation 100mA < ILOAD < 1.2A 0.2 %
Enable Control
Enable Logic High Threshold 1.2 1.8 V
Enable Logic Low Threshold 0.4 1 V
Input Current Limit
VFB = 0.5V, RLIMIT = 107k 0.5 0.7 0.9
VFB = 0.5V, RLIMIT = 68.1k 0.7 1.1 1.5
Input Current Limit
VFB = 0.5V, RLIMIT = 46.4k 1.1 1.6 2.1
A
Notes:
1. Exceeding the absolute maximum rating may damage the device.
2. The device is not guaranteed to function outside its operating rating.
3. Devices are ESD sensitive. Handling precautions recommended. Human body model, 1.5k in series with 100pF.
4. Specification for packaged product only.
Micrel Inc. MIC2267
January 2011 4 M9999-011711-A
Electrical Characteristics (4)
VIN = VEN = 5.0V, VOUT = 3.3V, ILOAD = 10mA, CIN = 10µF, L = 4.7µH, COUT = 47µF, RFREQ = 100k; RSLOPEC = 100k, RLIM = 100k,
RCOMP = 11.5k, CCOMP = 15nF, TA = 25°C; bold values indicate –40°C ≤ TJ ≤ 125°C; unless noted.
Parameter Conditions Min. Typ. Max. Units
Soft Start
Soft Start Adaptive
Internal FETs
Top MOSFET RDS(ON) ISW = 500mA, VFB = 0.9V 136 225 m
Bottom MOSFET RDS(ON) ISW = 500mA, VFB = 1.1V 100 225 m
Oscillator/PWM
RFREQ = 250k 0.32 0.4 0.48
RFREQ = 100k 0.8 1 1.2
Oscillator Frequency
RFREQ = 60k 1.2 1.5 1.8
MHz
Maximum Duty Cycle VFB < 0.5V 100 %
Thermal Protection
Over Temperature Shutdown 160 °C
Over Temperature Shutdown
Hysteresis 20 °C
Power Good
Power Good Threshold VOUT Rising (VOUT % below nominal) 6.5 10 12.5 %
Power Good Output Low
Voltage VFB = 0.9V, IPGOOD = 5mA 130 200 mV
1
Power Good Leakage Current VFB = 1.0V, VPGOOD = 5.5V 2 µA
Note:
4. Specification for packaged product only.
Micrel Inc. MIC2267
January 2011 5 M9999-011711-A
Typical Characteristics
Shutdown Current
vs. Input Voltage
0
10
20
30
40
50
60
70
80
90
100
2.5 3 3.5 4 4.5 5 5.5 6
INPUT VOLTAGE (V)
SHUTDOWN CURRENT (nA)
V
EN
= 0V
T
AMB
= 25°C
Shutdown Current
vs. Temperature
0
50
100
150
200
250
300
350
400
450
500
-60 -40 -20 0 20 40 60 80 100
TEMPERATURE (°C)
SHUTDOWN CURRENT (nA)
V
EN
= 0V
V
IN
= 5V
Supply Current
vs. Input Voltage
0
1
2
3
4
5
6
7
8
9
10
2.5 3 3.5 4 4.5 5 5.5 6
INPUT VOLTAGE (V)
SUPPLY CURRENT (mA)
V
EN
= 1.8V
T
AMB
= 25°C
F
SW
= 1MHz
Supply Current
vs. Temperature
0
1
2
3
4
5
6
7
8
9
10
-50 -30 -10 10 30 50 70 90 110 130
TEMPERATURE (°C)
SUPPLY CURRENT (mA)
V
EN
= 1.8V
V
IN
= 5V
F
SW
= 1MHz
Reference Voltage
vs. Input Voltage
0.980
0.985
0.990
0.995
1.000
1.005
1.010
1.015
1.020
2.533.544.555.56
INPUT VOLTAGE (V)
REFERENCE VOLTAGE (V)
TAMB = 25°C
Reference Voltage
vs. Temperature
0.980
0.985
0.990
0.995
1.000
1.005
1.010
1.015
1.020
-50 -30 -10 10 30 50 70 90 110 130
TEMPERATURE (°C)
REFERENCE VOLTAGE (V
)
VIN = 5 V
Enable Threshold
vs. Input Voltage
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
2.5 3 3.5 4 4.5 5 5.5 6
INPUT VOLTAGE (V)
ENABLE THRESHOLD (V)
VEN HIGH
VEN LOW
Enable Threshold
vs. Temperature
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
-50-30-101030507090110130
TEMPERATURE (°C)
ENABLE THRESHOLD (V)
VEN HIGH
VEN LOW
Switching Frequency
vs. Temperature
800
850
900
950
1000
1050
1100
1150
1200
-50-30-101030507090110130
TEMPERATURE (°C)
SWITCHING FREQUENCY (kHz)
V
IN
= 5V
MOSFET RDS(ON)
vs. Input Voltage
0
20
40
60
80
100
120
140
160
180
2.533.544.555.56
INPUT VOLTAGE (V)
RDS(ON) (mΩ)
PMOS RDSon
NMOS RDSon
I
OUT
= 0.5A
T
AMB
= 25°C
MOSFET RDS(ON)
vs. Temperature
0
20
40
60
80
100
120
140
160
-50 -30 -10 10 30 50 70 90 110 130
TEMPERATURE (°C)
RDS(ON) (mΩ)
PMOS RDSon
NMOS RDSon
I
OUT
= 0.5A
V
IN
= 5V
Output Voltage
vs. Output Current
3.280
3.285
3.290
3.295
3.300
3.305
3.310
3.315
3.320
00.5 11.52
OUTPUT CURRENT (A)
OUTPUT VOLTAGE (V)
V
IN
= 5.5V
V
OUT
= 3.3V
Micrel Inc. MIC2267
January 2011 6 M9999-011711-A
Typical Characteristics (Continued)
Efficiency vs.
Output Current
50
55
60
65
70
75
80
85
90
95
100
00.511.52
OUTPUT CURRENT (A)
EFFICIENCY (%)
V
OUT
= 3.3V
V
IN
= 4.2V
V
IN
= 5.5V
Efficiency vs.
Output Current
0
10
20
30
40
50
60
70
80
90
100
00.511.52
OUTPUT CURRENT (A)
EFFICIENCY (%)
VOUT = 1.8V
VIN = 3.3V
VIN = 5.5V
Input Current Limit
vs. Input Voltage
0.600
0.650
0.700
0.750
0.800
2.533.544.555.56
INPUT VOLTAGE (V)
CURRENT LIMIT (A)
RLIM = 107K
V
FB
= 0.5V
Input Current Limit
vs. Temperature
0.50
0.55
0.60
0.65
0.70
0.75
0.80
0.85
0.90
-50 -30 -10 10 30 50 70 90 110 130
TEMPERATURE (°C)
CURRENT LIMIT (A)
ILIM @ 3.3Vin
ILIM @ 5Vin
V
OUT
= 1.8V
Current Limit
vs. RLIMIT
100
1000
10000
10 100 1000
RLIMIT (kΩ)
INPUT CURRENT LIMIT (A)
V
IN
= 5V
V
OUT
= 3.3V
Switching Frequency
vs. RFREQ
0
200
400
600
800
1000
1200
1400
1600
1800
0 50 100 150 200 250 300
RFREQ (kΩ)
SWITCHING FREQUENCY (kHz)
V
IN
= 5V
T
AMB
= 25°C
Micrel Inc. MIC2267
January 2011 7 M9999-011711-A
Functional Characteristics
Micrel Inc. MIC2267
January 2011 8 M9999-011711-A
Functional Characteristics (Continued)
Micrel Inc. MIC2267
January 2011 9 M9999-011711-A
Functional Diagram
Figure 1. MIC2267 Functional Block Diagram
Functional Description
The MIC2267 is an input current limited, 2A synchronous
buck regulator. The part offers control of the input
average current limit and the time constant of the current
limit response, allowing full control of the input current
profile during load steps and plug in events. The P-
Channel high side switch allows for 100% duty cycle
operation. Optimization of the loop bandwidth can be
achieved using the available connections to the slope
compensation ramp and error amplifier nodes. For logic
control and error flagging, the MIC2267 has an enable
function and a Power Good function.
VIN
The input supply (VIN) provides power to the internal
power MOSFETs and the analog control circuitry. The
VIN operating range is 3V to 5.5V. A minimum bypass
capacitor of 10µF should be placed close to the input
(VIN) pin and the ground (PGND) pin. Refer to the Layout
Recommendations section for details on placing the
input capacitor.
LIMIT
The current limit as set by the RLIMIT resistor (Nominally,
ILIMIT = 75k/RLIMIT) is converted to the total charge
allowed in one cycle (QTOT). So if the current limit is 1A
and the frequency is 1MHz, since Q = I x T, the total
charge allowed QTOT = 1µC. If for example, a 1µF
capacitor CTOT is used to store this charge, since Q = C x
V, the voltage would be 1V.
If a replica of the input current is then integrated and the
resultant input charge per cycle:
∫dt).t(I=Q T
OININ
Is stored on a similar 1µF capacitor CINT, then input
current limit is reached when the voltage on the CINT
capacitor reaches 1V, i.e. QIN ≥ Q
TOT. Once this
condition is satisfied and the FILTER delay time has
elapsed, the P-Channel switch cycle is terminated. At
the beginning of each cycle the integration storage
capacitors are discharged. In the actual circuit the
storage capacitor is in the order of 5pF and the replica
current is scaled down accordingly.
Micrel Inc. MIC2267
January 2011 10 M9999-011711-A
This is, effectively, cycle by cycle input current limit
where the average input current in each cycle is limited.
The advantage of this scheme is that when the input
current budget has been used up for that cycle and the
top switch goes off, the output can still draw current from
ground and switching continues in an efficient manor.
Conventional input current limit schemes which utilize an
input switch will effectively drop VIN and leave the
switcher at 100% duty cycle; in effect current limiting like
an LDO current limits.
FILTER
The filter pin can be used to implement a delay to the
input current limit, thus allowing acceptable bursts of
current to pass, unaffected. However the magnitude of
the over current will act to shorten the allowable pulse
width; effectively regulating charge passed; thus for a
given input capacitor, the droop during over current
peaks can be kept constant.
The Delay circuit is an identical circuit to the LIMIT circuit
except that the current being stored on the integrating
capacitor is first sent through a single pole RC filter i.e. a
replica of the P-Channel Drain current is fed into a
parallel RC. The R is set internally to 50k (±20%) and
the C is the external (CFILTER). The FILTER current limit
is set to 80% of the nominal input current limit, i.e., in the
previous example, whereas the LIMIT circuit has to
charge the storage capacitor CINT to 1V, the FILTER
current limit circuit only has to charge the integration
storage capacitor CINTFIL to 0.8V.
Figure 2. MIC2267 FILTER Pin Operation
The rising function after the integration block (voltage on
CINTFIL) is actually discharged to 0v each cycle, but for
clarity, it is shown as an ‘envelope’ to show its rising
characteristic.
FILTER
IN
LIM
DELAY C50k
I
I
0.81lnT ××
⎟
⎟
⎠
⎞
⎜
⎜
⎝
⎛×−−=
Typically, CINTFIL takes time to reach this 80% trip level.
Therefore, asserting current limit on the current cycle is
highly dependant on internal delays and the extremity of
the over current. Therefore, if the filter circuit reaches the
80% trigger level in a given cycle (n), the actual current
limit is allowed to work during the next cycle (n+1).
When VOUT < 90% VOUT nominal, e.g. during startup or
large load transients, the filter/delay function is disabled.
This is to allow a defined startup current limit and reduce
voltage peaks.
ENABLE (EN)
This is the enable pin. Taking this pin above 1.8V will
enable the part to begin switching. Taking this pin below
0.4V will put the part into the shutdown mode where
nominally, the part will consume < 1µA.
POWER GOOD (PGOOD)
This is an open drain output which can be connected via
a pull up resistor to VOUT or an external voltage up to
5.5V. This pin is pulled low while the part is enabled and
the output is below 90% of the nominal output voltage.
When the trigger threshold of nominally >90% nominal
VOUT is crossed, the PGOOD N-Channel FET is switched
off and the pin will be high impedance.
Note that the power good function is inactive while the
part is in shutdown (EN=Low). I.E. If the PG pull up
resistor is connected to VIN, PG will be high when EN is
below the enable threshold.
COMP
COMP is the output connection of the voltage error
transconductance amplifier. The MIC2267 is a current
mode controller and therefore will require just a capacitor
and resistor connected from COMP to AGND to create a
single pole, single zero compensator to stabilize the
loop. An additional capacitor from COMP to AGND can
be added to reduce switching jitter due to high frequency
switching noise entering the loop.
If desirable, slope compensation can be increased/
reduced to improve stability/transient response over a
wide duty cycle range including 100%. In such cases,
additional compensation may be added to this pin if
required.
FB
Connect this pin to the junction of the output voltage
feedback resistors. The regulation loop will set the
output voltage to the correct level determined by these
feedback resistor values. The output voltage will be:
VOUT = VREF(1+R1/R2)
For most applications, R2 can be set to 10k and R1 can
be found by:
R1 = R2(VOUT/VREF – 1)
Micrel Inc. MIC2267
January 2011 11 M9999-011711-A
SLOPEC
To guarantee stability in a current mode controller
operating at duty cycle >50%, a compensation ramp (m)
is required. This ramp ‘m’ is added to the inductor
current sense ramp (or alternatively, it can also be
subtracted from the error voltage which has the same
effect).
A resistor to ground from the SLOPEC pin sets the
amplitude of ‘m’ over the switching period.
Ideally, the magnitude of the compensation ramp (m) is
for many cases, set to ½ inductor discharge ramp (m2).
I.E. m= ½ m2
Where:
m2 ∝ Vo/L x FSW
and
m ∝ 67700/RSLOPEC
Therefore, for the ideal ½ m2 slope:
RSLOPEC = 2 x FSW x L x 67700/Vout
Where duty cycle can approach 100%, excess phase
shift in the loop can lead to a phenomenon called “sub-
harmonic oscillation”. Additional compensating slope ‘m’
may be required in these cases.
It can be shown that ensuring m = m2 will ensure
stability regardless of voltage loop gain for the case
where DC ~ 100%. Therefore, a value of RSLOPEC = FSW.x
L x 67700/Vout will ensure stability at the expense of
some line regulation.
AGND and PGND
Connect AGND to the quiet, signal reference points and
decouple closely to the IC. Connect PGND to the high
current carrying paths close to the COUT and CIN. Refer to
layout guide section later in the datasheet for more
detailed information.
FREQ
A resistor RFREQ from this pin to ground allows the
frequency of the MIC2267 to be programmed over the
range 400kHz to 1.5MHz.
Figure 3. MIC2267 FREQ Pin Internal Blocks
To set the frequency, this pin is forced to V1, the
resulting current through the resistor RFREQ sets the
internal reference current which charges a capacitor (C).
At the beginning of the clock cycle, C begins charging.
When it reaches V2, a clock pulse is generated and C is
discharged to ground; marking the beginning of the next
clock cycle.
This produces a clock frequency FSW of:
FSW = 1/(C x RFREQ)
Where C = 10pF
SW
This is the center connection output of the P-channel
and N-channel Power MOSFETs. Connect this pin to the
Power inductor as close to the IC as possible. Refer to
the Layout Recommendations section for details on
placing the power inductor.
Micrel Inc. MIC2267
January 2011 12 M9999-011711-A
Application Information
FILTER
The USB 2.0 specification requires that current surges
during transitions should result in a droop at an
upstream USB port <330mV. In addition to the 10µF
allowable USB “device” input capacitance; there is also a
mandatory 120µF capacitor at each upstream Hub
VBUS terminal. This presents a challenge as there is an
amount of energy available within this hub capacitance
that can be tapped only if the droop can somehow be
limited remotely at the device end. Since the MIC2267
implements a charge limit system, this available energy
can be utilized by adjusting CFILTER.
Figure 2. USB Bus Powered Function Example
Where actual CBUS is higher than 120µF, the FILTER
capacitor can be increased to allow greater current limit
delay times. This can help further reduce the value of
output bulk holdup capacitors (COUT) in applications that
require large, short term load pulses such as TDMA
wireless data modems.
The FILTER capacitor should be placed as close as
possible to the FILTER and VIN pins to set the input
current limit delay time. Recommended minimum value
is 100pF.
Effect of Changing FILTER Capacitor on VOUT
COUT = 447µF, VOUT = 3.3V, Load pulse width = 600µs:
Reducing over current peak increases limit delay time in
accordance with the TDELAY equation:
FILTER
IN
LIM
DELAY C50k
I
I
0.81lnT ××
⎟
⎟
⎠
⎞
⎜
⎜
⎝
⎛×−−≈
Micrel Inc. MIC2267
January 2011 13 M9999-011711-A
LIMIT
Resistor values of between 750k and 46k should be
used to set the current limit between 0.1A and 1.6A. To
set the nominal LIMIT resistor value:
RLIMIT = 75kΩ/ILIMIT
In USB applications for example, two LIMIT resistors can
be used to switch between 1 unit load (100mA) and 5
unit loads (500mA).
Due to a minimum on time implemented during current
limit operation, there is lower limit to VOUT where input
current limit is regulated. When VOUT sees a near short
circuit at higher switching frequency, IIN will be higher
than the set ILIMIT. Circuit losses will tend to keep this to a
maximum of 250mA.
The limit can be found by:
()
8.0200)8.0( −⋅⋅+= nsFVV SWINOUTMIN
e.g., for VIN = 5v and FSW = 1MHz, VOUTMIN = 0.36V
COMP
As the MIC2267 uses a current mode control, the control
loop only requires a single pole/zero compensator to
optimise stability and transient response. The
recommended values are 11k and 15nF. An additional
680pF capacitor can also be added to reject switching
frequency noise.
FB
Connect a resistor divider between the VOUT load
terminal connection and output ground reference
connection to minimize resistive voltage drops affecting
load regulation.
For most applications, R2 can be set to 10k and R2
can be found by:
R1 = R2(VOUT/VREF – 1)
SLOPEC
Connect a resistor between this pin and AGND as close
to the MIC2267 as possible to reduce the possibility of
noise adding into the control loop.
As described in the theory of operation, the ideal slope
can be calculated as:
RSLOPEC = 2. FSW . L . 67700/VOUT
This value can be scaled towards ½ this value to ensure
stability up to and including 100% duty cycle.
FREQ
Connect a resistor between this pin and AGND as close
to the MIC2267 as possible to reduce the possibility of
switching noise causing frequency jitter.
Set the nominal switching frequency using:
FSW = 1/ (C.RFREQ)
Where nominal C = 10pF
INDUCTOR
The MIC2267 was designed to work with 3.3µH to 10µH
inductor values.
If a low ripple voltage output is a key design goal, then
larger value inductors will reduce switching ripple current
and output ripple voltage, but can also have larger DCR
values in small packages; which can reduce efficiency.
Inversely, if high efficiency is the key target, Lower value
inductors will increase switching ripple current and
therefore increase output ripple voltage, but will typically
have lower DCR values in small packages and can
improve efficiency.
As the MIC2267 uses input current limiting, care should
be taken that during a short circuit condition, the inductor
can operate with the power dissipated in it during this
fault condition. Helpfully, The MIC2267 switches the low
side driver off during a short circuit, which ensures most
of the power dissipation occurs within the IC. e.g.:
PFAULT = 5v x 1A = 5W
VNFET ≈ 0.7V
VL_DCR = IIN x DCR = 1A x 50mΩ = 0.05V
Power in the inductor DCR = 7% overall
dissipation.
PL_DCR = 0.36W
The MIC2267 thermal limit protection will therefore limit
the power in the inductor and protect from over
dissipation. Protection is further improved by designing a
low thermal resistance connection between the inductor
and the IC. To achieve this, a short, wide PCB trace
from the inductor to the SW pin is recommended.
Connecting the inductor close to the SW pin is also good
design practice as it minimizes the area available for
radiating switching frequency harmonics around the local
area of the switching regulator.
Micrel Inc. MIC2267
January 2011 14 M9999-011711-A
CIN
Connect a ceramic capacitor of X5R or X7R dielectric
from the VIN pin to PGND as close to the MIC2267 as
possible to decouple the high di/dt switching current
paths. A minimum value of 10µF is recommended for
most applications. An additional 22µF can be useful in
reducing ringing effects if long power leads are used to
connect power.
COUT
Connect a ceramic capacitor of X5R or X7R dielectric
from VOUT to PGND as close as possible to the inductor
and CIN ground connection to reduce the effect of high
di/dt ground currents from interfering with internal
signals. A minimum of 47µF is recommended for most
applications. Additional bulk capacitance such as
electrolytic, tantalum or ceramic can be added to
improve transient performance and hold up during large
load transients.
5V Pass Through
Some applications will require a legacy 5v supply to be
available which also benefits from the current limit
protection. The circuit in Figure 5 allows for a low current
bias supply to be provided while still providing current
limit protection.
VIN
EN
FREQ
SW
FB
COMP
AGNDPGND
LIMIT
MIC2267
10uF
4.7uH
PGOOD
10k
FILTER
22nF
110k
100µF 150µF 150µF
23k
10k
680pF
SLOPEC
75k
11.5k
15nF
100k
VIN = 5.0V USB
VOUT2 = 4.75V
1A Schottky
10uF
VOUT1 = 3.3V
Figure 3. Standard MIC2267 Circuit with
Protected ~5v Bias Supply
Below are some oscilloscope shots of the Pass through
circuit operating under the following conditions:
Normal operation:
VOUT1 = 3.3v @ 200mA Continuous Load
VOUT2 = 4.75v @ 80mA to 200mA Pulsing Load
Over Current peaks applied:
V
OUT1 = 3.3v @ 200mA Continuous Load
V
OUT2 = 4.75V @ 80mA to 600mA Pulsing Load
Normal operation; no Over Current
Over Current Peaks applied on VOUT2
Micrel Inc. MIC2267
January 2011 15 M9999-011711-A
PCB Layout Guidelines
To minimize EMI and output noise, follow these
layout recommendations.
PCB Layout is critical to achieve reliable, stable and
efficient performance. A ground plane is required to
control EMI and minimize the inductance in power,
signal and return paths.
The following guidelines should be followed to insure
proper operation of the MIC2267 converter.
IC
1. The 10µF ceramic capacitor, which is connected to
the VIN pin, must be located right at the IC. The VIN
pin is noise sensitive and placement of the capacitor
is critical. Use wide traces to connect to the VIN and
PGND pins.
2. The signal ground pin (AGND) must be connected
directly to the ground planes. The common
connection of PGND and AGND should be at the
LOAD GND terminal.
3. Place the IC close to the point of load (POL).
4. Use fat traces to route the input and output power
lines.
5. Signal and power grounds should be kept separate
and connected at only one location.
Input Capacitor
1. Place the input capacitor next.
2. Place the input capacitors on the same side of the
board and as close to the IC as possible.
3. Keep both the VIN and PGND connections short.
4. Place several vias to the ground plane close to the
input capacitor ground terminal.
5. Use either X7R or X5R dielectric input capacitors.
6. Do not use Y5V or Z5U type capacitors.
7. Do not replace the ceramic input capacitor with any
other type of capacitor. Any type of capacitor can be
placed in parallel with the input capacitor.
8. If a Tantalum input capacitor is placed in parallel
with the input capacitor, it must be recommended for
switching regulator applications and the operating
voltage must be derated by 50%.
9. In “Hot Plug” applications, a Tantalum or Electrolytic
bypass capacitor must be used to limit the
overvoltage spike seen on the input supply with
power is suddenly applied.
Inductor
1. Keep the inductor connection to the switch node
(SW) short.
2. Do not route any digital lines underneath or close to
the inductor.
3. Keep the switch node (SW) away from the feedback
(FB) pin.
4. To minimize noise, place a ground plane underneath
the inductor.
Output Capacitor
1. Use a wide trace to connect the output capacitor
ground terminal to the input capacitor ground
terminal.
2. Phase margin will change as the output capacitor
value and ESR changes. Contact the factory if the
output capacitor is different from what is shown in
the BOM.
3. The feedback trace should be separate from the
power trace and connected as close as possible to
the output capacitor. Sensing a long high current
load trace can degrade the DC load regulation.
RC Snubber
1. Place the RC snubber on the same side of the board
and as close to the SW pin as possible.
Micrel Inc. MIC2267
January 2011 16 M9999-011711-A
MIC2267 Typical Application Circuit
Bill of Materials
Item Part Number Manufacturer Description Qty.
L1 VLF5014ST-4R7M1R7 TDK(1) 4.7µH, 2A inductor 1
C3 12066D476MAT2A AVX(4) 47µF, 6.3V, X5R ceramic capacitor 1
C9 Not Fitted 1210 size 0
C5 08056D106MAT2A AVX(4) 10µF, 6.3V, X5R ceramic capacitor 1
C7 06033D104MAT2A AVX(4) 0.1µF, 25V ceramic capacitor 1
C1 06033C153MAT2A AVX(4) 15nF, 25V, ceramic capacitor 1
C6 06033C102MAT2A AVX(4) 1nF 25V, ceramic capacitor 1
C2 06033A101KAT2A AVX(4) 100pF, 25V, COG ceramic capacitor 1
C4 06035A821JAT2A AVX(4) 820pF, 50V, NPO ceramic capacitor 1
C8 Not Fitted 0603 size 0
R1, R7 CRCW06031003FRT1 Vishay Dale(2) 100K (0603 size), 1% 2
R2 CRCW06031002FRT1 Vishay Dale(2) 10K (0603 size), 1% 1
R3 CRCW06037502FRT1 Vishay Dale(2) 75K (0603 size), 1% 1
R4 CRCW06032322FRT1 Vishay Dale(2) 23.2K (0603 size), 1% 1
R5 CRCW06031152FRT1 Vishay Dale(2) 11.5K (0603 size), 1% 1
R6 CRCW06031503FRT1 Vishay Dale(2) 150K (0603 size), 1% 1
R8 CRCW060322R1FRT1 Vishay Dale(2) 22.1 (0603 size), 1% 1
R9 CRCW08051R21FRT1 Vishay Dale(2) 1.21 (0805 size), 1% 1
R10 CRCW060349R9FRT1 Vishay Dale(2) 49.9 (0603 size), 1%
U1 MIC2267YML Micrel, Inc.(5) Input Current Limiting Synch’ Buck Regulator
(12 pin 3mm x 3mm MLF) 1
Notes:
1. TDK: www.tdk.com.
2. Vishay: www.vishay.com.
3. Murata: www.murata.com.
4. AVX: www.avx.com.
5. Micrel, Inc.: www.micrel.com.
Micrel Inc. MIC2267
January 2011 17 M9999-011711-A
PCB Layout Recommendations
Top Layer
Bottom Layer
Micrel Inc. MIC2267
January 2011 18 M9999-011711-A
Package Information
12-Pin MLF® (YML)
Micrel Inc. MIC2267
January 2011 19 M9999-011711-A
Recommended Land Pattern
Red circle indicates Thermal via. Size should be 0.300mm – 0.350mm in diameter, 1.00mm pitch
and should connect to GND plane for maximum thermal performance.
Green rectangle (with shaded area) indicates Solder Stencil Opening on exposed pad area.
Size should be 0.50mm x 0.95mm, 1.15mm pitch.
MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA
TEL +1 (408) 944-0800 FAX +1 (408) 474-1000 WEB http://www.micrel.com
Micrel makes no representations or warranties with respect to the accuracy or completeness of the information furnished in this data sheet. This
information is not intended as a warranty and Micrel does not assume responsibility for its use. Micrel reserves the right to change circuitry,
specifications and descriptions at any time without notice. No license, whether express, implied, arising by estoppel or otherwise, to any intellectual
property rights is granted by this document. Except as provided in Micrel’s terms and conditions of sale for such products, Micrel assumes no liability
whatsoever, and Micrel disclaims any express or implied warranty relating to the sale and/or use of Micrel products including liability or warranties
relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property right.
Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product
can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant
into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A
Purchaser’s use or sale of Micrel Products for use in life support appliances, devices or systems is a Purchaser’s own risk and Purchaser agrees to fully
indemnify Micrel for any damages resulting from such use or sale.
© 2011 Micrel, Incorporated.
