International Rectifier HEXFET Power MOSFET @ Dynamic dv/dt Rating Repetitive Avalanche Rated @ Surface Mount (IRFR224) Straight Lead (IRFU224) Available in Tape & Reel Fast Switching Ease of Paralleling Description Third Generation HEXFETs from international Rectifier provide the designer with the best combination of fast switching, ruggedized device design, low PD-9.600A IRFR224 IRFU224 Ip =3.8A Voss = 250V Rpgcon) = 1.10 on-resistance and cost-effectiveness. The D-Pak is designed for surface mounting using vapor phase, infrared, or wave soldering techniques. The straight lead version (IRFU series) is for through-hole mounting applications. Power dissipation levels up to 1.5 watts are possible in typical surface mount applications. D-PAK PAK TO-252AA TO-251AA Absolute Maximum Ratings | Parameter Max. Units lp @ To = 25C Continuous Drain Current, Vas @ 10 V 3.8 Ip @ Tc = 100C | Continuous Drain Current, Vas @ 10 V 24 A lom Pulsed Drain Current fo a Pp @ Tc = 25C | Power Dissipation 42 Ww Po @ Ta=25C_ | Power Dissipation (PCB Mount)** 25 Linear Derating Factor 0.33 WC Linear Derating Factor (PCB Mount)** 0.020 Vas Gate-to-Source Voltage +20 ee Vv Eas Single Pulse Avalanche Energy @ | 80 | om lar Avalanche Current 3.8 A Ear Repetitive Avalanche Energy 4.2 mJ dv/dt Peak Diode Recovery dv/dt @ 48 Vins (Ts, Tste | Junction and Storage Temperature Range -55 to +150 C | | Soldering Temperature, for 10 seconds 260 (1.6mm from case) Thermal Resistance Parameter Min. Typ. | Max. _|_ Units Rouc Junction-to-Case = = 3.0 Rosa Junction-to-Ambient (PCB mount)** _ _ 50 CW Rea Junction-to-Ambient _ _ 100 | ** When mounted on 1" square PCB (FR-4 or G-10 Material). For recommended footprint and soldering techniques refer to application note #AN-994. 1163IRFR224, IRFU224 Electrical Characteristics @ Ty = 25C (unless otherwise specified) Parameter Min. | Typ. | Max. | Units Test Conditions Vieryoss Drain-to-Source Breakdown Voltage 250 _ _ V__ | Ves=0V, Ip= 250A AVerypss/ATy| Breakdown Voltage Temp. Coefficient | 0.36 | | VC | Reference to 25C, In= 1mA Rpsion) Static Drain-to-Source On-Resistance = _ 14 Q | Vas=10V, In=2.3A Vasith) Gate Threshold Voltage 2.0 _ 4.0 Vj Vos=Ves, ln= 250nA Dis Forward Transconductance 1.5 _ _ S| Vps=50V, ln=2.3A loss Drain-to-Source Leakage Current | | 2 WA Vos=250V, Ves OV _ = 250 Vps=200V, Vas=0V, Ty=125C lass Gate-to-Source Forward Leakage _ _ 100 nA Vas=20V Gate-to-Source Reverse Leakage _ | -100 Vas=-20V Qg Total Gate Charge _ = 14 Ip=4.4A Qgs Gate-to-Source Charge _ | 27 | nC | Vps=200V Qga Gate-to-Drain ("Miller") Charge _ = 7.8 Vas=10V See Fig. 6 and 13 tajon) Turn-On Delay Time _ 7.0 _ Vop=125V te Rise Time _ 13 _ ns Ip=4.4A tavort) Turn-Off Delay Time _ 20 _ Re=18Q tr Fall Time = 12 _ Rp=289 See Figure 10 @ Lo Internal Drain Inductance _ 4.5 _ e mo pend ) nH | from package (= Ls Internal Source Inductance | 75) and center of die contact s Ciss Input Capacitance | 260 _ Vas=0V Coss Output Capacitance _ 77 _ pF | Vos=25V Crss Reverse Transfer Capacitance _ 15 _ f=1.0MHz See Figure 5 Source-Drain Ratings and Characteristics Parameter Min. | Typ. | Max. Units Test Conditions Is Continuous Source Current _ | _ | 32 { MOSFET symbol D (Body Diode) 4 A showing the Ism Pulsed Source Current | | 45 integral reverse = (Body Diode) p-n junction diode. 8 Vsp Diode Forward Voltage _ - 1.8 V_ | Ty=25C, Is=3.8A, Vas=0V tre Reverse Recovery Time _ 200 | 400 ns 7} Ty=25C, Ip=4.4A Qn Reverse Recovery Charge | 0.93 | 1.9 | wC {di/dt=100A/us ton Forward Turn-On Time Intrinsic turn-on time is neglegible (turn-on is dominated by Ls+Lp) Notes: Repetitive rating; pulse width limited by max. junction temperature (See Figure 11) Vop=50V, starting Tj=25C, L=14mH Rg=25Q, |as=3.8A (See Figure 12) Isp<3.8A, di/dt<90A/us, VopsV(BR)Dss, Tys150C Pulse width < 300 us; duty cycle <2%. 1164IRFR224, IRFU224 Ip, Drain Current (Amps) ip, Drain Current (Amps) a a E z = o E 2 oO & a 6 20us WIDTH 20us PULSE WIDTH To = 25ec To = 190C tovd 40 10! som! 1o! Vos, Drain-to-Source Voltage (volts) Vps, Drain-to-Source Voltage (volts) Fig 1. Typical Output Characteristics, Fig 2. Typical Output Characteristics, Tc=25C Tco=150C (Normalized) Vpg = 50V 20us PULSE WIDTH Rpscon); Drain-to-Source On Resistance Veg = 10 0-9 -40 -20 0 20 40 60 80 100 120 140 150 Ves, Gate-to-Source Voltage (volts) Ty, Junction Temperature (C) Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance Vs. Temperature 1165IRFR224, IRFU224 600 cg = OV. f = IMHZ iss = Cgs + Cgg. Cgs SHORTED Cass =" Cgg 500 Coss Cas + Capacitance (pF) Vas, Gate-to-Source Voltage (volts) FOR TEST CIRCUIT SEE FIGURE 13 0 100 104 0 a 6 9 12 15 Vps, Drain-to-Source Voltage (volts) Qe, Total Gate Charge (nC) Fig 5. Typical Capacitance Vs. Fig 6. Typical Gate Charge Vs. Drain-to-Source Voltage Gate-to-Source Voltage oo a & =z a a Qa 5 = ~ o 5 & = 5 & 6 Cc 2 S o Q > = oD a e <L A Tos WY = T = 150C : Veg = OV O14 st PULSE oa 0.6 0.8 1.0 1.2 4.4 0.42 4 2 40 2 5 4 5 403 Vsp, Source-to-Drain Voltage (volts) Vps, Drain-to-Source Voltage (volts) Fig 7. Typical Source-Drain Diode Fig 8. Maximum Safe Operating Area Forward Voltage 1166Ip, Drain Current (Amps) 25 50 IRFR224, IRFU224 Ro Vos D.U.T. Lt > -Vpp Ihiov Pulse Width < tus Duty Factor < 0.1% aan Fig 10a. Switching Time Test Circuit Vps 90% 10% 75 100 125 450 Ves Tc, Case Temperature (C) fajon) tr tayo) tf Fig 9. Maximum Drain Current Vs. Fig 10b. Switching Time Waveforms Case Temperature Thermal Response (Zgjc} Fig 11. SINGLE PULSE Ppl _ (THERMAL RESPONSE) let tel all NOTES: 4, DUTY FACTOR, D=t4/t2 2, PEAK Tj=Pom x Zthjc * Te 105 104 103 to? 0.4 4 10 ty, Rectangular Pulse Duration (seconds) Maximum Effective Transient Therma! Impedance, Junction-to-Case 1167IRFR224, IRFU224 Vary tp to obtain Vps > ired | required las DUT. A > AS 5 0.010 2 Ww . , Fe 3 Fig 12a. Unclamped Inductive Test Circuit 3 a 2 Do | wn f P = WY <= Ww Vos / po = 50V / 25 50 75 100 125 150 Starting Tj, Junction Temperature(C) ee as Fig 12c. Maximum Avalanche Energy Fig 126. Unclamped Inductive Waveforms Vs. Drain Current Current Regulator ro Same Type as D.U.T. | | | | ve | . Q | ove a WO ESSE SSS SES | + Qas ++ Gap 4 Va Charge -> Current Sampling Resistors Fig 13a. Basic Gate Charge Waveform Fig 13b. Gate Charge Test Circuit Appendix A: Figure 14, Peak Diode Recovery dv/dt Test Circuit - See page 1505 Appendix B: Package Outline Mechanical Drawing - See pages 1512, 1513 Appendix D: Tape & Reel Information See page 1523 International 1168 Appendix C: Part Marking Information See page 1518