APPLICATION NOTE | AN:016 Using BCM(R) Bus Converters in High Power Arrays Paul Yeaman Director, VI Chip(R) Application Engineering Contents Page Introduction 1 Theory 1 Symmetrical Input / Output Resistances 2 ROUT Matching 3 Uniform Cooling 3 Arrays Powered From Multiple Inputs 3 Design Example 4 General Guidelines 6 Conclusion 6 Introduction This application note provides methods and guidelines for designing BCM bus converters into high power arrays. Theory BCM modules current share when their respective inputs and outputs are connected in parallel. Sharing accuracy is a function of a) input and output interconnect impedance matching, b) the output impedances (ROUT ) of the BCM modules and c) uniform cooling. In theory, a very large number of modules can be paralleled. In practice arrays larger than ten become difficult due to a) and c) above. Please contact Vicor Applications Engineering if you are designing an array with more than 10 modules. Since bus converters are isolated transformers, their outputs may be paralleled with inputs powered from different sources. The lower the ROUT of the module, the more closely input voltages must match to avoid excessive current imbalance. As such, the input voltages must be equal to ensure evenlydistributed sharing. Figure 1 BCM Parallel Array Block Diagram +IN +OUT BCM(R) Module 1 Common Input Voltage Source -IN -OUT +IN +OUT BCM(R) Module 2 -IN -OUT +IN Isolated Output Bus +OUT BCM Module 3 (R) -IN -OUT AN:016 Page 1 RSV TM +IN Symmetrical Input / Output Resistances +OUT -IN -OUT The primary design concern for a high power array is the layout of a symmetrical input and output feed. Figure 2 represents a simplified model of BCM(R) bus converter sharing for an array of two. In this case, the circuit has been reduced to its core elements and each BCM module is represented as a resistor with resistance ROUT. This model can easily be expanded to represent larger arrays. Figure 2 Simplified Model of BCM Module Sharing PRIMARY RINPUT1 SECONDARY BCM(R) Module 1 ROUTPUT1 ROUT I1 * K I1 I2 * K I2 VIN Load RINPUT2 ROUT ROUTPUT2 BCM Module 2 (R) If RINPUT1 = RINPUT2 and ROUTPUT1 = ROUTPUT2 then the current through both legs will be equal. An increase in ROUTPUT1 will decrease I1 proportionally. It is important to note, however, that an increase in RINPUT1 (R) will decrease I1 to the square of the K factor. For BCM modules having a small K factor (<<1) the BCM Module 1 matching of the input impedance is less critical. For example, assume the following: ROUT VIN1 K = 1/32 ROUT = 10m ROUTPUT1 = ROUTPUT2 = RINPUT1 = 0. RINPUT2 = 1 Solving for I1 I2 VIN2 I1 I2 ROUT BCM(R) Module 2 : I1 * ROUT + (I1 * K* RINPUT1) * K = I2 * ROUT + (I2 * K* RINPUT2) * K RINPUT1 = 0 so: I1 * ROUT = I2 * ROUT + I2 * K2 * RINPUT2 Substituting values yields: I1 * I1 I2 1 100 = = I2 * ( 1 100 + 1 1024 ) 11 10 This indicates that BCM Module 1 carries approximately 10% more current with a 1 impedance in series with the input of BCM Module 2 for K = 1/32. However, if K were equal to 1, then BCM Module 1 would carry essentially 100% of the current. AN:016 Page 2 -IN -OUT PC VOUT RSV TM ROUT is specified as a range in the BCM(R) bus converter data sheet and has a positive temperature coefficient with the specified range that reinforces sharing. As the modules temperature increases due to increased dissipation, the ROUT increases. This decreases the amount of current flowing through that +IN +OUT BCM module in an array, reducing the module power dissipation. ROUT Matching -IN -OUT Uniform Cooling Due to the positive temperature coefficient of ROUT, BCM modules mounted close to each other and cooled equally will tend to equalize power dissipation. The true power limitation on the module is based on dissipation. Therefore, the module that has a lower ROUT may have a higher current when connected in an array (thus a higher power), but given that SECONDARY PRIMARY its dissipation is the same as neighboring units in an array, it will have similar MTBF characteristics. BCM(R) Module 1 The power rating of an array of BCM modules is equal to the power rating of the individual module RINPUT1 times the R ROUTPUT1 OUT number of modules in an array. Even under the ideal circumstances, the current through each I1 * K VIN I2 * K RINPUT2 module will not be equal, so under full power conditions the current may not be perfectly balanced. I1 module array is cooled equally, and the input and output impedances However, assuming that the are matched, a current imbalance is acceptable if the dissipation of this BCM module is the same as Load rated DC current of the module under others in the array. It is important never to exceed the maximum I2 any circumstances. ROUT ROUTPUT2 Arrays BCM Powered From (R) Module 2 Multiple Inputs Figure 3 addresses an arrangement in which the BCM modules are powered from separate inputs. Figure 3 Parallel Arrays from Separate Inputs VIN1 BCM(R) Module 1 ROUT I1 Load VIN2 I2 ROUT BCM(R) Module 2 In this example, input and output impedances are considered negligible. If VIN1 = VIN2 then the currents in both legs are equal. However assume the following: VIN1 = 48V VIN2 = 49V ROUT = 1m K = 1/32 ILOAD = 100A The two BCM modules must satisfy the following equation: VIN1 * K - IOUT1 * ROUT = VIN2 * K - IOUT2 * ROUT AN:016 Page 3 Also, IOUT1 + IOUT2 = 100A Solving the simultaneous equations for IOUT1 and IOUT2 yields: IOUT1 = 35A IOUT2 = 65A The same technique can be extended to include arrays with a larger number of BCM modules. If VIN1 - VIN2 > IOUT1 * ROUT, then BCM(R) Module 1 will attempt to backfeed current through BCM Module 2 to increase VIN2. To prevent reverse current in this situation, diodes can be added in series with +IN of each BCM module. Design Example Figure 4 shows an example array of seven high-voltage input 300W BCM bus converters to provide a total power of 2.1kW. Table 1 illustrates the measured currents for the laboratory layout shown in Figure 5. Even with less than ideal layout conditions (long wires, separate boards, use of standoffs to carry current), the overall sharing of the array is within 5%. BCM modules switch at >1MHz and have an effective output ripple of two times the switching frequency, so output filtering is provided using a small point-of-load capacitor in conjunction with trace inductance. The use of the input inductors confines the high-frequency ripple current of each module. Some input inductance between the modules inputs is necessary to minimize interactions between parallel connected modules and allow for proper operation for the array. Input inductance also reduces EMI and promotes the overall stability of the system by reducing (or eliminating) beat frequencies caused by the asynchronous switching of the BCM modules. Connecting the PC pins of the BCM modules in the array allows all units in the array to be enabled and disabled simultaneously. Simultaneous startup is required in cases where the array will start up into more current than one BCM module is sized to handle. AN:016 Page 4 Figure 4 BCM(R) Bus Converter Array Using Seven Modules PC RSV TM L1 1.5H B352F110T30 F2 350VDC +IN +OUT -IN -OUT PC RSV TM 2A 2A -OUT B352F110T30 F1 F4 +OUT -IN PC RSV TM L2 1.5H 1A +IN L3 1.5H B352F110T30 +IN +OUT -IN -OUT +OUT PC RSV TM L4 1.5H B352F110T30 C1 400F F3 +IN +OUT 11VDC -IN -OUT 190A PC RSV TM 2A L5 1.5H B352F110T30 +IN +OUT -IN -OUT - OUT PC RSV TM L6 1.5H B352F110T30 +IN +OUT -IN -OUT PC RSV TM L1 1.5H B352F110T30 +IN +OUT -IN -OUT PC Table 1 Seven BCM Bus Converter Array Current Sharing Module # U1 U2 U3 U4 U5 U6 U7 Worst-Case deviation from nominal (%) 48A Load (6.86A / BCM) 95A Load (13.6A / BCM) 143A Load (20.4A / BCM) 192A Load (27.5A / BCM) IBCM % Deviation IBCM % Deviation IBCM % Deviation IBCM % Deviation 5.9 7.1 6.7 7.4 7.1 7.2 6.8 14.0 3.4 2.4 7.9 3.4 5.0 0.9 12.6 13.2 13.6 14.4 14.0 14.0 13.5 7.4 0.0 2.9 19.2 19.9 20.6 21.3 20.8 20.9 20.4 5.9 1.0 2.0 27.6 27.3 27.7 27.4 27.5 27.7 27.2 0.4 0.7 0.0 14.0 2.9 5.9 2.9 0.7 7.4 AN:016 2.5 4.4 2.5 0.0 5.9 0.7 0.4 0.7 1.1 1.1 Page 5 Figure 5 Laboratory Demonstration of the Seven BCM Bus Converter Array General Guidelines 1. Always ensure that the BCM(R) bus converters are fused according to safety agency requirements. 2. PC pins of BCM modules should be connected together to enable and disable the modules simultaneously. 3. All signal and power traces should be laid out on the PCB to minimize noise coupling and impedance. For more details on PCB layout guidelines, please see AN:005. 4. An inductor should be placed in series with the +IN of each BCM bus converter in the array to minimize high frequency circulating currents in the primary as well as beat frequencies caused by asynchronous switching. 5. BCM modules fed from different sources with outputs in parallel must have appropriately matched inputs as the input voltage matching plays a critical role in current sharing. 6. In large arrays, routing issues may cause mismatching input and output impedances to each BCM module. In that case, varying trace widths should be used to equalize impedances between close and distant modules. 7. In large arrays, it may be difficult to match cooling for each BCM module in the array. In that case, heat sink design or airflow routing should be adjusted to equalize module cooling as much as possible. To optimize reliability, overall temperature should be as low as possible. 8. Load capacitors should be placed near the load. Refer to the BCM datasheet for the maximum output capacitor value in an array. In cases where the load bypassing capacitance must be placed near the BCMs, they should be created with individual capacitors distributed across each BCM output, rather than lumped on a single BCM output. Conclusion High power arrays can be created using the bus converters in parallel provided that care is taken in designing the input and output connections. BCM modules share inherently with inputs and outputs connected in parallel, with the positive temperature coefficient of ROUT reinforcing sharing. Assuming equal cooling, an array can operate at full power with accurate sharing and no derating. The array should be designed based on guidelines that optimize protection, efficiency, reliability, and minimize noise. AN:016 Page 6 Limitation of Warranties Information in this document is believed to be accurate and reliable. HOWEVER, THIS INFORMATION IS PROVIDED "AS IS" AND WITHOUT ANY WARRANTIES, EXPRESSED OR IMPLIED, AS TO THE ACCURACY OR COMPLETENESS OF SUCH INFORMATION. VICOR SHALL HAVE NO LIABILITY FOR THE CONSEQUENCES OF USE OF SUCH INFORMATION. IN NO EVENT SHALL VICOR BE LIABLE FOR ANY INDIRECT, INCIDENTAL, PUNITIVE, SPECIAL OR CONSEQUENTIAL DAMAGES (INCLUDING, WITHOUT LIMITATION, LOST PROFITS OR SAVINGS, BUSINESS INTERRUPTION, COSTS RELATED TO THE REMOVAL OR REPLACEMENT OF ANY PRODUCTS OR REWORK CHARGES). Vicor reserves the right to make changes to information published in this document, at any time and without notice. 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