(A) MOTOROLA MC14043B MC14044B CMOS MSI QUAD R-S LATCHES ing in an open circuit at the Q outputs. Double Diode Input Protection @ Three-State Outputs with Common Enable @ Supply Voitage Range = 3.0 Vdc to 18 Vdc The MC 140438 and MC 14044B quad R-S latches with MOS P-channel and N-channel enhancement m single monolithic structure. Each latch has an indepe and set and reset inputs. The Q outputs are gatec! state buffers having a common enable input. T! enabled with a logical 1 or high on the enable O" or tow disconnects the latch from the Q < Outputs Capable of Driving Two Low-power TT! Power Schottky TTL Load Over the Rated Teme: re constructed Je devices ina dent Q output hrough three- : outputs are put; a logical itputs, result- Loads or One Low- ature Range Ta L SUFFIX CERAMIC CASE 620 P SUFFIX PLASTIC CASE 648 . D SUFFIX 6 SOIC CASE 7518 ORDERING INFORMATION MC14XXXBCP Plastic MC14XXXBCL Ceramic MC14XXXBD = SOIC = -55 to 125C for all packages $1 9 r-O a1 7 RI s2 10 r-O 02 j Vop = 1 Vss = Pin 8 R2 NC = Pin 13 Pin 16 TRUTH TABLE $3 1 IO az , STRIE 5 x10 R3 Impedance Qa x High OFO] 1] No Change opi]. Qo of > > yoyt 1 Enadie yq4yd 1 X = Don't Care 4 w 6 | 2| V2 R00 13 ao 3 $36 O__+ o-- 9 > QI 7 MC 140448 R2 o 10 r-O a2 Vpb = Pin 16 _" Vssg = Pin8 $2 O+ NC = Pin2 4 R3 O 1 = O a3 TRUTH TABLE S|RieE a 15 x|x]o] High $3 O- Impedance O}O}1 0 5 o;1]1 1 Oo | >o-o >_ 1/041 QO Enable 1/141] No Change X = Dont Care i-1164 ae MC14043E MC14044B ELECTRICAL CHARACTERISTICS (Voltages Referenced to Vss, Vop 55C 25C 125C . Characteristic Symbol | vac - - - Unit Mi Max Min Typ # Max Min Max Output Voltage 0 Level 5.0 - 0.05 _ 0 0.05 _ 0.05 Vin = Vpp or 0 Vou 10 ~_ 0.05 0 0.05 0.05 | Vdc 15 _ 0.05 _ 8 0.05 _ 0.05 + Level 5.0 4. _ 4.95 5.0 _> 4.95 _ Vin = O or Vpop VOH 10 9.9 _ 9.95 10 9.95 | Vde 15 14.6 _ 1495 15 _ 1495 Input Voltage 0 Level (Vo = 4.5 or 0.5 Vde) Vv 5.0 _ 1.5 _ 2.25 1.5 _ 1.5 Vde (VQ = 9.0 or 1.0 Vdc) It 10 -- 3.0 450 3.0 3.0 (VO = 13.5 or 1.5 Vde) 15 - 4.0 _ 6.75 4.0 _ 40 1 Level (Vo = 0.5 or 4.5 Vdc) 5.0 3! _ 3.5 2.75 _ 3.5 _ v (VQ = 1.0 ar 9.0 Vdc) ViH 10 7 _ 7.0 550 7o }| de (Vo = 1.5 or 13.5 Vdc) 15 11 -_ in 8.25 _ 1 _ Output Drive Current (VOH = 2.5 Vdc) Source 5.0 -3 _ -2.4 ~4.2 _ -1.7 _ (VOH = 4.6 Vde) JOH 50 -0. 4 _ ~O51 0.88 _ 0.36 _ mAdc (VOH = 9.5 Vdc) 10 ~i = -13 } -2.25 ~ -09 |; (VOH = 13.5 Vde) 15 4 _ ~3.4 -8.8 _ -2.4 _ (VoL = 0.4 Vdc) Sink 5.0 0. _ 0.51 0.88 _~ 0.36 _ (VOL = 0.5 Vde) 1OL 10 1 _ 13 2.25 0.9 | mAdc (VOL = 1.5 Vdc) 15 4 3.4 8.8 ~ 2.4 Input Current lin 15 - +0.1 _ +0.00001; +0.1 _ 1.0 | wAdc Input Capacitance Cin - _ 5.0 75 _ _ pF (Vin = 9) Quiescent Current lop 50 - 1.0 _ 0.002 1.0 _ 30 {| wAde (Per Package) 10 - 2.0 0.004 2.0 _ 60 15 - 4.0 _ 0.006 4.0 120 Total Supply Current**t tr 5.0 ly = (058 pAVkKHz) f + Ipp nAdC {Dynamic plus Quiescent, 10 Ip = (1.15 wA/KHz) f + Ippo Per Package) 15 It = (1.73 pA/kHz) f + Ippo (CL = 50 pF on all outputs, aif buffers switching) Three-State Output Leakage Current TL 15 - | +201 / [=o0001f +01] | +30 | wade #Data labelled Typ is not to be used for design purposes but 15 intended as an indication of the iCs potential performance. The formulas given are for the typical characteristics only at 25 tTo calculate total supply current at loads other than 50 pF: tr(CL) = b(50 pF) + (Cy 50) Vk where: IT Is in wA (per package), Cy in pF, V = (Vpp Vgs) ir colts, f in kHz is input frequency, and k = 0 004 Maximum Ratings are those values beyond which damage to the device may :cur tTemperature Derating: Plastic P and D/DW" Packages: - 7.0 mWC From C To 125C Ceramic L Packages: - 12 mW/C From 100C To 1 53C ~117MC14t $3BeMC14044B sm ten F ho MAXIMUM RATINGS* (voltages Referenced to Vss! This device contains protection circuitry to Symbol Parameter Value Unit guard against damage due to high static Vv vattages or alectric fields. However, precau- Vop (OC Supply Voltage 9.5 to + 78.0 tions must be taken to avoid applications of Vin. Voutfinput or Output Voltage (BC or Transient) -O05toVoo +0.5 v any voltage higher than maximum rated voltages to this high-impedance circuit. For lin. Jout [input or Output Current (DC or Transient), per Pu +10 mA proper operation, Vin and Voyt should be Pp [Power Dissipation, per Packaget 500 mw Vana) a vit to the range Vsg * {Vin or , S out) = VDD- Tstg__Btorage Temperature = 85 to +150 c Unused inputs must always be tied to an ap- Th Lead Temperature (8-Second Soldering) 260 C Propriate logic voltage level (e.g., either Vg or Vop). Unused outputs must be left opan. Maximum Ratings are those values beyond which damage to the device ay occur tTemperature Derating: Plastic P and D/DW Packagas -70 mW/C Fm 65C To 125C Ceramic L" Packages: - 12 mWPC From 100. o 125C SWITCHING CHARACTERISTICS* (Cy =50pF,Ta: 35C) Cheracteristic Symbol \bD Min | Typ# | Max | Unit Output Rise Time tTLH ns tTLH @ (1.35 ns/pF) Cy, + 32.5 ns 6.0 - 100 200 tTLH = (0.60 ns/pF) CL + 20ns 40 - 50 100 tTLH = (0.40 ns/pF) Cy + 20 ns 15 - 40 80 Output Fail Time tTHL ns tTHL * (1.35 ns/pF) Cy + 32.5 ns 50 - 100 200 trHt = (0.60 ns/pF) CL + 20 ns 10 - 50 100 trHt = (0.40 ns/pF) CL + 20 ns 16 ~ 40 80 Propagation Delay Time tPLH ne teLH @ (0.90 ns/pF) Cy + 130 ns 5.0 ~ 175 350 tpLy = (0.36 ns/pF) Cy +57 08 10 ~ 75 175 tpLH + (0.26 ns/pF) Cy +47 ns 15 - 60 120 tpHy = (0.90 na/pF) Cy + 130 ns tPHL 5.0 - 178 350 ns tpHy = (0.90 ns/pF) Cy +57 ns 10 ~ 75 176 tpHL = (0.26 ns/pF) Cy +47 ns 15 - 60 120 Set, Set Pulse Width : w 5.0 200 0 - ns . 10 100 40 - 16 70 30 - _ w 5.0 200 80 - ns Reset, Reset Pulse Width 10 100 40 _ . 16 70 30 - Three-State Enable/Disable Delay tpLz. 5.0 _ 150 300 ne jPnz: 10 ~ 80 160 PZL: tpzu 15 - 55 110 The formulas given are tor the typical characteristics only at 25C #Data labelled "Typ" 13 not to be used for design purposes but ts intended as an indication of the IC's potential performance. 1 |} WAVEFORMS MC 140438 MC 140448 20 ns 20 ns 20 ns b=o-20 ns v Yon ne VOD 50% Set 50%. Set 10% ss 10% 20 ns par 20 me 20 ns ee lop _ 90% 50% \ Reset Reset 10% ss tTHLE tTLH - tTLH 30x C OH 50% Q 5O% a 10% , * OL PHL = Ls rtPLH 6-118MC14043E eMC14044B THREE-STATE EN: BLE/DISABLE DELAYS Yoo Set, Reset, Enable, and Switch Conditions for 3-State Tes! } MC14043B) MC140. 1B 51 TEST | ENABLE $1 $2 ais R s tpzy | ~/ |Open |closed| A |Vvpp] ss |Vss {Y Oureut i tpz. | _/ |Closed|open | 8} vgs} Vp0|VopIY 5 nee tpuz | \. [Open | Closed] A {Vpo| Vss |Vss| o CL = tprz | L_ [Closed{Open | 8 (Vss{Voo{Voo|" s T 50 oF Yoo Enable Yh s0% | nw Pit Yoo { 90% on 10% ~~ Vou pee tp; Og 30% Vss Vou Vss PIN. SSIGNMENT MC 140438 MC 140448 Nh Nw 1c a3 Vop [> 16 1c a3 Vop fa i 2 cj a0 R365 15 2c nc $3 > 15 3c AO $3 F114 3c] so AS F314 4c1s50 NC F513 4ccl ao ao F313 SCE $2 [512 sctie AZ 12 6cjsi R2 F511 6c Ai s2 11 7c A1 a2 F510 7COST a2 F310 8 C4 Vgs5 ai 9 8H Vss5 ai se NC = Vo Connection 3-119