AI00784B
11
A0-A10 Q0-Q7
VCC
M2716
G
EP
VSS
8
VPP
Fig ure 1. L og ic Diag ra m
M2716
NMOS 16K (2K x 8) UV EPROM
2048 x 8 ORGANIZATION
525mW Max AC TIVE POW E R, 132mW M a x
STANDBY POWER
ACC ESS TIM E:
M2716-1 is 350ns
M2716 is 450ns
SINGLE 5V SUPPL Y VOLTAGE
ST ATIC-NO CLOCKS REQUIRED
INPUT S and OUTP UT S TT L COMPATIBLE
D URING BOTH REA D and PROGR AM
MODES
THREE-STATE OU TPUT with TIED-OR-
CAPABILITY
EXTENDED TEMPERATURE RANGE
PROGRAMMING VOLTAGE: 25V
DESCRIPTION
The M2716 is a 16,384 bit UV erasable and elec-
trically programmable memory EPROM, ideally
suited for applications where fast turn around and
pattern experimentation are important require-
ments.
The M2716 is housed in a 24 pin W indow Ceramic
Frit-Seal Dual-in-Line package. The transparent lid
allows the user to expose the chip to ultraviolet light
to eras e the bit pattern. A new pattern can then b e
w ritten t o the devic e by following the programm i ng
procedure.
A0 - A10 Address Inputs
Q0 - Q7 Data Outputs
EP Chip Enable / Program
G Output Enable
VPP Program Supply
VCC Supply Voltage
VSS Ground
Table 1. Sign al Names
1
24
FDIP24W (F)
July 1994 1/9
Q2
VSS
A3
A0
Q0
Q1
A2
A1
G
Q5
A10
EP
Q3
VPP
Q7
Q6
Q4
A4
VCC
A7
AI00785
M2716
8
1
2
3
4
5
6
7
9
10
11
12
20
19
18
17
16
15
A6
A5 A9
A8
23
22
21
14
13
24
Fi gure 2. DIP Pin Connecti o ns
Symbol Parameter Value Unit
TAAmbient Operating Temperature grade 1
grade 6 0 to 70
–40 to 85 °C
TBIAS Temperature Under Bias grade 1
grade 6 –10 to 80
–50 to 95 °C
TSTG Storage Temperature –65 to 125 °C
VCC Supply Voltage –0.3 to 6 V
VIO Input or Output Voltages –0.3 to 6 V
VPP Program Supply –0.3 to 26.5 V
PDPower Dissipation 1.5 W
Note: Except for the rat ing "Operating Temperature Range", stresses a bove those l ist ed in the Table "Absolute Max imum Rati ngs " may cause
permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those
indi cated in the Operating sect ions of t hi s specification is not implied. Expos ure to Absolut e Maximum Rati ng conditions for extended periods
may affect device reliability. Refer also t o the SGS-THOMSON SURE Program and other relevant quality documents.
Table 2. Absol ute Maxim um Ratin g s
DEVI CE OPERATION
The M2716 has 3 modes of operation in the normal
sys tem environment. T hese are show n in Table 3.
Read Mode. The M2716 read operation requires
that G = VIL, EP = VIL and that addresses A0-A10
have b een stabilized. Valid data will appear on th e
output pins after time tAVQV, tGLQV or tELQV (see
Switching Time Waveforms) depending on which is
limiting.
Deselect Mode. The M2716 is deselected by mak-
ing G = VIH. This mode is independe nt of EP and
the condition of the addresses. The outputs are
Hi-Z when G = VIH. This allows tied-OR of 2 or more
M2716’s for memory expansion.
Standby Mode (Power Down). The M2716 may
be powered down to the standby m ode by mak ing
EP = VIH. This is indep endent of G and automat-
ically put s the o utputs in the Hi- Z state. The power
is reduced to 25% (132 mW max) of the normal
operating power. V CC and VPP must be maint ained
at 5V . Access time at power up remains either tAVQV
or tELQV (see Sw itching T i m e W avefor ms ).
Programming
The M2716 is shipped from SGS-THOMSON com-
pletely erased. All bits will be at “1" level (output
high) in this initial state and after any full erasure.
Table 3 shows the 3 programming modes.
Program Mode. The M2716 is programmed by
introducing “0"s into the desired locations. This is
done 8 bits (a byte) at a time. Any individual address,
se q uent i a l ad d res s es , or a dd re ss es c hos en at ra n-
dom may be programmed. Any or all of the 8 bits
associated with an address location may be pro-
grammed with a single program pulse applied to the
EP pin. All input voltage levels including the program
puls e on chip enable are TTL compatibl e.
The programming sequence is: with VPP = 25V , VCC
= 5V, G = VIH and EP = VIL, an addres s is select e d
and the desired data word is applied to the output
pins (VIL = “0" and VIH = ”1" for both address and
data). After the address and data signals are stable
the program pin is pulsed from VIL to VIH with a
2/9
M2716
pulse width between 45ms and 55ms. Multiple
pulses are not needed but will not cause device
damage. No pins should be left open. A high level
(VIH or higher) must not b e maintained longer t ha n
tPHPL (max) on the program pin during program-
ming. M2716’s may be programmed in parallel in
this mode.
Program Verify Mode. The programming of the
M2716 may be verified either one byte at a time
during the program ming (as shown in Figure 6) or
by reading all of the bytes out at the end of the
programming sequence. This can be done with
VPP = 25V or 5V in either case. VPP must be at 5V
for all operating modes and can be maintained at
25V for all programming modes.
Pro gram In hibi t Mode. The program inhibit m o de
allows several M2716’s to be programmed simul-
taneously with different data for each one by con-
trolling which ones receive the program pulse. All
similar inputs of the M2716 may be paralleled.
Pulsing the program pin (from VIL to VIH) will pro-
gram a unit while inhibiting the program pulse to a
unit will keep it from being programmed and keep-
ing G = VIH will put it s outputs in the Hi-Z state.
ERAS URE O PER ATIO N
The M2716 is erased by expos ure to high intensity
ultraviolet light through the transparent window.
This exposure discharges the floating gate to its
initial state through induced photo current. It is
recommended that the M2716 be kept out of direct
sunlight. The UV content of s unlight may cause
a partial eras ure of some bit s in a relativ ely short
period of tim e.
An ultraviolet source of 2537 Å yielding a total
integrated dosage of 15 watt-seconds/cm 2 power
rating is used. The M2716 to be erased sh ould be
placed 1 inch away from the lamp and no filters
should be used.
An erasure system should be calibrated peri-
odically. The erasure time is increased by the
square of the distance (if the distance is doubled
the erasure time goes up by a factor of 4) . Lamps
lose intensity as they age, it is therefore important
to periodic ally c heck t hat t he U V s ys tem is in good
order.
This will ensure that the EPROMs are being com-
pletely erased. Incomplete erasure will cause
symptoms that can be misleading. Prog rammers,
components , and system designs have been erro-
neously suspected when incomplete erasure was
the basic problem.
DEVI CE OPERATION (cont’d)
Mode EP GV
PP Q0 - Q7
Read VIL VIL VCC Data Out
Program VIH Pulse VIH VPP Data In
Verify VIL VIL VPP or VCC Data Out
Program Inhibit VIL VIH VPP Hi-Z
Deselect X VIH VCC Hi-Z
Standby VIH XV
CC Hi-Z
Note: X = VIH or VIL.
Table 3. Operating Modes
3/9
M2716
AI00827
2.4V
0.45V
2.0V
0.8V
Figure 3. AC Test ing Input O utp ut W avefo r m s
Input Rise and Fall Times 20ns
Input Pulse Voltages 0.45V to 2.4V
Input and Output Timing Ref. Voltages 0.8V to 2.0V
AC MEASUREMENT CONDITIONS
AI00828
1.3V
OUT
CL = 100pF
CL includes JIG capacitance
3.3k
1N914
DEVICE
UNDER
TEST
Fi gure 4. AC Testing Load Ci rcui t
Note that Output Hi-Z is defined as the point where data
is no longer driven.
Symbol Parameter Test Condition Min Max Unit
CIN Input Capacitance VIN = 0V 6 pF
COUT Output Capacitance VOUT = 0V 12 pF
Note: 1. Sampled only, not 100% tested.
Table 4. Cap acit ance (1) (TA = 2 5 °C, f = 1 MHz )
Symbol Parameter Test Condition Min Max Unit
ILI Input Leakage Current 0 VIN VCC ±10 µA
ILO Output Leakage Current VOUT = VCC, EP = VCC ±10 µA
ICC Supply Current EP = VIL, G = VIL 100 mA
ICC1 Supply Current (Standby) EP = VIH, G = VIL 25 mA
IPP Program Current VPP = VCC 5mA
V
IL Input Low Voltage –0.1 0.8 V
VIH Input High Voltage 2 VCC + 1 V
VOL Output Low Voltage IOL = 2.1mA 0.45 V
VOH Output High Voltage IOH =400µA 2.4 V
Note: 1. VCC must be applied simultaneously with or before VPP and removed simult aneously or after VPP.
Table 5. Read Mode DC Characteristi cs (1)
(TA = 0 to 70 °C or –40 to 85 °C; VCC = 5V ± 5% or 5V ± 10%; VPP = VCC)
4/9
M2716
AI00786
tAXQX
tEHQZ
DATA OUT
A0-A10
EP
G
Q0-Q7
tAVQV
tGHQZ
tGLQV
tELQV
VALID
Hi-Z
Figure 5. Read Mod e AC Waveforms
Symbol Alt Parameter Test Condition M2716 Unit
-1 blank
Min Max Min Max
tAVQV tACC Address Valid to Output Valid EP = VIL, G = VIL 350 450 ns
tELQV tCE Chip Enable Low to Output Valid G = VIL 350 450 ns
tGLQV tOE Output Enable Low to Output Valid EP = VIL 120 120 ns
tEHQZ (2) tOD Chip Enable High to Output Hi-Z G = VIL 0 100 0 100 ns
tGHQZ (2) tDF Output Enable High to Output Hi-Z EP = VIL 0 100 0 100 ns
tAXQX tOH Address Transition to Output Transition EP = VIL, G = VIL 00ns
Notes: 1. VCC must be applied simultaneously with or before VPP and removed simult aneously or after VPP.
2. Sampled only, not 10 0% tested.
Table 6. Read Mo de AC Charact eristi cs (1)
(TA = 0 to 70 °C or –40 to 85 °C; VCC = 5V ± 5% or 5V ± 10%; VPP = VCC)
Symbol Parameter Test Condition Min Max Unit
ILI Input Leakage Current VIL VIN VIH ±10 µA
ICC Supply Current 100 mA
IPP Program Current 5 mA
IPP1 Program Current Pulse EP = VIH Pulse 30 mA
VIL Input Low Voltage –0.1 0.8 V
VIH Input High Voltage 2 VCC + 1 V
Note: 1. VCC must be applied simultaneously with or before VPP and removed simult aneously or after VPP.
Table 7. Program ming Mode DC Characterist ics (1)
(TA = 25 °C; V CC = 5V ± 5%; VPP = 25V ± 1V)
5/9
M2716
Symbol Alt Parameter Test Condition Min Max Units
tAVPH tAS Address Valid to Program High G = VIH 2µs
tQVPH tDS Input Valid to Program High G = VIH 2µs
tGHPH tOS Output Enable High to Program
High 2µs
tPL1PL2 tPR Program Pulse Rise Time 5 ns
tPH1PH2 tPF Program Pulse Fall Time 5 ns
tPHPL tPW Program Pulse Width 45 55 ms
tPLQX tDH Program Low to Input Transition 2 µs
tPLGX tOH Program Low to Output Enable
Transition 2µs
tGLQV tOE Output Enable to Output Valid EP = VIL 120 ns
tGHQZ tDF Output Enable High to Output Hi-Z 0 100 ns
tPLAX tAH Program Low to Address Tr ansition 2 µs
Notes: 1. VCC must be applied simultaneously with or before VPP and remov ed si multaneously or aft er VPP.
2. Sampled only, not 100% tested.
Table 8. Prog rammi ng Mode AC Ch aracteri stics (1)
(TA = 25 °C; VCC = 5V ± 5%; VPP = 25V ± 1V)
AI00787
tGLQV
PROGRAM
DATA IN
A0-A10
EP
G
Q0-Q7 DATA OUT
tAVPH
tQVPH
tGHPH
tPLQX
tPLGX
tPHPL
tPLAX
tGHQZ
VERIFY
VALID
Figure 6. Progr ammi ng and Verify Modes AC W avefo r ms
6/9
M2716
Speed and VCC T olerance
-1 350 ns, 5V ±10%
blank 450 ns, 5V ±5%
Package
F FDIP24W
Temperature Range
1 0 to 70 °C
6 –40 to 85 °C
Exam ple: M2716 -1 F 1
OR D ERI NG I NF OR MATION S CH EM E
For a list of available options (Speed, VCC T olerance, Package, etc...) refer to the current Memory Shortform
catalogue.
For fur ther information on any aspect of this device, please contact S GS-THOM SON Sales O ffice nearest
to you.
7/9
M2716
FDIPW-a
A2
A1
A
L
B1 B e1
D
S
E1 E
N
1
CαeA
e3
Symb mm inches
Typ Min Max Typ Min Max
A 5.71 0.225
A1 0.50 1.78 0.020 0.070
A2 3.90 5.08 0.154 0.200
B 0.40 0.55 0.016 0.022
B1 1.17 1.42 0.046 0.056
C 0.22 0.31 0.009 0.012
D 32.30 1.272
E 15.40 15.80 0.606 0.622
E1 13.05 13.36 0.514 0.526
e1 2.54 0.100
e3 27.94 1.100
eA 16.17 18.32 0.637 0.721
L 3.18 4.10 0.125 0.161
S 1.52 2.49 0.060 0.098
7.11 0.280
α4°15°4°15°
N24 24
FDIP24W
Drawing is not to scale
FDIP24W - 24 pin Ceramic Frit-seal DIP, with window
8/9
M2716
Information furnished is believed to b e accurate an d r eliable. However, SGS-THOMSON Microelectronics assumes no responsibility fo r the
consequences of use o f such information nor for any infringement of patents or other rights of third parties which may result from its use. No
license is granted by implication or ot herwise under any patent o r pat ent rights of SGS-THOMSON Microelect ronic s. Specif ications mentioned
in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied.
SGS-THOMSON Microelectronics products are not authorized for use as critical components in life support devices or systems without express
written approval of SGS-THOMSON Mic roelectronics .
© 1994 SGS-THOMSON Mic roelectronics - All Rights Reserved
SGS-THOMSON Microelect ro nics GROUP OF COMPANIES
Australia - Brazil - China - France - Germany - Hong Kong - Italy - J apan - Korea - Malaysia - Malt a - Morocco - Th e Netherlan ds -
Singapore - Spain - S weden - Switz erland - Taiwan - Thailand - United Kingdom - U.S.A.
9/9
M2716