Not to scale
A4480
A4480-DS, Rev. 2
MCO-000191
FEATURES AND BENEFITS
Automotive AEC-Q100 qualified
Wide operating range of 3.5 to 28 V, with 40 V load
dump rating
Linear regulator output with foldback short-circuit and
short-to-battery protection
Boost function to maintain output when input is low
Power OK (POK) flag
High-voltage logic-level enable input (ENB) for
microprocessor or ignition control
Pin-to-pin and pin-to-ground tolerant at every pin
Wide Input 5 V, 50 mA, Automotive Regulator
with Output Short-to-Battery Protection and Power OK
Figure 1: Typical Application Circuit
PACKAGE
8-pin SOIC with exposed thermal pad (suffix LJ)
DESCRIPTION
The A4480 is a wide input regulator with complete control,
diagnostics, and protection features that address many
requirements of automotive applications. It includes a boost
function to allow operation with input voltages from 3.5 to
28 V, while maintaining a 5 V output voltage. The A4480 is
able to supply up to 50 mA of load current.
An enable pin (ENB) allows control of the regulator output.
This pin is rated to operate at up to 40 V, so it can be connected
directly to a car battery.
Diagnostic output from the A4480 includes an open-drain
Power OK (POK) output to alert the microprocessor that a
fault has occurred.
Protection features include input undervoltage lockout (UVLO),
foldback overcurrent protection, output under/overvoltage
protections (UV/OVP), and thermal shutdown (TSD). In
addition, the output is protected from a short-to-battery event.
The A4480 device is available in an 8-pin eSOIC package with
exposed pad for enhanced thermal dissipation. It is lead (PB)
free, with 100% matte tin leadframe plating.
IO Voltage
or VOUT
A4480
C2
C1
C3
C4
GND
VIN
VOUT
Enable from
µP or VIN ENB
POK
VOUT
VREG
CP2
CP1
VIN
R1
July 5, 2018
APPLICATIONS
Microcontroller power
Transceivers (CAN, LIN, etc.) power supplies
Sensors
Wide Input 5 V, 50 mA, Automotive Regulator
with Output Short-to-Battery Protection and Power OK
A4480
2
Allegro MicroSystems, LLC
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
ABSOLUTE MAXIMUM RATINGS*
Characteristic Symbol Notes Rating Unit
VIN, ENB, CP1 VIN, VENB, VCP1 −0.3 to 40 V
VCP2, VREG, VPOK VCP2, VREG, VPOK −0.3 to 20 V
VOUT VOUT Independent of VIN −1 to 40 V
Junction Temperature Range TJ−40 to 165 °C
Storage Temperature Range Tstg −40 to 150 °C
*Stresses beyond those listed in this table may cause permanent damage to the device. The absolute maximum ratings are stress
ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the Electrical Char-
acteristics table is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
SELECTION GUIDE
Part Number Temperature Range (°C) Package Leadframe Packing*
A4480KLJTR-T –40 to 150 8-pin eSOIC with exposed thermal pad Matte Tin 3000 pieces per 7-in. reel
*Contact Allegro for additional packing options.
THERMAL CHARACTERISTICS*: May require derating at maximum conditions; see application section for optimization
Characteristic Symbol Test Conditions* Value Unit
Package Thermal Resistance
(Junction to Ambient) RθJA eSOIC-8 with thermal pad (LJ) package on 4-layer PCB based on JEDEC standard 35 °C/W
*Additional thermal information available on the Allegro website.
Wide Input 5 V, 50 mA, Automotive Regulator
with Output Short-to-Battery Protection and Power OK
A4480
3
Allegro MicroSystems, LLC
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
Figure 2: Functional Block Diagram
VOUT
FOLDBACK
5 V
LDO
Short to VBAT
Protection
VOUT UV/OV
OCP
TSD
LDO2 Vcc
Charge Pump
GND
CP1
CP2
VREG
POK
VIN
ENB
Pinout Diagram
1
2
3
4
8
7
6
5
PAD
VIN
CP1
CP2
POK
VREG
VOUT
GND
ENB
Terminal List Table
Number Name Function
1 VIN Connection for input voltage. Connect a 2.2 µF capacitor from this pin
to GND. Keep capacitor close to A4480.
2 CP1
Internal charge pump flying capacitor connection, connect a 0.47 µF
ceramic capacitor from this pin to the CP2 pin. Keep capacitor close
to A4480.
3CP2 Internal charge pump flying capacitor connection, use a 0.47 µF
capacitor to CP1.
4 POK Open-drain active-high Power OK signal. Use a 100 kΩ pull-up
resistor to system IO rail or VOUT.
5 ENB Regulator active high enable input. Can be connected to VIN or logic
level signal.
6GND Ground pin.
7VOUT Regulated output pin. It is recommended to use a 4.7 µF ceramic
capacitor from this pin to GND. Keep capacitor close to A4480.
8 VREG
Charge pump output which is input to internal linear regulator.
Connect a 2.2 µF ceramic capacitor from this pin to GND. Keep
capacitor close to A4480.
Wide Input 5 V, 50 mA, Automotive Regulator
with Output Short-to-Battery Protection and Power OK
A4480
4
Allegro MicroSystems, LLC
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
Characteristics Symbol Test Conditions Min. Typ. Max. Units
INPUT VOLTAGE
Operating Input Voltage VIN ENB high and after VIN > 6.0 V 3.5 13.5 28 V
VIN UVLO Start Voltage VIN(START) VIN rising, ENB high 3.1 3.45 V
VIN UVLO Stop Voltage VIN(STOP) VIN falling, ENB high 2.6 2.9 V
VIN UVLO Hysteresis VIN(HYS) VIN(START) – VIN(STOP) 0.6 V
INPUT CURRENT
Input Quiescent Current
[1] IQVIN = 13.5 V, ENB high 4 mA
Input Sleep Supply Current
[1] IQ(SLEEP) VIN = 13.5 V, ENB low 1 10 µA
CHARGE PUMP
Output Voltage VREG
ENB high, 5 mA ≤ IOUT ≤ 50 mA, VIN = 3.95 V 5.25 7V
ENB high, 5 mA ≤ IOUT ≤ 33 mA, VIN = 3.5 V 5.25 7V
Switching Frequency fSW 325 kHz
Doubler to Pass Through Switchover VDOUBLER(H) VIN rising 7.8 8.65 V
Pass Through to Step Down Switchover VSTEPDOWN(H) VIN rising 11.5 12.45 V
Step Down to Pass Through Switchover VSTEPDOWN(L) VIN falling 10.5 11.7 V
Pass Through to Doubler Switchover VDOUBLER(L) VIN falling 6.9 7.5 V
5 V LINEAR REGULATOR
Accuracy and Load Regulation VOUT
5 mA ≤ IOUT ≤ 50 mA, 3.95 V ≤ VIN ≤ 28 V 4.9 5.0 5.1 V
5 mA ≤ IOUT ≤ 33 mA, 3.5 V ≤ VIN < 3.95 V 4.9 5.0 5.1 V
Output Capacitance Range
[2] COUT 3 10 µF
Startup Time
[2] tSTART COUT ≤ 4.7 µF, Load = 125 Ω ±5% (50 mA) 1.4 2.2 3.0 ms
LOGIN ENABLE (ENB) INPUT
ENB Threshold VENB(H) VENB rising 2.0 V
VENB(L) VENB falling 0.8 V
ENB Resistance RENB 100 kΩ
ENB Filter/Deglitch Time td(EN,FILT) 10 15 20 µs
ELECTRICAL CHARACTERISTICS [1]: Valid at 3.5 V ≤ VIN ≤ 28 V, −40°C ≤ TJ ≤ 150°C, unless otherwise specied
Continued on next page...
Wide Input 5 V, 50 mA, Automotive Regulator
with Output Short-to-Battery Protection and Power OK
A4480
5
Allegro MicroSystems, LLC
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
OVERCURRENT PROTECTION (OCP)
Current Limit
[1] ILIM VOUT = 5 V −60 −100 –140 mA
Foldback Current
[1] IFBK VOUT = 0 V −15 −30 −45 mA
THERMAL PROTECTION (TSD)
Thermal Shutdown Threshold
[2] TTSD TJ rising 165 °C
Thermal Shutdown Hysteresis
[2] THYS 15 °C
VOUT OV/UV PROTECTIONS
VOUT OV Thresholds VOV(H) VOUT rising, VIN = 13.5 V 5.15 5.33 5.50 V
VOV(L) VOUT falling, VIN = 13.5 V 5.30 V
VOUT OV Hysteresis VOV(HYS) VOV(H) – VOV(L), VIN = 13.5 V 15 50 mV
VOUT UV Thresholds VUV(H) VOUT rising, VIN = 13.5 V 4.71 V
VUV(L) VOUT falling, VIN = 13.5 V 4.50 4.68 4.85 V
VOUT UV Hysteresis VUV(HYS) VUV(H) – VUV(L), VIN = 13.5 V 15 50 mV
VOUT Output Disconnect Threshold VDISC VOUT rising, VIN = 13.5 V 7.2 V
POK OUTPUTS
POK Output Low Voltage VPOK(L) ENB high, VIN ≥ 3.5 V, IPOK = 1 mA 150 400 mV
POK Leakage Current
[1] IPOK(LKG) VPOK = 3.3 V 35 µA
OV and UV Filter/Deglitch Times
[2] td(FILT) Applies to undervoltage of the VOUT voltages 10 15 20 µs
[1] For input and output current specications, negative current is dened as coming out of the node or pin (sourcing), positive current is dened as going into the node or pin
(sinking).
[2] Ensured by design and characterization, not production tested.
ELECTRICAL CHARACTERISTICS (continued) [1]: Valid at 3.5 V ≤ VIN ≤ 28 V, −40°C ≤ TJ ≤ 150°C,
unless otherwise specied
Wide Input 5 V, 50 mA, Automotive Regulator
with Output Short-to-Battery Protection and Power OK
A4480
6
Allegro MicroSystems, LLC
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
Figure 3: Output Current Derating versus Input Voltage
Figure 4: Timing Diagram (not to scale)
V
UV(H)
td(filt)
V
UV(L)
V
ENB(H)
POK
VOUT
ENB
VIN
td(EN,FILT)
V
IN(STOP)
V
IN(START)
V
ENB(L)
V
OV(H)
V
OV(L)
V
DISC
td(filt)
Wide Input 5 V, 50 mA, Automotive Regulator
with Output Short-to-Battery Protection and Power OK
A4480
7
Allegro MicroSystems, LLC
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
Figure 5: Typical Application Schematic
VIN
GND
VOUT
GND
POK
SW1
A4480
CP1
2
VREG 8
ENB 5
VOUT 7
POK
4
GND 6
CP2
3
VIN
1
PAD
U1
2.2 µF
C1
0.47 µF
C2
2.2 µF
C3
4.7 µF
C4
100
R1
D1
BZX 84-C24
Optional*
D2
BAS 16
ENB
* Diodes D1 and D2 are only required if A4480 must be enabled when V
IN
is greater than 28 V.
If A4480 is already enabled before VIN is greater than 28 V or if A4480 is off then operation to 40 V
is possible without D1 and D2 diodes.
Wide Input 5 V, 50 mA, Automotive Regulator
with Output Short-to-Battery Protection and Power OK
A4480
8
Allegro MicroSystems, LLC
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
PERFORMANCE DATA
4.90
4.92
4.94
4.96
4.98
5.00
5.02
5.04
5.06
5.08
5.10
3813 18 23 28
Output Voltage (V)
Input Voltage (V)
4.98
4.99
5
5.01
5.02
5.03
5.04
5.05
5.06
0.00 0.01 0.02 0.03 0.04 0.05
Output Voltage (V)
Output Current (A)
Vin = 3.5V
Vin = 13V
Vin = 28V
0%
10%
20%
30%
40%
50%
60%
70%
80%
0.00 0.01 0.02 0.03 0.04 0.05
Efficicency
Output Current (A)
Vin = 3.5V
Vin = 13V
0
2
4
6
8
10
12
14
16
18
0 5 10 15 20 25 30
Temperature Rise (°C)
Input Voltage (V)
Line Regulation at 50 mA Load Regulation
Typical E󰀩ciency Estimated Temperature Rise
Wide Input 5 V, 50 mA, Automotive Regulator
with Output Short-to-Battery Protection and Power OK
A4480
9
Allegro MicroSystems, LLC
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
The A4480 contains a switching charge pump circuit, so care
must be taken when placing this part on the system PCB. The four
decoupling capacitors (C1, C2, C3, and C4) must be placed as
close to the A4480 as possible. Figure 6 below shows the recom-
mend layout. The input capacitor C1 is placed next to pin 1 of
the A4480 (U1). It connects directly to the pin 6 using copper on
the top side of the PCB. The charge pump flying capacitor (C2)
connects directly to pins 2 and 3 of A4480. The VREG capacitor
connects to pins 8 and 6; top-side copper should only be used for
this connection. The output capacitor (C4) connects to pins 7 and 8.
PCB LAYOUT GUIDELINES
Figure 6: Typical Layout of the A4480
The vias under the A4480 are recommended for improved ther-
mal performance. The ground copper plane should be a large as
possible to reduce the junction to ambient thermal impedance of
the A4480.
Wide Input 5 V, 50 mA, Automotive Regulator
with Output Short-to-Battery Protection and Power OK
A4480
10
Allegro MicroSystems, LLC
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
3.30
2
1
8
Reference land pattern layout (reference IPC7351
SOIC127P600X175-9AM); all pads a minimum of 0.20 mm from all
adjacent pads; adjust as necessary to meet application process
requirements and PCB layout tolerances; when mounting on a multilayer
PCB, thermal vias at the exposed thermal pad land can improve thermal
dissipation (reference EIA/JEDEC Standard JESD51-5)
PCB Layout Reference View
C
1.27
5.602.41
1.75
0.65
2.41 NOM
3.30 NOM
C
SEATING
PLANE
1.27 BSC
GAUGE PLANE
SEATING PLANE
ATerminal #1 mark area
B
C
B
21
8
C
SEATING
PLANE
C0.10
8X
0.25 BSC
1.04 REF
1.70 MAX
For Reference Only; not for tooling use (reference MS-012BA)
Dimensions in millimeters
Dimensions exclusive of mold flash, gate burrs, and dambar protrusions
Exact case and lead configuration at supplier discretion within limits shown
4.90 ±0.10
3.90 ±0.10 6.00 ±0.20
0.51
0.31 0.15
0.00
0.25
0.17
1.27
0.40
Exposed thermal pad (bottom surface); dimensions may vary with device
A
Branded Face
Figure 7: Package LJ, 8-Pin eSOIC
PACKAGE OUTLINE DRAWING
Wide Input 5 V, 50 mA, Automotive Regulator
with Output Short-to-Battery Protection and Power OK
A4480
11
Allegro MicroSystems, LLC
955 Perimeter Road
Manchester, NH 03103-3353 U.S.A.
www.allegromicro.com
For the latest version of this document, visit our website:
www.allegromicro.com
Copyright ©2018, Allegro MicroSystems, LLC
Allegro MicroSystems, LLC reserves the right to make, from time to time, such departures from the detail specifications as may be required to
permit improvements in the performance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that
the information being relied upon is current.
Allegro’s products are not to be used in any devices or systems, including but not limited to life support devices or systems, in which a failure of
Allegro’s product can reasonably be expected to cause bodily harm.
The information included herein is believed to be accurate and reliable. However, Allegro MicroSystems, LLC assumes no responsibility for its
use; nor for any infringement of patents or other rights of third parties which may result from its use.
Copies of this document are considered uncontrolled documents.
Revision History
Number Date Description
June 1, 2017 Initial release
1July 10, 2017 Updated Charge Pump Output Voltage test conditions (page 4), Accuracy and Load Regulation test
conditions (page 4), and Figure 3 (page 6).
2 July 5, 2018 Minor editorial updates