16-Bit Transceiver
f
ax id: 7041
CY74FCT16245T/2245T
CY74FCT16445T/2H245T
Cypress Semiconductor Corporation • 3901 North First Street • San Jose • CA 95134 • 408-943-2600
Jul
y
1994 – Revised October 30
,
1997
4
45T/2
Features
•Low pow er, pin- com patib le replac ement for ABT
functions
•FCT-E speed at 3.2 ns
•Power-off disable outputs permits live insertion
•Edge-rate control circuit ry for signifi cantl y improved
noise characteristics
•Typical output skew < 250 ps
•ESD > 2000V
•TSSOP (19.6 -mil pit ch) and SSOP (25-mil pi tch)
packages
•Industrial temperature range of –40°C to +85°C
•VCC = 5V ± 10%
CY74FCT16245T Features:
•64 mA sink current, 32 mA source current
•Typical VOLP (ground bounce)<1.0V at VCC = 5V,
TA = 25°C
CY74FCT162245T Features:
•Balanced output drivers: 24 mA
•Reduced system switc hing noi se
•Typical VOLP (ground bounce) <0.6V at VCC = 5V,
TA= 2 5° C
CY74FCT16445T Features:
•64 mA sink current, 32 mA source current
•Redu ces system loadi ng
CY74FCT162H245T Features:
•Bus hold on data inputs
•Eliminates the need for external pull-up or pull-down
resistors
Functional Description
These 16-bit transceivers are designed for use in bidirectional
synchronous communication between two buses, where high
speed and low power are required. With the exception of the
CY74FCT16245T, t hes e de vi ces c an be oper a ted ei ther a s two
independent octals or a single 16-bit transceiver. Direction of
data flow is controlled by (D IR), the Output Ena ble ( O E) tr ans-
fers data when LOW and isolates the buses when HIGH. The
output b uffers are d esigned with power off di sabl e capability to
allow for live insert ion of boards.
The CY74FCT16245T is ideally suited for driving
high-capa citance loads and lo w-imped ance backpl anes.
The CY74FCT162245T has 24-mA balanced output drivers
with current limiting resistors in the outputs. This reduces the
need f or ext ernal terminatin g resist ors and pro vi des f or minimal
undershoot and reduced ground bounce. The
CY74FCT162245T is ideal for driving transmission lines.
The CY74FCT16445T is designed for 16-bit operation, reduc-
ing control l ines from two OE and two DIR pins to one OE and
one DIR pin to reduce loading.
The CY74FCT162H24 5T is a 24- mA balanced out put part that
has bus hold on the data inputs. The device retains the input’s
last state whenever the input goes to high impedance. This
eliminates the need for pull-up/down resistors and prevents
floating i nputs.
GND
LogicBlock Diagrams CY74FCT16245T,CY74FCT162245T,
CY74FCT162H245T Pin Configuration
1
2
3
4
5
6
7
8
9
10
11
12
33
32
31
30
29
25
26
27
28
36
35
1DIR
34
SSOP/TSSOP
Top View
13
14
15
16
17
18
19
20
21
22
23
24
45
44
43
42
41
37
38
39
40
48
47
46
1B1
1B2
1B3
1B4
1A1
1A2
1A3
1A4
1OE
GND
GND
VCC
1B7
1B8
1B5
1B6
1A5
1A6
1A7
1A8
VCC
GND
GND
2B3
2B4
2B1
2B2
2A1
2A2
2A3
2A4
GND
GND
VCC
2B7
2B8
2B5
2B6
2A5
2A6
2A7
2A8
VCC
GND
2DIR 2OE
FCT16245–1
1A1
1A2
1A3
1A4
1A5
1A6
1A7
1OE
1B1
1B2
1B3
1B4
1B5
1B6
1B7
1DIR
1A8
1B8
FCT16245–2
2A1
2A2
2A3
2A4
2A5
2A6
2A7
2OE
2B1
2B2
2B3
2B4
2B5
2B6
2B7
2DIR
2A8
2B8FCT16245–3
16245T
162245T
162H2455T
CY74FCT16245T/2245T
CY74FCT16445T/2H245
2
Maximum Ratings[3, 4]
(Above which the useful life may be impaired. For user
guidelines, not tested.)
Storage Tempe rature ........................Com’l -55°C to +125°C
Ambient Temperature with
Power Applied....................................Com’l -55°C to +125°C
DC Input Voltage............................................ –0.5V to +7.0V
DC Output Voltage..........................................–0.5V to +7.0V
DC Output Current
(Maximum Sink Current/Pin)..... ..... ........... ...–60 to +120 mA
Power Dissipation..........................................................1.0W
Static Discharge Voltage ...........................................>2001V
(per MIL- STD-883, Method 3015)
Notes:
1. On CY74FCT162H245T these pins have bus hold.
2. H = HIGH Voltage Level. L = LOW Voltage Lev el. X = Don’t Care. Z = High Impedance.
3. Operation beyond the limits set forth may impair the useful life of the device. Unless otherwise noted, these limits are over the operating free-air temperature range.
4. Unused inputs must always be connected to an appropriate logic voltage level, preferably either VCC or ground.
GND
Logic Block DiagramCY74FCT16445T Pin Configuration
1
2
3
4
5
6
7
8
9
10
11
12
33
32
31
30
29
25
26
27
28
36
35
DIR
34
SSOP/TSSOP
Top Vie w
13
14
15
16
17
18
19
20
21
22
23
24
45
44
43
42
41
37
38
39
40
48
47
46
B1
B2
B3
B4
A1
A2
A3
A4
OE
GND
GND
VCC
B7
B8
B5
B6
A5
A6
A7
A8
VCC
GND
GND
B11
B12
B9
B10
A9
A10
A11
A12
GND
GND
VCC
B15
B16
B13
B14
A13
A14
A15
A16
VCC
GND
NC NC
A1
A2
A3
A4
OE
B1
B2
B3
B4
DIR
TO OTHER 12 CHANNELS
FCT16245–4
FCT16245–5
16445T
Pin Description
Name Description
OE Three-State Output Enable Inputs (Active LOW)
DIR Direction Control
AInputs or Three- State Out puts[1]
BInputs or Three- State Out puts[1]
Function Table[2]
Inputs
OutputsOE DIR
L L Bus B Data to Bus A
L H Bus A Data to Bus B
H X High Z State Operating Range
Range Ambient
Temperature VCC
Industrial –40°C to +85°C 5V ± 10%
CY74FCT16245T/2245T
CY74FCT16445T/2H245
3
Electrical Characteristics Over the Operating Range
Parameter Description Test Conditions Min. Typ.[5] Max. Unit
VIH Input HIGH Voltage 2.0 V
VIL Input LOW Voltage 0.8 V
VHInput Hyst eresi s[6] 100 mV
VIK Input Clamp Diode Voltage VCC=Min., IIN=–18 mA –0.7 –1.2 V
IIH Input HIGH Curr ent Standard VCC=Max., VI=VCC ±1µA
Bus Hold ±100
IIL Input LOW Current Standard VCC=Max., VI=GND ±1µA
Bus Hold ±100 µA
IBBH
IBBL Bus Hold Sustai n Current on Bus Hold Input[7] VCC=Min. VI=2.0V –50 µA
VI=0.8V +50
IBHHO
IBHLO Bus Hold Ov erdrive Curr ent on Bus Hold Input[7] VCC=Max., VI=1.5V TBD mA
IOZH High Impedance Output Current
(Three- State Out put pins) VCC=Max., VOUT=2.7V ±1µA
IOZL High Impedance Output Current
(Three- State Out put pins) VCC=Max., VOUT=0.5V ±1µA
IOS Short Circuit Current[8] VCC=Max., VOUT=GND –80 –140 –200 mA
IOOutput Drive Current[8] VCC=Max., VOUT=2.5V –50 –180 mA
IOFF Power-O ff D isabl e VCC=0V, VOUT≤4.5V[9] ±1µA
Output Drive Characteristics for CY74FCT16245T, CY74FCT16445T
Parameter Description Test Conditi ons Min. Typ.[5] Max. Unit
VOH Output HI GH Voltage VCC=Min., IOH=–3 mA 2.5 3.5 V
VCC=Min., IOH=–15 mA 2.4 3.5 V
VCC=Min., IOH=–32 mA 2.0 3.0 V
VOL Output LOW Voltage VCC=Min., IOL=64 mA 0.2 0.55 V
Output Drive Characteristics for CY74FCT162245T, CY74FCT162H245T
Parameter Description Test Conditi ons Min. Typ.[5] Max. Unit
IODL Output LOW Current[8] VCC=5V, VIN=VIH or VIL, VOUT=1.5V 60 115 150 mA
IODH Output HIGH Current[8] VCC=5V, VIN=VIH or VIL, VOUT=1.5V –60 –115 –150 mA
VOH Output HI GH Voltage VCC=Min., IOH=–24 mA 2.4 3.3 V
VOL Output LOW Voltage VCC=Min., IOL=24 mA 0.3 0.55 V
Notes:
5. Typical values are at VCC=5.0V, TA=+25°C ambient.
6. This parameter is guaranteed but not tested.
7. Pins with bus hold are described in Pin Description.
8. Not more than one output should be shorted at a time. Duration of short should not exceed one second. The use of high-speed test apparatus and/or sample
and hold techniques are preferable in order to minimize internal chip heating and more accurately reflect operational values. Otherwise prolonged shorti ng of
a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parametric tests. In any sequence of parameter
tests, IOS tests should be performed last.
9. Tested at +25°C.
CY74FCT16245T/2245T
CY74FCT16445T/2H245
4
Capacitance[6] (TA = +25°C, f = 1.0 MHz)
Parameter Description Test Conditions Typ.[5] Max. Unit
CIN Input Capacitance VIN = 0V 4.5 6.0 pF
COUT Output Capacitance VOUT = 0V 5.5 8.0 pF
Power Supply Characteri stic s
Parameter Description Test Conditions Typ.[5] Max. Unit
ICC Quies cent P ower Suppl y Current VCC=Max. VIN<0.2V,
VIN>VCC-0.2V 5500 µA
∆ICC Quies cent Power Supply Cur rent
(TTL input s HIGH) VCC=Max. VIN=3.4V[10] 0.5 1.5 mA
ICCD Dynami c Powe r Supply
Current[11] VCC=Max., O ne Input Toggling,
50% Duty Cycle, Outputs Open,
OE=DIR=GND
VIN=VCC or
VIN=GND 60 100 µA/MHz
ICTotal Powe r Suppl y Current[12] VCC=Max., f1=10 MHz,
50% Duty Cycle, Outputs Open,
One Bit Toggling,
OE=DIR=GND
VIN=VCC or
VIN=GND 0.6 1.5 mA
VIN=3.4V or
VIN=GND 0.9 2.3 mA
VCC=Max., f1=2.5 MHz, 50%
Duty Cycle, Outputs Open,
Sixteen Bits Toggling,
OE=DIR=GND
VIN=VCC or
VIN=GND 2.4 4.5[13] mA
VIN=3.4V or
VIN=GND 6.4 16.5[13] mA
Notes:
10. Per TTL dr iven input (VIN=3.4V); all other inputs at VCC or GND.
11. This parameter is not directly testable, but is derived for use in Total Power Supply calculations.
12. IC=I
QUIESCENT + IINPUTS + IDYNAMIC
IC=I
CC+∆ICCDHNT+ICCD(f0/2 + f1N1)
ICC = Quiescent Current with CMO S input levels
∆ICC = Power Supply Current for a TTL HIGH input (VIN=3.4V)
DH = Duty Cycle for TTL inputs HIGH
NT= Number of TTL inputs at DH
ICCD = Dynamic Current caused by an input transition pair (HLH or LHL)
f0= Clock frequency for registered devices, otherwise zero
f1= Input signal frequency
N1= Number of inputs changing at f1
All currents are in milliamps and all frequencies are in megahertz.
13. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tes ted.
CY74FCT16245T/2245T
CY74FCT16445T/2H245
5
]
Swi tch i ng C h aract er i sti cs Ove r the Opera ting Range[14]
Description
74FCT16245T
74FCT162245T
74FCT16445T
74FCT162H245T
74FCT16245AT
74FCT162245AT
74FCT16445AT
74FCT162H245AT Fig.
No.[15]
Parameter Min. Max. Min. Max. Unit
tPLH
tPHL Propagation Delay Data to Output
A to B, B to A 1.5 7.0 1.5 4.5 ns 1, 3
tPZH
tPZL Output Enable Time
OE to A or B 1.5 9.5 1.5 6.2 ns 1, 7, 8
tPHZ
tPLZ Output Disable Time
OE to A or B 1.5 7.5 1.5 5.0 ns 1, 7, 8
tPZH
tPZL Output Enable Time
DIR to A or B 1.5 9.5 1.5 6.2 ns 1, 7, 8
tPHZ
tPLZ Output Disable Time
DIR to A or B 1.5 7.5 1.5 5.0 ns 1, 7, 8
tSK(O) Output Skew[16] 0.5 0.5 ns —
Description
74FCT16245CT
74FCT162245CT
74FCT16445CT
74FCT162H245CT
74FCT16245ET
74FCT162245ET
74FCT162H245ET Fig.
No.[15]
Parameter Min. Max. Min. Max. Unit
tPLH
tPHL Propagation Dela y Data to Output
A to B, B to A 1.5 4.1 1.5 3.2 ns 1, 3
tPZH
tPZL Output Enable Time
OE to A or B 1.5 5.8 1.5 4.4 ns 1, 7, 8
tPHZ
tPLZ Output Disable Time
OE to A or B 1.5 4.8 1.5 4.0 ns 1, 7, 8
tPZH
tPZL Output Enable Time
DIR to A or B 1.5 5.8 1.5 4.8 ns 1, 7, 8
tPHZ
tPLZ Output Disable Time
DIR to A or B 1.5 4.8 1.5 4.0 ns 1, 7, 8
tSK(O) Output Skew[16] 0.5 0.5 ns —
Note:
14. Minimum l imits are guaranteed but not tested on Propagation Delays.
15. See “Parameter Measurement Information” in the General Informatio n section.
16. Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design.
CY74FCT16245T/2245T
CY74FCT16445T/2H245
6
Document #: 38-00389-C
Ordering Information CY74FCT16245
Speed
(ns) Ordering Code Package
Name Package Type Operating
Range
3.2 CY74FCT16245ETPAC Z48 48-Lead (240-Mil) TSSOP Industrial
CY74FCT16245ETPVC O48 48-Lead (300-Mil) SSOP
4.1 CY74FCT16245CTPAC Z48 48-Lead (240-Mil) TSSOP Industrial
CY74FCT16245CTPVC O48 48-Lead (300-Mil) SSOP
4.5 CY74FCT16245ATPAC Z48 48-Lead (240-Mil) TSSOP Industrial
CY74FCT16245ATPVC O48 48-Lead (300-Mil) SSOP
7.0 CY74FCT16245TPAC Z48 48-Lead (240-Mil) TSSOP Industrial
CY74FCT16245TPVC O48 48-Lead (300-Mil) SSOP
Ordering Information CY74FCT162245
Speed
(ns) Ordering Code Package
Name Package Type Operating
Range
3.2 CY74FCT162245ETPAC Z48 48-Lead (240-Mil) TSSOP Industrial
CY74FCT162245ETPVC O48 48-Lead (300-Mil) SSOP
4.1 CY74FCT162245CTPAC Z48 48-Lead (240-Mil) TSSOP Industrial
CY74FCT162245CTPVC O48 48-Lead (300-Mil) SSOP
4.5 CY74FCT162245ATPAC Z48 48-Lead (240-Mil) TSSOP Industrial
CY74FCT162245ATPVC O48 48-Lead (300-Mil) SSOP
7.0 CY74FCT162245TPAC Z48 48-Lead (240-Mil) TSSOP Industrial
CY74FCT162245TPVC O48 48-Lead (300-Mil) SSOP
Ordering Information CY74FCT16445
Speed
(ns) Ordering Code Package
Name Package Type Operating
Range
4.1 CY74FCT16445CTPAC Z48 48-Lead (240-Mil) TSSOP Industrial
CY74FCT16445CTPVC O48 48-Lead (300-Mil) SSOP
4.5 CY74FCT16445ATPAC Z48 48-Lead (240-Mil) TSSOP Industrial
CY74FCT16445ATPVC O48 48-Lead (300-Mil) SSOP
7.0 CY74FCT16445TPAC Z48 48-Lead (240-Mil) TSSOP Industrial
CY74FCT16445TPVC O48 48-Lead (300-Mil) SSOP
Ordering Information CY74FCT162H245
Speed
(ns) Ordering Code Package
Name Package Type Operating
Range
3.2 CY74FCT162H245ETPAC Z48 48-Lead (240-Mil) TSSOP Industrial
CY74FCT162H245ETPVC O48 48-Lead (300-Mil) SSOP
4.1 CY74FCT162H245CTPAC Z48 48-Lead (240-Mil) TSSOP Industrial
CY74FCT162H245CTPVC O48 48-Lead (300-Mil) SSOP
4.5 CY74FCT162H245ATPAC Z48 48-Lead (240-Mil) TSSOP Industrial
CY74FCT162H245ATPVC O48 48-Lead (300-Mil) SSOP
7.0 CY74FCT162H245TPAC Z48 48-Lead (240-Mil) TSSOP Industrial
CY74FCT162H245TPVC O48 48-Lead (300-Mil) SSOP
CY74FCT16245T/2245T
CY74FCT16445T/2H245
© Cypress Semiconductor Corporation, 1997. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use
of any circui try other th an circ uitry em bodied in a Cy press Semiconductor produc t. No r does i t c onvey or im ply an y license under patent or oth er rights . Cypress Semicond uctor does not author ize
its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress
Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges.
Package Di ag ra ms
48-Lead Shrunk Small Outline Package O48
48-Lead Thin Shrunk Small Outline Package Z48
