74LVC157A
Quad 2-input multiplexer
Rev. 9 — 19 March 2020 Product data sheet
1. General description
The 74LVC157A is a quad 2-input multiplexer which select four bits of data from two sources under
the control of a common select input (S). The four outputs present the selected data in the true
(non-inverted) form. The enable input (E) is active LOW. When pin E is HIGH, all of the outputs (1Y
to 4Y) are forced LOW regardless of all the other input conditions. Moving the data from two groups
of registers to four common output buses is a common use of the 74LVC157A. The state of the
common data select input (S) determines the particular register from which the data comes. It can
also be used as function generator.
It is useful for implementing highly irregular logic by generating any 4 of the 16 different functions of
two variables with one variable common.
The device is the logic implementation of a 4-pole, 2-position switch, where the position of the
switch is determined by the logic levels applied to pin S.
Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these devices
as translators in mixed 3.3 V and 5 V applications.
2. Features and benefits
5 V tolerant inputs for interfacing with 5 V logic
Wide supply voltage range from 1.2 V to 3.6 V
CMOS low power consumption
Direct interface with TTL levels
Complies with JEDEC standard:
••JESD8-7A (1.65 V to 1.95 V)
JESD8-5A (2.3 V to 2.7 V)
JESD8-C/JESD36 (2.7 V to 3.6 V)
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-B exceeds 200 V
CDM JESD22-C101E exceeds 1000 V
Specified from -40 °C to +85 °C and -40 °C to +125 °C
Nexperia 74LVC157A
Quad 2-input multiplexer
3. Ordering information
Table 1. Ordering information
PackageType number
Temperature range Name Description Version
74LVC157AD -40 °C to +125 °C SO16 plastic small outline package; 16 leads;
body width 3.9 mm
SOT109-1
74LVC157ADB -40 °C to +125 °C SSOP16 plastic shrink small outline package; 16 leads;
body width 5.3 mm
SOT338-1
74LVC157APW -40 °C to +125 °C TSSOP16 plastic thin shrink small outline package; 16 leads;
body width 4.4 mm
SOT403-1
74LVC157ABQ -40 °C to +125 °C DHVQFN16 plastic dual in-line compatible thermal enhanced
very thin quad flat package; no leads; 16 terminals;
body 2.5 × 3.5 × 0.85 mm
SOT763-1
4. Functional diagram
mna481
S
1
15
12974
131410116532
E
1Y
1I11I0
2Y
2I12I0
3Y
3I13I0
4Y
4I14I0
Fig. 1. Logic symbol
mna482
12
9
7
1G1
15 EN
1MUX
1
4
13
14
10
11
6
5
3
2
Fig. 2. IEC logic symbol
mna483
MULTIPLEXER
OUTPUTS
SELECTOR
1Y
2Y
3Y
4Y 12
9
7
4
S
13
151
14
10
11
6
5
3
2
E
1I0
1I1
2I0
2I1
3I0
3I1
4I0
4I1
Fig. 3. Functional diagram
74LVC157A All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2020. All rights reserved
Product data sheet Rev. 9 — 19 March 2020 2 / 16
Nexperia 74LVC157A
Quad 2-input multiplexer
1Y
1I1
1I0
2Y
2I1
2I0
3Y
3I1
3I0
mna484
4Y
4I1
4I0
S
E
Fig. 4. Logic diagram
5. Pinning information
5.1. Pinning
74LVC157A
S VCC
1I0 E
1I1 4I0
1Y 4I1
2I0 4Y
2I1 3I0
2Y 3I1
GND 3Y
001aac930
1
2
3
4
5
6
7
8
10
9
12
11
14
13
16
15
Fig. 5. Pin configuration for SO16 and (T)SSOP16
001aac931
74LVC157A
2Y 3I1
2I1 3I0
2I0 4Y
GND(1)
1Y 4I1
1I1 4I0
1I0 E
GND
3Y
S
V
C
C
Transparent top view
7 10
6 11
5 12
4 13
3 14
2 15
8
9
1
1
6
terminal 1
index area
(1) This is not a supply pin. There is no electrical or
mechanical requirement to solder the pad. In case
soldered, the solder land should remain floating or
connected to GND.
Fig. 6. Pin configuration for DHVQFN16
74LVC157A All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2020. All rights reserved
Product data sheet Rev. 9 — 19 March 2020 3 / 16
Nexperia 74LVC157A
Quad 2-input multiplexer
5.2. Pin description
Table 2. Pin description
Symbol Pin Description
S 1 common data select input
1I0 2 data input from source 0
1I1 3 data input from source 1
1Y 4 multiplexer output
2I0 5 data input from source 0
2I1 6 data input from source 1
2Y 7 multiplexer output
GND 8 ground (0 V)
3Y 9 multiplexer output
3I1 10 data input from source 1
3I0 11 data input from source 0
4Y 12 multiplexer output
4I1 13 data input from source 1
4I0 14 data input from source 0
E 15 enable input (active LOW)
VCC 16 supply voltage
6. Functional description
Table 3. Function table
H = HIGH voltage level; L = LOW voltage level; X = don’t care
Input Output
E S nI0 nI1 nY
HXXXL
LLLXL
L L H X H
L H X L L
L H X H H
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Product data sheet Rev. 9 — 19 March 2020 4 / 16
Nexperia 74LVC157A
Quad 2-input multiplexer
7. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Min Max Unit
VCC supply voltage -0.5 +6.5 V
IIK input clamping current VI < 0 -50 - mA
VIinput voltage [1] -0.5 +6.5 V
IOK output clamping current VO > VCC or VO < 0 - ±50 mA
VOoutput voltage [2] -0.5 VCC + 0.5 V
IOoutput current VO = 0 V to VCC - ±50 mA
ICC supply current - 100 mA
IGND ground current -100 - mA
Tstg storage temperature -65 +150 °C
Ptot total power dissipation Tamb = -40 °C to +125 °C [3] - 500 mW
[1] The minimum input voltage ratings may be exceeded if the input current ratings are observed.
[2] The output voltage ratings may be exceeded if the output current ratings are observed.
[3] For SOT109-1 (SO16) package: Ptot derates linearly with 12.4 mW/K above 110 °C.
For SOT338-1 (SSOP16) package: Ptot derates linearly with 8.5 mW/K above 91 °C.
For SOT403-1 (TSSOP16) package: Ptot derates linearly with 8.5 mW/K above 91 °C.
For SOT763-1 (DHVQFN16) package: Ptot derates linearly with 11.2 mW/K above 106 °C.
8. Recommended operating conditions
Table 5. Recommended operating conditions
Symbol Parameter Conditions Min Typ Max Unit
1.65 - 3.6 VVCC supply voltage
functional 1.2 - - V
VIinput voltage 0 - 5.5 V
VOoutput voltage 0 - VCC V
Tamb ambient temperature -40 - +125 °C
VCC = 1.65 V to 2.7 V 0 - 20 ns/VΔt/ΔV input transition rise and fall
rate VCC = 2.7 V to 3.6 V 0 - 10 ns/V
74LVC157A All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2020. All rights reserved
Product data sheet Rev. 9 — 19 March 2020 5 / 16
Nexperia 74LVC157A
Quad 2-input multiplexer
9. Static characteristics
Table 6. Static characteristics
At recommended operating conditions. Voltages are referenced to GND (ground = 0 V).
-40 °C to +85 °C -40 °C to +125 °CSymbol Parameter Conditions
Min Typ[1] Max Min Max
Unit
VCC = 1.2 V 1.08 - - 1.08 - V
VCC = 1.65 V to 1.95 V 0.65 x VCC - - 0.65 x VCC - V
VCC = 2.3 V to 2.7 V 1.7 - - 1.7 - V
VIH HIGH-level
input voltage
VCC = 2.7 V to 3.6 V 2.0 - - 2.0 - V
VCC = 1.2 V - - 0.12 - 0.12 V
VCC = 1.65 V to 1.95 V - - 0.35 x VCC - 0.35 x VCC V
VCC = 2.3 V to 2.7 V - - 0.7 - 0.7 V
VIL LOW-level
input voltage
VCC = 2.7 V to 3.6 V - - 0.8 - 0.8 V
VI = VIH or VIL
IO = -100 μA;
VCC = 1.65 V to 3.6 V
VCC - 0.2 - - VCC - 0.3 - V
IO = -4 mA; VCC = 1.65 V 1.2 - - 1.05 - V
IO = -8 mA; VCC = 2.3 V 1.8 - - 1.65 - V
IO = -12 mA; VCC = 2.7 V 2.2 - - 2.05 - V
IO = -18 mA; VCC = 3.0 V 2.4 - - 2.25 - V
VOH HIGH-level
output voltage
IO = -24 mA; VCC = 3.0 V 2.2 - - 2.0 - V
VI = VIH or VIL
IO = 100 μA;
VCC = 1.65 V to 3.6 V
- - 0.2 - 0.3 V
IO = 4 mA; VCC = 1.65 V - - 0.45 - 0.65 V
IO = 8 mA; VCC = 2.3 V - - 0.6 - 0.8 V
IO = 12 mA; VCC = 2.7 V - - 0.4 - 0.6 V
VOL LOW-level
output voltage
IO = 24 mA; VCC = 3.0 V - - 0.55 - 0.8 V
IIinput leakage
current
VCC = 3.6 V; VI = 5.5 V or GND - ±0.1 ±5 - ±20 μA
ICC supply current VCC = 3.6 V; VI = VCC or GND;
IO = 0 A
- 0.1 10 - 40 μA
ΔICC additional
supply current
per input pin; VI = VCC - 0.6 V;
VCC = 2.7 V to 3.6 V; IO = 0 A
- 5 500 - 5000 μA
CIinput
capacitance
VCC = 0 V to 3.6 V;
VI = GND to VCC
- 5.0 - - - pF
[1] All typical values are measured at VCC = 3.3 V (unless stated otherwise) and Tamb = 25 °C.
74LVC157A All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2020. All rights reserved
Product data sheet Rev. 9 — 19 March 2020 6 / 16
Nexperia 74LVC157A
Quad 2-input multiplexer
10. Dynamic characteristics
Table 7. Dynamic characteristics
Voltages are referenced to GND (ground = 0 V). For test circuit see Fig. 9.
-40 °C to +85 °C -40 °C to +125 °CSymbol Parameter Conditions
Min Typ[1] Max Min Max
Unit
nI0, nI1 to nY; see Fig. 7 [2]
VCC = 1.2 V - 16 - - - ns
VCC = 1.65 V to 1.95 V 1.0 4.8 10.2 1.0 11.8 ns
VCC = 2.3 V to 2.7 V 1.5 2.8 5.8 1.5 6.7 ns
VCC = 2.7 V 1.0 2.9 5.9 1.0 7.5 ns
VCC = 3.0 V to 3.6 V 1.0 2.5 5.2 1.0 6.5 ns
E to nY; see Fig. 8 [2]
VCC = 1.2 V - 17 - - - ns
VCC = 1.65 V to 1.95 V 0.5 4.8 12.8 0.5 14.7 ns
VCC = 2.3 V to 2.7 V 1.5 2.8 7.2 1.5 8.3 ns
VCC = 2.7 V 1.0 2.9 7.8 1.0 10.0 ns
VCC = 3.0 V to 3.6 V 1.0 2.6 6.5 1.0 8.5 ns
S to nY; see Fig. 7 [2]
VCC = 1.2 V - 16 - - - ns
VCC = 1.65 V to 1.95 V 1.0 5.1 12.4 1.0 14.3 ns
VCC = 2.3 V to 2.7 V 1.5 3.0 7.0 1.5 8.1 ns
VCC = 2.7 V 1.0 3.1 7.3 1.0 9.5 ns
tpd propagation delay
VCC = 3.0 V to 3.6 V 1.0 2.7 6.3 1.0 8.0 ns
tsk(o) output skew time VCC = 3.0 V to 3.6 V [3] - - 1.0 - 1.5 ns
per input; VI = GND to VCC [4]
VCC = 1.65 V to 1.95 V - 9.4 - - - pF
VCC = 2.3 V to 2.7 V - 12.8 - - - pF
CPD power dissipation
capacitance
VCC = 3.0 V to 3.6 V - 15.9 - - - pF
[1] Typical values are measured at Tamb = 25 °C and VCC = 1.2 V, 1.8 V, 2.5 V, 2.7 V, and 3.3 V respectively.
[2] tpd is the same as tPLH and tPHL.
[3] Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design.
[4] CPD is used to determine the dynamic power dissipation (PD in μW).
PD = CPD × VCC
2 x fi x N + ∑(CL x VCC
2 x fo) where:
fi = input frequency in MHz; fo = output frequency in MHz
CL = output load capacitance in pF
VCC = supply voltage in V
N = number of inputs switching
∑(CL x VCC
2 x fo) = sum of outputs
74LVC157A All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2020. All rights reserved
Product data sheet Rev. 9 — 19 March 2020 7 / 16
Nexperia 74LVC157A
Quad 2-input multiplexer
10.1. Waveforms and test circuit
mna486
tPHL tPLH
VM
VM
nI0, nI1, S
input
nY output
GND
VI
VOH
VOL
VM = 1.5 V at VCC ≥ 2.7 V; VM = 0.5 x VCC at VCC < 2.7 V.
VOL and VOH are typical output voltage levels that occur with the output load.
Fig. 7. Data inputs (nI0, nI1) and common data select input (S) to output (nY) propagation delays
mna485
tPHL tPLH
VM
VM
E input
nY output
GND
VCC
VOH
VOL
VM = 1.5 V at VCC ≥ 2.7 V; VM = 0.5 x VCC at VCC < 2.7 V.
VOL and VOH are typical output voltage levels that occur with the output load.
Fig. 8. Enable input (E) to output (nY) propagation delays
74LVC157A All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2020. All rights reserved
Product data sheet Rev. 9 — 19 March 2020 8 / 16
Nexperia 74LVC157A
Quad 2-input multiplexer
Test data is given in Table 8. Definitions for test circuit:
RL = Load resistance.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
Fig. 9. Test circuit for measuring switching times
Table 8. Test data
Input LoadSupply voltage
VItr, tfCLRL
1.2 V VCC ≤ 2 ns 30 pF 1 kΩ
1.65 V to 1.95 V VCC ≤ 2 ns 30 pF 1 kΩ
2.3 V to 2.7 V VCC ≤ 2 ns 30 pF 500 Ω
2.7 V 2.7 V ≤ 2.5 ns 50 pF 500 Ω
3.0 V to 3.6 V 2.7 V ≤ 2.5 ns 50 pF 500 Ω
74LVC157A All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2020. All rights reserved
Product data sheet Rev. 9 — 19 March 2020 9 / 16
Nexperia 74LVC157A
Quad 2-input multiplexer
11. Package outline
X
w M
θ
A
A
1
A
2
b
p
D
H
E
L
p
Q
detail X
E
Z
e
c
L
v M A
(A )
3
A
8
9
1
16
y
pin 1 index
UNIT A
max. A
1 A
2 A
3 b
p c D
(1) E
(1) (1)
e H
E L L
p Q Z y w v θ
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
mm
inches
1.75 0.25
0.10
1.45
1.25 0.25 0.49
0.36
0.25
0.19
10.0
9.8
4.0
3.8 1.27 6.2
5.8
0.7
0.6
0.7
0.3 8
0
o
o
0.25 0.1
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
1.0
0.4
SOT109-1 99-12-27
03-02-19
076E07 MS-012
0.069 0.010
0.004
0.057
0.049 0.01 0.019
0.014
0.0100
0.0075
0.39
0.38
0.16
0.15 0.05
1.05
0.041
0.244
0.228
0.028
0.020
0.028
0.012
0.01
0.25
0.01 0.004
0.039
0.016
0 2.5 5 mm
scale
SO16: plastic small outline package; 16 leads; body width 3.9 mm SOT109-1
Fig. 10. Package outline SOT109-1 (SO16)
74LVC157A All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2020. All rights reserved
Product data sheet Rev. 9 — 19 March 2020 10 / 16
Nexperia 74LVC157A
Quad 2-input multiplexer
UNIT A
1 A
2 A
3 b
p c D
(1) E
(1) e H
E L L
p Q Z y w v θ
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
mm 0.21
0.05
1.80
1.65 0.25 0.38
0.25
0.20
0.09
6.4
6.0
5.4
5.2 0.65 1.25
7.9
7.6
1.03
0.63
0.9
0.7
1.00
0.55
8
0
o
o
0.13 0.2 0.1
DIMENSIONS (mm are the original dimensions)
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
SOT338-1 99-12-27
03-02-19
(1)
w M
b
p
D
H
E
E
Z
e
c
v M A
X
A
y
1 8
16 9
θ
A
A
1
A
2
L
p
Q
detail X
L
(A )
3
MO-150
pin 1 index
0 2.5 5 mm
scale
SSOP16: plastic shrink small outline package; 16 leads; body width 5.3 mm SOT338-1
A
max.
2
Fig. 11. Package outline SOT338-1 (SSOP16)
74LVC157A All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2020. All rights reserved
Product data sheet Rev. 9 — 19 March 2020 11 / 16
Nexperia 74LVC157A
Quad 2-input multiplexer
UNIT A
1 A
2 A
3 b
p c D
(1) E (2) (1)
e H
E L L
p Q Z y w v θ
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
mm 0.15
0.05
0.95
0.80
0.30
0.19
0.2
0.1
5.1
4.9
4.5
4.3 0.65 6.6
6.2
0.4
0.3
0.40
0.06
8
0
o
o
0.13 0.1 0.2 1
DIMENSIONS (mm are the original dimensions)
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
0.75
0.50
SOT403-1 MO-153 99-12-27
03-02-18
w M
b
p
D
Z
e
0.25
1 8
16 9
θ
A
A
1
A
2
L
p
Q
detail X
L
(A )
3
H
E
E
c
v M A
X
A
y
0 2.5 5 mm
scale
TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT403-1
A
max.
1.1
pin 1 index
Fig. 12. Package outline SOT403-1 (TSSOP16)
74LVC157A All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2020. All rights reserved
Product data sheet Rev. 9 — 19 March 2020 12 / 16
Nexperia 74LVC157A
Quad 2-input multiplexer
terminal 1
index area
0.5 1
A1 Eh
b
UNIT y e
0.2
c
REFERENCES
OUTLINE
VERSION
EUROPEAN
PROJECTION ISSUE DATE
IEC JEDEC JEITA
mm 3.6
3.4
Dh
2.15
1.85
y1
2.6
2.4
1.15
0.85
e1
2.5
0.30
0.18
0.05
0.00 0.05 0.1
DIMENSIONS (mm are the original dimensions)
SOT763-1 MO-241 - - - - - -
0.5
0.3
L
0.1
v
0.05
w
0 2.5 5 mm
scale
SOT763-1
DHVQFN16: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads;
16 terminals; body 2.5 x 3.5 x 0.85 mm
A(1)
max.
A
A1
c
detail X
y
y1 C
e
L
Eh
Dh
e
e1
b
2 7
15 10
9
8
1
16
X
D
E
C
B A
terminal 1
index area
A C
C
B
v M
w M
E
(1)
Note
1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.
D
(1)
02-10-17
03-01-27
Fig. 13. Package outline SOT763-1 (DHVQFN16)
74LVC157A All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2020. All rights reserved
Product data sheet Rev. 9 — 19 March 2020 13 / 16
Nexperia 74LVC157A
Quad 2-input multiplexer
12. Abbreviations
Table 9. Abbreviations
Acronym Description
CDM Charged Device Model
CMOS Complementary Metal-Oxide Semiconductor
DUT Device Under Test
ESD ElectroStatic Discharge
HBM Human Body Model
MM Machine Model
TTL Transistor-Transistor Logic
13. Revision history
Table 10. Revision history
Document ID Release date Data sheet status Change notice Supersedes
74LVC157A v.9 20200319 Product data sheet - 74LVC157A v.8
Modifications: Table 4: Derating values for Ptot total power dissipation updated.
74LVC157A v.8 20171011 Product data sheet - 74LVC157A v.7
Modifications: The format of this data sheet has been redesigned to comply with the identity guidelines of
Nexperia.
Legal texts have been adapted to the new company name where appropriate.
74LVC157A v.7 20111125 Product data sheet - 74LVC157A v.6
Modifications: Table 7: maximum values for lower voltage ranges changed (errata).
74LVC157A v.6 20111027 Product data sheet - 74LVC157A v.5
Modifications: The format of this document has been redesigned to comply with the new identity guidelines of
NXP Semiconductors.
Legal texts have been adapted to the new company name where appropriate.
Table 4, Table 5, Table 6, Table 7, and Table 8: values added for lower voltage ranges.
74LVC157A v.5 031202 Product specification - 74LVC157A v.4
74LVC157A v.4 030617 Product specification - 74LVC157A v.3
74LVC157A v.3 020315 Product specification - 74LVC157A v.2
74LVC157A v.2 980729 Product specification - -
74LVC157A All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2020. All rights reserved
Product data sheet Rev. 9 — 19 March 2020 14 / 16
Nexperia 74LVC157A
Quad 2-input multiplexer
14. Legal information
Data sheet status
Document status
[1][2]
Product
status [3]
Definition
Objective [short]
data sheet
Development This document contains data from
the objective specification for
product development.
Preliminary [short]
data sheet
Qualification This document contains data from
the preliminary specification.
Product [short]
data sheet
Production This document contains the product
specification.
[1] Please consult the most recently issued document before initiating or
completing a design.
[2] The term 'short data sheet' is explained in section "Definitions".
[3] The product status of device(s) described in this document may have
changed since this document was published and may differ in case of
multiple devices. The latest product status information is available on
the internet at https://www.nexperia.com.
Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. Nexperia does not give any representations or
warranties as to the accuracy or completeness of information included herein
and shall have no liability for the consequences of use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is
intended for quick reference only and should not be relied upon to contain
detailed and full information. For detailed and full information see the relevant
full data sheet, which is available on request via the local Nexperia sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
Nexperia and its customer, unless Nexperia and customer have explicitly
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74LVC157A All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2020. All rights reserved
Product data sheet Rev. 9 — 19 March 2020 15 / 16
Nexperia 74LVC157A
Quad 2-input multiplexer
Contents
1. General description...................................................... 1
2. Features and benefits.................................................. 1
3. Ordering information....................................................2
4. Functional diagram.......................................................2
5. Pinning information......................................................3
5.1. Pinning.........................................................................3
5.2. Pin description............................................................. 4
6. Functional description................................................. 4
7. Limiting values............................................................. 5
8. Recommended operating conditions..........................5
9. Static characteristics....................................................6
10. Dynamic characteristics............................................ 7
10.1. Waveforms and test circuit........................................ 8
11. Package outline........................................................ 10
12. Abbreviations............................................................ 14
13. Revision history........................................................14
14. Legal information......................................................15
© Nexperia B.V. 2020. All rights reserved
For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
Date of release: 19 March 2020
74LVC157A All information provided in this document is subject to legal disclaimers. © Nexperia B.V. 2020. All rights reserved
Product data sheet Rev. 9 — 19 March 2020 16 / 16