 
    
SCLS109G − MARCH 1984 − REVISED APRIL 2004
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
DWide Operating Voltage Range of 2 V to 6 V
DOutputs Can Drive Up To 10 LSTTL Loads
DLow Power Consumption, 80-µA Max ICC
DTypical tpd = 16 ns
D±4-mA Output Drive at 5 V
DLow Input Current of 1 µA Max
DEncode Eight Data Lines to 3-Line Binary
(Octal)
DApplications Include:
− n-Bit Encoding
− Code Converters and Generators
description/ordering information
The ’HC148 devices feature priority decoding of
the inputs to ensure that only the highest-order
data line is encoded. These devices encode eight
data lines to 3-line (4-2-1) binary (octal).
Cascading circuitry (enable input EI and enable
output EO) has been provided to allow octal
expansion without the need for external circuitry.
Data inputs and outputs are active at the low logic
level.
ORDERING INFORMATION
TAPACKAGE†ORDERABLE
PART NUMBER TOP-SIDE
MARKING
PDIP − N Tube of 25 SN74HC148N SN74HC148N
Tube of 40 SN74HC148D
−40°C to 85°C
SOIC − D Reel of 2500 SN74HC148DR HC148
−40°C to 85°C
SOIC − D
Reel of 250 SN74HC148DT
HC148
SOIC − DW Reel of 2000 SN74HC148DWR HC148
SOP − NS Reel of 2000 SN74HC148NSR HC148
CDIP − J Tube of 25 SNJ54HC148J SNJ54HC148J
−55°C to 125°CCFP − W Tube of 150 SNJ54HC148W SNJ54HC148W
−55 C to 125 C
LCCC − FK Tube of 55 SNJ54HC148FK SNJ54HC148FK
†Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications o
f
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
3212019
910111213
4
5
6
7
8
18
17
16
15
14
GS
3
NC
2
1
6
7
NC
EI
A2
5
4
NC
A0
0V
EO
A1
GND
NC
SN54HC148 . . . FK PACKAGE
(TOP VIEW)
CC
NC − No internal connection
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
4
5
6
7
EI
A2
A1
GND
VCC
EO
GS
3
2
1
0
A0
SN54HC148 ...J OR W PACKAGE
SN74HC148 . . . D, DW, N, OR NS PACKAGE
(TOP VIEW)
Copyright 2004, Texas Instruments Incorporated
   ! "#$ !  %#&'" ($)
(#"! "  !%$""! %$ *$ $!  $+! !#$!
!(( ,-) (#" %"$!!. ($!  $"$!!'- "'#($
$!.  '' %$$!)
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%"$!!. ($!  $"$!!'- "'#($ $!.  '' %$$!)
 
    
SCLS109G − MARCH 1984 − REVISED APRIL 2004
2POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
FUNCTION TABLE
INPUTS OUTPUTS
EI 0 1 2 3 4 5 6 7 A2 A1 A0 GS EO
H X X X X X X X X H H H H H
L H HHHHHHHHHHHL
L X XXXXXXLLLLLH
L X XXXXXLHLLHLH
L X XXXXLHHLHLLH
L X XXXLHHHLHHLH
L X XXLHHHHHLLLH
L X XLHHHHHHLHLH
L X LHHHHHHHHLLH
L L H H H H H H H H H H L H
 
    
SCLS109G − MARCH 1984 − REVISED APRIL 2004
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
logic diagram (positive logic)
11
A0
9
1
A1
7
A2
6
GS
14
EO
15
12
2
13
3
1
4
2
5
5
EI
4
7
3
6
10
0
Pin numbers shown are for the D, DW, J, N, NS, and W packages.
 
    
SCLS109G − MARCH 1984 − REVISED APRIL 2004
4POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, VCC −0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, IIK (VI < 0 or VI > VCC) (see Note 1) ±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output clamp current, IOK (VO < 0 or VO > VCC) (see Note 1) ±20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous output current, IO (VO = 0 to VCC) ±25 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous current through VCC or GND ±50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance, θJA (see Note 2): D package 73°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DW package 57°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
N package 67°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
NS package 64°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, Tstg −65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions (see Note 3)
SN54HC148 SN74HC148
UNIT
MIN NOM MAX MIN NOM MAX
UNIT
VCC Supply voltage 2 5 6 2 5 6 V
VCC = 2 V 1.5 1.5
V
IH
High-level input voltage VCC = 4.5 V 3.15 3.15 V
VIH
High-level input voltage
VCC = 6 V 4.2 4.2
V
VCC = 2 V 0.5 0.5
V
IL
Low-level input voltage VCC = 4.5 V 1.35 1.35 V
VIL
Low-level input voltage
VCC = 6 V 1.8 1.8
V
VIInput voltage 0 VCC 0 VCC V
VOOutput voltage 0 VCC 0 VCC V
VCC = 2 V 1000 1000
∆t/∆vInput transition rise/fall time VCC = 4.5 V 500 500 ns
∆t/∆v
Input transition rise/fall time
VCC = 6 V 400 400
ns
TAOperating free-air temperature −55 125 −40 85 °C
NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
 
    
SCLS109G − MARCH 1984 − REVISED APRIL 2004
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
VCC
TA = 25°C SN54HC148 SN74HC148
UNIT
PARAMETER
TEST CONDITIONS
V
CC MIN TYP MAX MIN MAX MIN MAX
UNIT
2 V 1.9 1.998 1.9 1.9
I
OH
= −20 µA4.5 V 4.4 4.499 4.4 4.4
V
OH
V
= V
or V
IOH = −20 µA
6 V 5.9 5.999 5.9 5.9 V
VOH
IOH = −4 mA 4.5 V 3.98 4.3 3.7 3.84
V
IOH = −5.2 mA 6 V 5.48 5.8 5.2 5.34
2 V 0.002 0.1 0.1 0.1
I
OL
= 20 µA4.5 V 0.001 0.1 0.1 0.1
V
OL
V
= V
or V
IOL = 20 µA
6 V 0.001 0.1 0.1 0.1 V
VOL
IOL = 4 mA 4.5 V 0.17 0.26 0.4 0.33
V
IOL = 5.2 mA 6 V 0.15 0.26 0.4 0.33
IIVI = VCC or 0 6 V ±0.1 ±100 ±1000 ±1000 nA
ICC VI = VCC or 0, IO = 0 6 V 8 160 80 µA
Ci2 V to 6 V 3 10 10 10 pF
switching characteristics over recommended operating free-air temperature range, CL = 50 pF
(unless otherwise noted) (see Figure 1)
PARAMETER
FROM
TO
VCC
TA = 25°C SN54HC148 SN74HC148
UNIT
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
V
CC MIN TYP MAX MIN MAX MIN MAX
UNIT
2 V 69 180 270 225
1−7 A0, A1, or A2 4.5 V 23 36 54 45
1−7
A0, A1, or A2
6 V 21 31 46 38
2 V 60 150 225 190
EO 4.5 V 20 30 45 38
0−7
EO
6 V 17 26 38 33
0−7 2 V 75 190 285 240
GS 4.5 V 25 38 57 48
tpd
GS
6 V 21 32 48 41
ns
tpd 2 V 78 195 295 245 ns
A0, A1, or A2 4.5 V 26 39 59 49
A0, A1, or A2
6 V 22 33 50 42
2 V 57 145 220 180
EI GS 4.5 V 19 29 44 36
EI
GS
6 V 16 25 38 31
2 V 66 165 250 205
EO 4.5 V 22 33 50 41
EO
6 V 19 28 43 35
2 V 28 75 110 95
t
t
Any 4.5 V 8 15 22 19 ns
tt
Any
6 V 6 13 19 16
ns
 
    
SCLS109G − MARCH 1984 − REVISED APRIL 2004
6POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
operating characteristics, TA = 25°C
PARAMETER TEST CONDITIONS TYP UNIT
Cpd Power dissipation capacitance No load 35 pF
PARAMETER MEASUREMENT INFORMATION
VOLTAGE WAVEFORM
INPUT RISE AND FALL TIMES
50%50% 10%10% 90% 90% VCC
0 V
trtf
Input
VOLTAGE WAVEFORMS
PROPAGATION DELAY AND OUTPUT TRANSITION TIMES
50%
50%50% 10%10% 90% 90%
V
CC
VOH
VOL
0 V
trtf
Input
In-Phase
Output
50%
tPLH tPHL
50% 50%
10% 10% 90%90% VOH
VOL
tr
tf
tPHL tPLH
Out-of-Phase
Output
Test
Point
From Output
Under Test
CL = 50 pF
(see Note A)
LOAD CIRCUIT
NOTES: A. CL includes probe and test-fixture capacitance.
B. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following
characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr = 6 ns, tf = 6 ns.
C. The outputs are measured one at a time, with one input transition per measurement.
D. tPLH and tPHL are the same as tpd.
Figure 1. Load Circuit and Voltage Waveforms
 
    
SCLS109G − MARCH 1984 − REVISED APRIL 2004
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
APPLICATION INFORMATION
01234567EI
EO A0 A1 A2 GS
’HC148
01234567EI
EO A0 A1 A2 GS
’HC148
’HC08
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Enable
(active low)
012 3
Encoded Data (active low)
Priority Flag
(active low)
16-Line Data (active low)
01234567EI
EO A0 A1 A2 GS
’HC148
01234567EI
EO A0 A1 A2 GS
’HC148
’HC00
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Enable
(active low)
012 3
Encoded Data (active high)
Priority Flag
(active high)
16-Line Data (active low)
Figure 2. Priority Encoder for 16 Bits
Because the ’HC148 devices are combinational logic circuits, wrong addresses can appear during input transients.
Moreover, a change from high to low at EI can cause a transient low on GS when all inputs are high. This must be
considered when strobing the outputs.
MECHANICAL DATA
MCFP004A– JANUARY 1995 – REVISED FEBRUAR Y 2002
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
W (R-GDFP-F16) CERAMIC DUAL FLATPACK
0.360 (9,14)
0.250 (6,35)
98
161
0.245 (6,22)
0.004 (0,10)
0.026 (0,66)
4 Places
0.015 (0,38)
0.055 (1,40)
0.370 (9,40)
0.006 (0,15)
0.045 (1,14)
Base and Seating Plane
0.005 (0,13) MIN
0.019 (0,48)
0.430 (10,92)
0.285 (7,24)
0.080 (2,03)
4040180-3/C 02/02
0.305 (7,75) MAX
0.050 (1,27)
0.360 (9,14)
0.250 (6,35)
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a ceramic lid using glass frit.
D. Index point is provided on cap for terminal identification only.
E. Falls within MIL STD 1835 GDFP-1F16 and JEDEC MO-092AC
MECHANICAL DATA
MLCC006B – OCTOBER 1996
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
FK (S-CQCC-N**) LEADLESS CERAMIC CHIP CARRIER
4040140/D 10/96
28 TERMINAL SHOWN
B
0.358
(9,09)
MAX
(11,63)
0.560
(14,22)
0.560
0.458
0.858
(21,8)
1.063
(27,0)
(14,22)
A
NO. OF
MINMAX
0.358
0.660
0.761
0.458
0.342
(8,69)
MIN
(11,23)
(16,26)
0.640
0.739
0.442
(9,09)
(11,63)
(16,76)
0.962
1.165
(23,83)
0.938
(28,99)
1.141
(24,43)
(29,59)
(19,32)(18,78)
**
20
28
52
44
68
84
0.020 (0,51)
TERMINALS
0.080 (2,03)
0.064 (1,63)
(7,80)
0.307
(10,31)
0.406
(12,58)
0.495
(12,58)
0.495
(21,6)
0.850
(26,6)
1.047
0.045 (1,14)
0.045 (1,14)
0.035 (0,89)
0.035 (0,89)
0.010 (0,25)
12
1314151618 17
11
10
8
9
7
5
432
0.020 (0,51)
0.010 (0,25)
6
12826 27
19
21
B SQ
A SQ 22
23
24
25
20
0.055 (1,40)
0.045 (1,14)
0.028 (0,71)
0.022 (0,54)
0.050 (1,27)
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a metal lid.
D. The terminals are gold plated.
E. Falls within JEDEC MS-004
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