© Semiconductor Components Industries, LLC, 2016
April, 2016 − Rev. 2 1Publication Order Number:
NVMFS4C05N/D
NVMFS4C05N
Power MOSFET
30 V, 127 A, Single N−Channel, SO−8 FL
Features
•Low RDS(on) to Minimize Conduction Losses
•Low Capacitance to Minimize Driver Losses
•Optimized Gate Charge to Minimize Switching Losses
•NVMFS4C05NWF − Wettable Flanks Option for Enhanced Optical
Inspection
•AEC−Q101 Qualified and PPAP Capable
•These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
MAXIMUM RATINGS (TJ = 25°C unless otherwise stated)
Parameter Symbol Value Unit
Drain−to−Source Voltage VDSS 30 V
Gate−to−Source Voltage VGS ±20 V
Continuous Drain
Current RqJA
(Notes 1, 2 and 4)
Steady
State
TA = 25°CID27.2 A
TA = 80°C 21.6
Power Dissipation
RqJA (Notes 1, 2
and 4)
TA = 25°CPD3.61 W
Continuous Drain
Current RqJC
(Notes 1, 2, 3
and 4)
TC = 25°C
ID
127
A
Continuous Drain
Current RqJC
(Notes 1, 2, 3
and 4)
TC = 80°C 101
Power Dissipation
RqJC (Notes 1, 2, 3
and 4)
TC = 25°C PD79 W
Pulsed Drain
Current TA = 25°C, tp = 10 msIDM 174 A
Operating Junction and Storage
Temperature TJ,
TSTG −55 to
+175 °C
Source Current (Body Diode) IS72 A
Single Pulse Drain−to−Source Avalanche
Energy (TJ = 25°C, IL = 29 Apk, L = 0.1 mH) EAS 42 mJ
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s) TL260 °C
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be af fected.
1. The e ntire application environment impacts the thermal resistance values shown,
they are not constants and are only valid for the particular conditions noted.
2. Surface−mounted on FR4 board using 650 mm2, 2 oz Cu pad.
3. Assumes heat−sink sufficiently large to maintain constant case temperature
independent of device power.
4. Continuous DC current rating. Maximum current for pulses as long as one
second is higher but dependent on pulse duration and duty cycle.
SO−8 FLAT LEAD
CASE 488AA
STYLE 1
MARKING
DIAGRAM
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4C05N = Specific Device Code for
NVMFS4C05N
4C05WF= Specific Device Code of
NVMFS4C05NWF
A = Assembly Location
Y = Year
W = Work Week
ZZ = Lot Traceabililty
4C05xx
AYWZZ
1
V(BR)DSS RDS(ON) MAX ID MAX
30 V 2.8 mW @ 10 V 127 A
4.0 mW @ 4.5 V
N−CHANNEL MOSFET
Device Package Shipping†
ORDERING INFORMATION
NVMFS4C05NT1G SO−8 FL
(Pb−Free) 1500 /
Tape & Ree
l
NVMFS4C05NT3G SO−8 FL
(Pb−Free) 5000 /
Tape & Ree
l
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer t o our Tape and Reel Packaging Specification
s
Brochure, BRD8011/D.
S
S
S
G
D
D
D
D
G (4)
S (1,2,3)
D (5−8)
NVMFS4C05NWFT1G SO−8 FL
(Pb−Free) 1500 /
Tape & Ree
l
NVMFS4C05NWFT3G SO−8 FL
(Pb−Free) 5000 /
Tape & Ree
l
NVMFS4C05N
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2
THERMAL RESISTANCE MAXIMUM RATINGS
Parameter Symbol Value Unit
Junction−to−Case (Drain) RqJC 1.9 °C/W
Junction−to−Ambient – Steady State (Note 5) RqJA 41.6
5. Surface−mounted on FR4 board using 650 mm2, 2 oz Cu pad.
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified)
Parameter Symbol Test Condition Min Typ Max Unit
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage V(BR)DSS VGS = 0 V, ID = 250 mA30 V
Drain−to−Source Breakdown Voltage
Temperature Coefficient V(BR)DSS/
TJ12 mV/°C
Zero Gate Voltage Drain Current IDSS VGS = 0 V,
VDS = 24 V TJ = 25°C 1.0 mA
TJ = 125°C 10
Gate−to−Source Leakage Current IGSS VDS = 0 V, VGS = ±20 V ±100 nA
ON CHARACTERISTICS (Note 6)
Gate Threshold Voltage VGS(TH) VGS = VDS, ID = 250 mA1.3 2.2 V
Threshold Temperature Coefficient VGS(TH)/TJ−5.1 mV/°C
Drain−to−Source On Resistance RDS(on) VGS = 10 V ID = 30 A 2.3 2.8 mW
VGS = 4.5 V ID = 30 A 3.3 4.0
Forward Transconductance gFS VDS = 1.5 V, ID = 15 A 68 S
Gate Resistance RGTA = 25°C 0.3 1.0 2.0 W
CHARGES AND CAPACITANCES
Input Capacitance CISS VGS = 0 V, f = 1 MHz, VDS = 15 V 1972 pF
Output Capacitance COSS 1215
Reverse Transfer Capacitance CRSS 59
Capacitance Ratio CRSS/CISS VGS = 0 V, VDS = 15 V, f = 1 MHz 0.030
Total Gate Charge QG(TOT)
VGS = 4.5 V, VDS = 15 V; ID = 30 A
14
nC
Threshold Gate Charge QG(TH) 3.3
Gate−to−Source Charge QGS 6.0
Gate−to−Drain Charge QGD 5.0
Gate Plateau Voltage VGP 3.1 V
Total Gate Charge QG(TOT) VGS = 10 V, VDS = 15 V; ID = 30 A 30 nC
SWITCHING CHARACTERISTICS (Note 7)
T urn−On Delay Time td(ON) VGS = 4.5 V, VDS = 15 V,
ID = 15 A, RG = 3.0 W
11
ns
Rise Time tr32
T urn−Off Delay Time td(OFF) 21
Fall Time tf7.0
T urn−On Delay Time td(ON) VGS = 10 V, VDS = 15 V,
ID = 15 A, RG = 3.0 W
8.0
ns
Rise Time tr26
T urn−Off Delay Time td(OFF) 26
Fall Time tf5.0
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage VSD VGS = 0 V,
IS = 10 A TJ = 25°C 0.77 1.1 V
TJ = 125°C 0.62
Reverse Recovery Time tRR VGS = 0 V, dIS/dt = 100 A/ms,
IS = 30 A
40.2 ns
Charge Time ta20.3
Discharge Time tb19.9
Reverse Recovery Charge QRR 30.2 nC
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
6. Pulse Test: pulse width v 300 ms, duty cycle v 2%.
7. Switching characteristics are independent of operating junction temperatures.
NVMFS4C05N
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3
TYPICAL CHARACTERISTICS
10 V
Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics
VDS, DRAIN−TO−SOURCE VOLTAGE (V) VGS, GATE−TO−SOURCE VOLTAGE (V)
53210
0
20
40
60
30
70
4.03.53.02.01.51.0
Figure 3. On−Resistance vs. VGS Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
VGS, GATE−TO−SOURCE VOLTAGE (V) ID, DRAIN CURRENT (A)
9.08.07.0 106.05.04.03.0
1
3
5
Figure 5. On−Resistance Variation with
Temperature Figure 6. Drain−to−Source Leakage Current
vs. Voltage
TJ, JUNCTION TEMPERATURE (°C) VDS, DRAIN−TO−SOURCE VOLTAGE (V)
30252015105
10
100
1000
10000
ID, DRAIN CURRENT (A)
ID, DRAIN CURRENT (A)
RDS(on), DRAIN−TO−SOURCE RESISTANCE (mW)
RDS(on), DRAIN−TO−SOURCE RESISTANCE (mW)
RDS(on), DRAIN−TO−SOURCE RES-
ISTANCE (NORMALIZED)
IDSS, LEAKAGE (nA)
90
10
4 V 3.6 V
3.2 V
3.0 V
2.8 V
2.6 V
3.8 V
TJ = 25°CVDS = 5 V
TJ = 25°C
TJ = 125°C
TJ = −55°C
4
ID = 30 A
TJ = 25°C
VGS = 4.5 V
TJ = 25°C
VGS = 10 V
ID = 30 A
VGS = 10 V VGS = 0 V
TJ = 85°C
TJ = 150°C
TJ = 125°C
2.5
2
7
6
50
8
80 3.4 V
110
120
140
100
130
40
20
40
60
30
70
90
10
50
80
110
120
140
100
130
4.50.50
10
12
11
9
0.7
0.8
0.9
1.0
1.1
1.2
1.3
1.4
1.5
1.6
1.7
1.8
−50 −25 0 25 50 75 100 125 150 175
4.5 V
4.2 V
12010080 1406040200
1
3
5
4
2
7
6
8
10
12
11
9
NVMFS4C05N
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4
TYPICAL CHARACTERISTICS
0.0001
0.001
0.01
0.1
1
10
100
1000
0.1 1 10 100
Figure 7. Capacitance Variation Figure 8. Gate−to−Source and
Drain−to−Source Voltage vs. Total Charge
VDS, DRAIN−TO−SOURCE VOLTAGE (V) Qg, TOTAL GATE CHARGE (nC)
25201510 3050
0
250
1000
1250
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance Figure 10. Diode Forward Voltage vs. Current
RG, GATE RESISTANCE (W)VSD, SOURCE−TO−DRAIN VOLTAGE (V)
100101
1
10
100
1000
0.90.80.70.60.50.4
0
2
4
6
8
10
12
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
C, CAPACITANCE (pF)
VGS, GATE−TO−SOURCE VOLTAGE (V)
t, TIME (ns)
IS, SOURCE CURRENT (A)
ID, DRAIN CURRENT (A)
VGS = 0 V
TJ = 25°C
Ciss
Coss
Crss
QT
Qgs Qgd
VDD = 15 V
ID = 15 A
VGS = 10 V td(off)
td(on)
tr
tf
TJ = 25°C
TJ = 125°C
VGS = 0 V
0 V < VGS < 10 V
Single Pulse
TC = 25°C
RDS(on) Limit
Thermal Limit
Package Limit
100 ms
10 ms
1 ms
dc
1750
2500
500
750
1500
2000
2250
3000
2750
1.0
0
2
4
6
8
10
0 4 8 121620242832
TJ = 25°C
VDD = 15 V
VGS = 10 V
ID = 30 A
14
16
18
20
10 ms
NVMFS4C05N
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5
TYPICAL CHARACTERISTICS
1
10
100
1000
1.E−06 1.E−05 1.E−04 1.E−03
0.01
0.1
1
10
100
0.000001 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000
Figure 12. Thermal Response
PULSE TIME (sec)
R(t) (°C/W)
10%
Duty Cycle = 50%
20%
5%
2%
1%
Single Pulse
Figure 13. GFS vs. ID
ID (A)
4030100
0
20
100
GFS (S)
20 50
40
60 80
60
80
120
70
Figure 14. Avalanche Characteristics
PULSE WIDTH (SECONDS)
ID, DRAIN CURRENT (A)
TA = 25°C
TA = 85°C
NVMFS4C05N
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6
PACKAGE DIMENSIONS
DFN5 5x6, 1.27P
(SO−8FL)
CASE 488AA
ISSUE M
STYLE 1:
PIN 1. SOURCE
2. SOURCE
3. SOURCE
4. GATE
5. DRAIN
M3.00 3.40
q0 −−−
_
3.80
12
_
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION D1 AND E1 DO NOT INCLUDE
MOLD FLASH PROTRUSIONS OR GATE
BURRS.
1234
TOP VIEW
SIDE VIEW
BOTTOM VIEW
D1
E1 q
D
E
2
2
B
A
0.20 C
0.20 C
2 X
2 X
DIM MIN NOM
MILLIMETERS
A0.90 1.00
A1 0.00 −−−
b0.33 0.41
c0.23 0.28
D5.15
D1 4.70 4.90
D2 3.80 4.00
E6.15
E1 5.70 5.90
E2 3.45 3.65
e1.27 BSC
G0.51 0.575
K1.20 1.35
L0.51 0.575
L1 0.125 REF
A
0.10 C
0.10 C
DETAIL A
14
L1
e/2
8X
D2
G
E2
K
b
A0.10 B
C
0.05 cL
DETAIL A
A1
c
4 X
C
SEATING
PLANE
MAX
1.10
0.05
0.51
0.33
5.10
4.20
6.10
3.85
0.71
1.50
0.71
M
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
SOLDERING FOOTPRINT*
1.270
2X
0.750
1.000
0.905
4.530
1.530
4.5600.495
3.200
1.330
0.965
2X
2X
4X
4X
PIN 5
(EXPOSED PAD)
5.00 5.30
6.00 6.30
PITCH
DIMENSIONS: MILLIMETERS
1
RECOMMENDED
e
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