µA741, µA741Y
GENERAL-PURPOSE OPERATIONAL AMPLIFIERS
SLOS094B – NOVEMBER 1970 – REVISED SEPTEMBER 2000
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
D
Short-Circuit Protection
D
Offset-Voltage Null Capability
D
Large Common-Mode and Differential
Voltage Ranges
D
No Frequency Compensation Required
D
Low Power Consumption
D
No Latch-Up
D
Designed to Be Interchangeable With
Fairchild µA741
description
The µA741 is a general-purpose operational
amplifier featuring offset-voltage null capability.
The high common-mode input voltage range and
the absence of latch-up make the amplifier ideal
for voltage-follower applications. The device is
short-circuit protected and the internal frequency
compensation ensures stability without external
components. A low value potentiometer may be
connected between the offset null inputs to null
out the offset voltage as shown in Figure 2.
The µA741C is characterized for operation from
0°C to 70°C. The µA741I is characterized for
operation from –40°C to 85°C.The µA741M is
characterized for operation over the full military
temperature range of –55°C to 125°C.
symbol
IN +
IN –
OUT
+
OFFSET N1
OFFSET N2
Copyright 2000, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
2
3
4
5
6
7
14
13
12
11
10
9
8
NC
NC
OFFSET N1
IN
IN+
VCC
NC
NC
NC
NC
VCC+
OUT
OFFSET N2
NC
µA741M ...J PACKAGE
(TOP VIEW)
1
2
3
4
8
7
6
5
OFFSET N1
IN
IN+
VCC
NC
VCC+
OUT
OFFSET N2
µA741M ...JG PACKAGE
µA741C, µA741I . . . D, P, OR PW PACKAGE
(TOP VIEW)
1
2
3
4
5
10
9
8
7
6
NC
OFFSET N1
IN
IN+
VCC
NC
NC
VCC+
OUT
OFFSET N2
µA741M ...U PACKAGE
(TOP VIEW)
3 2 1 20 19
910111213
4
5
6
7
8
18
17
16
15
14
NC
VCC+
NC
OUT
NC
NC
IN
NC
IN+
NC
µA741M . . . FK PACKAGE
(TOP VIEW)
NC
OFFSET N1
NC
OFFSET N2
NC NC
NC
NC
V
NC
CC–
NC – No internal connection
µA741, µA741Y
GENERAL-PURPOSE OPERATIONAL AMPLIFIERS
SLOS094B – NOVEMBER 1970 – REVISED SEPTEMBER 2000
2POST OFFICE BOX 655303 DALLAS, TEXAS 75265
AVAILABLE OPTIONS
PACKAGED DEVICES
CHIP
TASMALL
OUTLINE
(D)
CHIP
CARRIER
(FK)
CERAMIC
DIP
(J)
CERAMIC
DIP
(JG)
PLASTIC
DIP
(P)
TSSOP
(PW)
FLAT
PACK
(U)
CHIP
FORM
(Y)
0°C to 70°CµA741CD µA741CP µA741CPW µA741Y
–40°C to 85°CµA741ID µA741IP
–55°C to 125°CµA741MFK µA741MJ µA741MJG µA741MU
The D package is available taped and reeled. Add the suffix R (e.g., µA741CDR).
schematic
IN
IN+
VCC+
VCC
OUT
OFFSET N1
OFFSET N2
Transistors 22
Resistors 11
Diode 1
Capacitor 1
Component Count
µA741, µA741Y
GENERAL-PURPOSE OPERATIONAL AMPLIFIERS
SLOS094B – NOVEMBER 1970 – REVISED SEPTEMBER 2000
3
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
µA741Y chip information
This chip, when properly assembled, displays characteristics similar to the µA741C. Thermal compression or
ultrasonic bonding may be used on the doped-aluminum bonding pads. Chips may be mounted with conductive
epoxy or a gold-silicon preform.
BONDING PAD ASSIGNMENTS
CHIP THICKNESS: 15 TYPICAL
BONDING PADS: 4 × 4 MINIMUM
TJmax = 150°C.
TOLERANCES ARE ±10%.
ALL DIMENSIONS ARE IN MILS.
+
OUT
IN+
IN
VCC+
(7)
(3)
(2) (6)
(4)
VCC
(5)
(1)
OFFSET N2
OFFSET N1
45
36
(1)
(8)
(7) (6)
(5)
(4)
(3)(2)
µA741, µA741Y
GENERAL-PURPOSE OPERATIONAL AMPLIFIERS
SLOS094B – NOVEMBER 1970 – REVISED SEPTEMBER 2000
4POST OFFICE BOX 655303 DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
µA741C µA741I µA741M UNIT
Supply voltage, VCC+ (see Note 1) 18 22 22 V
Supply voltage, VCC (see Note 1) –18 –22 –22 V
Differential input voltage, VID (see Note 2) ±15 ±30 ±30 V
Input voltage, VI any input (see Notes 1 and 3) ±15 ±15 ±15 V
Voltage between of fset null (either OFFSET N1 or OFFSET N2) and VCC ±15 ±0.5 ±0.5 V
Duration of output short circuit (see Note 4) unlimited unlimited unlimited
Continuous total power dissipation See Dissipation Rating Table
Operating free-air temperature range, TA0 to 70 40 to 85 55 to 125 °C
Storage temperature range 65 to 150 65 to 150 65 to 150 °C
Case temperature for 60 seconds FK package 260 °C
Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds J, JG, or U package 300 °C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds D, P, or PW package 260 260 °C
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only , and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may af fect device reliability.
NOTES: 1. All voltage values, unless otherwise noted, are with respect to the midpoint between VCC+ and VCC.
2. Differential voltages are at IN+ with respect to IN–.
3. The magnitude of the input voltage must never exceed the magnitude of the supply voltage or 15 V, whichever is less.
4. The output may be shorted to ground or either power supply . For the µA741M only , the unlimited duration of the short circuit applies
at (or below) 125°C case temperature or 75°C free-air temperature.
DISSIPATION RATING TABLE
PACKAGE TA 25°C
POWER RATING DERATING
FACTOR DERATE
ABOVE TATA = 70°C
POWER RATING TA = 85°C
POWER RATING TA = 125°C
POWER RATING
D500 mW 5.8 mW/°C 64°C464 mW 377 mW N/A
FK 500 mW 11.0 mW/°C 105°C 500 mW 500 mW 275 mW
J500 mW 11.0 mW/°C 105°C 500 mW 500 mW 275 mW
JG 500 mW 8.4 mW/°C90°C 500 mW 500 mW 210 mW
P500 mW N/A N/A 500 mW 500 mW N/A
PW 525 mW 4.2 mW/°C25°C 336 mW N/A N/A
U500 mW 5.4 mW/°C 57°C432 mW 351 mW 135 mW
µA741, µA741Y
GENERAL-PURPOSE OPERATIONAL AMPLIFIERS
SLOS094B – NOVEMBER 1970 – REVISED SEPTEMBER 2000
5
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
electrical characteristics at specified free-air temperature, VCC± = ±15 V (unless otherwise noted)
PARAMETER
TEST
TA
µA741C µA741I, µA741M
UNIT
PARAMETER
CONDITIONS
T
A
MIN TYP MAX MIN TYP MAX
UNIT
VIO
In
p
ut offset voltage
VO=0
25°C 1 6 1 5
mV
V
IO
Inp
u
t
offset
v
oltage
V
O =
0
Full range 7.5 6
mV
VIO(adj) Offset voltage adjust range VO = 0 25°C±15 ±15 mV
IIO
In
p
ut offset current
VO=0
25°C 20 200 20 200
nA
I
IO
Inp
u
t
offset
c
u
rrent
V
O =
0
Full range 300 500
nA
IIB
In
p
ut bias current
VO=0
25°C 80 500 80 500
nA
I
IB
Inp
u
t
bias
c
u
rrent
V
O =
0
Full range 800 1500
nA
VICR
Common-mode input 25°C±12 ±13 ±12 ±13
V
V
ICR voltage range Full range ±12 ±12
V
RL = 10 k25°C±12 ±14 ±12 ±14
VOM
Maximum peak output RL 10 kFull range ±12 ±12
V
V
OM voltage swing RL = 2 k25°C±10 ±13 ±10 ±13
V
RL 2 kFull range ±10 ±10
AVD
Large-signal differential RL 2 k25°C 20 200 50 200
V/mV
A
VD
gg
voltage amplification VO = ±10 V Full range 15 25
V/mV
riInput resistance 25°C 0.3 2 0.3 2 M
roOutput resistance VO = 0, See Note 5 25°C 75 75
CiInput capacitance 25°C 1.4 1.4 pF
CMRR
Common-mode rejection
VIC =V
ICRmin
25°C 70 90 70 90
dB
CMRR
j
ratio
V
IC =
V
ICR
min
Full range 70 70
dB
kSVS
Supply voltage sensitivity
VCC =±9Vto±15 V
25°C 30 150 30 150
µV/V
k
SVS
yg y
(VIO/VCC)
V
CC =
±9
V
to
±15
V
Full range 150 150 µ
V/V
IOS Short-circuit output current 25°C±25 ±40 ±25 ±40 mA
ICC
Su
pp
ly current
VO=0
No load
25°C 1.7 2.8 1.7 2.8
mA
I
CC
S
u
ppl
y
c
u
rrent
V
O =
0
,
No
load
Full range 3.3 3.3
mA
PD
Total
p
ower dissi
p
ation
VO=0
No load
25°C 50 85 50 85
mW
P
D
Total
po
w
er
dissipation
V
O =
0
,
No
load
Full range 100 100
mW
All characteristics are measured under open-loop conditions with zero common-mode input voltage unless otherwise specified. Full range for
the µA741C is 0°C to 70°C, the µA741I is –40°C to 85°C, and the µA741M is –55°C to 125°C.
NOTE 5: This typical value applies only at frequencies above a few hundred hertz because of the effects of drift and thermal feedback.
operating characteristics, VCC± = ±15 V, TA = 25°C
TEST CONDITIONS
µA741C µA741I, µA741M
UNIT
TEST
CONDITIONS
MIN TYP MAX MIN TYP MAX
UNIT
trRise time V
I
= 20 mV, R
L
= 2 kΩ, 0.3 0.3 µs
Overshoot factor
I,
CL = 100 pF,
L,
See Figure 1 5% 5%
SR Slew rate at unity gain VI = 10 V,
CL = 100 pF, RL = 2 kΩ,
See Figure 1 0.5 0.5 V/µs
µA741, µA741Y
GENERAL-PURPOSE OPERATIONAL AMPLIFIERS
SLOS094B – NOVEMBER 1970 – REVISED SEPTEMBER 2000
6POST OFFICE BOX 655303 DALLAS, TEXAS 75265
electrical characteristics at specified free-air temperature, VCC±=±15 V, TA = 25°C (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
µA741Y
UNIT
PARAMETER
TEST
CONDITIONS
MIN TYP MAX
UNIT
VIO Input offset voltage VO = 0 1 6 mV
VIO(adj) Offset voltage adjust range VO = 0 ±15 mV
IIO Input offset current VO = 0 20 200 nA
IIB Input bias current VO = 0 80 500 nA
VICR Common-mode input voltage range ±12 ±13 V
VOM
Maximum
p
eak out
p
ut voltage swing
RL = 10 k±12 ±14
V
V
OM
Ma
x
im
u
m
peak
o
u
tp
u
t
v
oltage
s
w
ing
RL = 2 k±10 ±13
V
AVD Large-signal differential voltage amplification RL 2 k20 200 V/mV
riInput resistance 0.3 2 M
roOutput resistance VO = 0, See Note 5 75
CiInput capacitance 1.4 pF
CMRR Common-mode rejection ratio VIC = VICRmin 70 90 dB
kSVS Supply voltage sensitivity (VIO/VCC) VCC = ±9 V to ±15 V 30 150 µV/V
IOS Short-circuit output current ±25 ±40 mA
ICC Supply current VO = 0, No load 1.7 2.8 mA
PDTotal power dissipation VO = 0, No load 50 85 mW
All characteristics are measured under open-loop conditions with zero common-mode voltage unless otherwise specified.
NOTE 5: This typical value applies only at frequencies above a few hundred hertz because of the effects of drift and thermal feedback.
operating characteristics, VCC± = ±15 V, TA = 25°C
PARAMETER
TEST CONDITIONS
µA741Y
UNIT
PARAMETER
TEST
CONDITIONS
MIN TYP MAX
UNIT
trRise time V
I
= 20 mV, R
L
= 2 kΩ, 0.3 µs
Overshoot factor
I,
CL = 100 pF,
L,
See Figure 1 5%
SR Slew rate at unity gain VI = 10 V,
CL = 100 pF, RL = 2 kΩ,
See Figure 1 0.5 V/µs
µA741, µA741Y
GENERAL-PURPOSE OPERATIONAL AMPLIFIERS
SLOS094B – NOVEMBER 1970 – REVISED SEPTEMBER 2000
7
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
INPUT VOLTAGE
WAVEFDORM
TEST CIRCUIT
RL = 2 k
CL = 100 pF
OUT
IN +
0 V
VI
Figure 1. Rise Time, Overshoot, and Slew Rate
APPLICATION INFORMATION
Figure 2 shows a diagram for an input offset voltage null circuit.
To VCC
OFFSET N1
10 k
OFFSET N2
+
OUT
IN+
IN
Figure 2. Input Offset Voltage Null Circuit
µA741, µA741Y
GENERAL-PURPOSE OPERATIONAL AMPLIFIERS
SLOS094B – NOVEMBER 1970 – REVISED SEPTEMBER 2000
8POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 3
I
TA – Free-Air Temperature – °C
12080400–40
20
INPUT OFFSET CURRENT
vs
FREE-AIR TEMPERATURE
IO – Input Offset Current – nA
ÏÏÏÏÏ
ÏÏÏÏÏ
VCC = –15 V
ÏÏÏÏÏ
ÏÏÏÏÏ
VCC+ = 15 V
90
70
50
30
10
0
40
60
80
100
60 20 20 60 100 140
Figure 4
400
300
200
100
00 40 80 120
TA – Free-Air Temperature – °C
I
INPUT BIAS CURRENT
vs
FREE-AIR TEMPERATURE
IB – Input Bias Current – nA
ÏÏÏÏÏ
ÏÏÏÏÏ
VCC = –15 V
ÏÏÏÏÏ
VCC+ = 15 V
350
250
150
50
–4060 20 20 60 100 140
V
RL – Load Resistance – k1074210.70.40.20.1
±4
±5
±6
±7
±8
±9
±10
±11
±12
±13
±14
MAXIMUM PEAK OUTPUT VOLTAGE
vs
LOAD RESISTANCE
VCC+ = 15 V
VCC = –15 V
TA = 25°C
OM – Maximum Peak Output Voltage – V
Figure 5
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
µA741, µA741Y
GENERAL-PURPOSE OPERATIONAL AMPLIFIERS
SLOS094B – NOVEMBER 1970 – REVISED SEPTEMBER 2000
9
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 6
V
±20
f – Frequency – Hz
1M100k10k1k
MAXIMUM PEAK OUTPUT VOLTAGE
vs
FREQUENCY
OM – Maximum Peak Output Voltage – V
±18
±16
±14
±12
±10
±8
±6
±4
±2
0
VCC+ = 15 V
VCC = –15 V
RL = 10 k
TA = 25°C
100
Figure 7
2018161412108642
400
200
100
40
20
10 0
VCC±– Supply Voltage – V
OPEN-LOOP SIGNAL DIFFERENTIAL
VOLTAGE AMPLIFICATION
vs
SUPPLY VOLTAGE
VO = ±10 V
RL = 2 k
TA = 25°C
AVD– Open-Loop Signal Differential
Voltage Amplification – V/mV
f – Frequency – Hz
10M1M10k1001
–10
0
10
20
70
80
90
100
110
OPEN-LOOP LARGE-SIGNAL DIFFERENTIAL
VOLTAGE AMPLIFICATION
vs
FREQUENCY
VO = ±10 V
RL = 2 k
TA = 25°C
AVD– Open-Loop Signal Differential
Voltage Amplification – dB
10 1k 100k
60
50
30
40
VCC+ = 15 V
VCC = –15 V
µA741, µA741Y
GENERAL-PURPOSE OPERATIONAL AMPLIFIERS
SLOS094B – NOVEMBER 1970 – REVISED SEPTEMBER 2000
10 POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 8
CMRR – Common-Mode Rejection Ratio – dB
f – Frequency – Hz
10k 1M 100M1001
0
10
20
30
40
50
60
70
80
90
100
COMMON-MODE REJECTION RATIO
vs
FREQUENCY
VCC+ = 15 V
VCC– = –15 V
BS = 10 k
TA = 25°C
Figure 9
10%
tr
2.521.510.50
28
24
20
16
12
8
4
0
– Output Voltage – mV
t – Time − µs
–4
OUTPUT VOLTAGE
vs
ELAPSED TIME
VO
ÏÏ
90%
VCC+ = 15 V
VCC– = –15 V
RL = 2 k
CL = 100 pF
TA = 25°C
8
6
4
2
0
–2
–4
–6
9080706050403020100
Input and Output Voltage – V
t – Time – µs
–8
VOLTAGE-FOLLOWER
LARGE-SIGNAL PULSE RESPONSE
VO
VI
VCC+ = 15 V
VCC– = –15 V
RL = 2 k
CL = 100 pF
TA = 25°C
Figure 10
PACKAGING INFORMATION
Orderable Device Status (1) Package
Type Package
Drawing Pins Package
Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
UA741CD ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
UA741CDE4 ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
UA741CDG4 ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
UA741CDR ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
UA741CDRE4 ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
UA741CDRG4 ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
UA741CJG OBSOLETE CDIP JG 8 TBD Call TI Call TI
UA741CJG4 OBSOLETE CDIP JG 8 TBD Call TI Call TI
UA741CP ACTIVE PDIP P 8 50 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type
UA741CPE4 ACTIVE PDIP P 8 50 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type
UA741CPSR ACTIVE SO PS 8 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
UA741CPSRE4 ACTIVE SO PS 8 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
UA741CPSRG4 ACTIVE SO PS 8 2000 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
UA741MFKB OBSOLETE LCCC FK 20 TBD Call TI Call TI
UA741MJ OBSOLETE CDIP J 14 TBD Call TI Call TI
UA741MJB OBSOLETE CDIP J 14 TBD Call TI Call TI
UA741MJG OBSOLETE CDIP JG 8 TBD Call TI Call TI
UA741MJGB OBSOLETE CDIP JG 8 TBD Call TI Call TI
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
PACKAGE OPTION ADDENDUM
www.ti.com 4-Jun-2007
Addendum-Page 1
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
PACKAGE OPTION ADDENDUM
www.ti.com 4-Jun-2007
Addendum-Page 2
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
UA741CDR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
UA741CPSR SO PS 8 2000 330.0 16.4 8.2 6.6 2.5 12.0 16.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
UA741CDR SOIC D 8 2500 340.5 338.1 20.6
UA741CPSR SO PS 8 2000 367.0 367.0 38.0
PACKAGE MATERIALS INFORMATION
www.ti.com 14-Jul-2012
Pack Materials-Page 2
MECHANICAL DATA
MCER001A – JANUARY 1995 – REVISED JANUAR Y 1997
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
JG (R-GDIP-T8) CERAMIC DUAL-IN-LINE
0.310 (7,87)
0.290 (7,37)
0.014 (0,36)
0.008 (0,20)
Seating Plane
4040107/C 08/96
5
4
0.065 (1,65)
0.045 (1,14)
8
1
0.020 (0,51) MIN
0.400 (10,16)
0.355 (9,00)
0.015 (0,38)
0.023 (0,58)
0.063 (1,60)
0.015 (0,38)
0.200 (5,08) MAX
0.130 (3,30) MIN
0.245 (6,22)
0.280 (7,11)
0.100 (2,54)
0°–15°
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a ceramic lid using glass frit.
D. Index point is provided on cap for terminal identification.
E. Falls within MIL STD 1835 GDIP1-T8
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other
changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest
issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and
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supplied at the time of order acknowledgment.
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