dsPIC30F4011/4012
DS70135G-page 232 © 2010 Microchip Technology Inc.
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Simple Capture Event Mode
Capture Buffer Operation............................................80
Capture Prescaler.......................................................80
Hall Sensor Mode .......................................................80
Timer2 and Timer3 Selection Mode............................80
Simple Output Compare Match Mode.................................84
Simple PWM Mode .............................................................84
Input Pin Fault Protection............................................84
Period..........................................................................85
Single Pulse PWM Operation............................................102
Software Simulator (MPLAB SIM).....................................173
Software Stack Pointer, Frame Pointer...............................18
CALL Stack Frame......................................................33
SPI Module........................................................................107
Framed SPI Support .................................................108
Operating Function Description ................................107
Operation During CPU Idle Mode .............................109
Operation During CPU Sleep Mode..........................109
Register Map.............................................................110
SDO1 Disable ...........................................................107
Slave Select Synchronization ...................................109
Word and Byte Communication ............. ...................107
STATUS Register................................................................18
System Integration
Overview...................................................................149
Register Map.............................................................162
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Thermal Operating Conditions.. ..................... ...................176
Thermal Packaging Characteristics ..................................176
Timer1 Module
16-bit Asynchronous Counter Mode ...........................65
16-bit Synchronous Counter Mode .............................65
16-bit Timer Mode.......................................................65
Gate Operation ...........................................................66
Interrupt.......................................................................67
Operation During Sleep Mode ....................................66
Prescaler.....................................................................66
Real-Time Clock .........................................................67
RTC Interrupts ....................................................67
RTC Oscillator Operation....................................67
Register Map...............................................................68
Timer2 and Timer3 Selection Mode....................................84
Timer2/3 Module
16-bit Timer Mode.......................................................69
32-bit Synchronous Counter Mode .............................69
32-bit Timer Mode.......................................................69
ADC Event Trigger......................................................72
Gate Operation ...........................................................72
Interrupt.......................................................................72
Operation During Sleep Mode ....................................72
Register Map...............................................................73
Timer Prescaler...........................................................72
Timer4/5 Module.................................................................75
Register Map...............................................................77
Timing Diagram
A/D Conversion
10-Bit High-Speed (CHPS<1:0> = 01, SIMSAM = 0,
ASAM = 1, SSRC<2:0> = 111,
SAMC<4:0> = 00001)...............................216
I2C Bus Data (Slave Mode).......................................209
Timing Diagrams
A/D Conversion
10-Bit High-Speed (CHPS<1:0> = 01, SIMSAM = 0,
ASAM = 0, SSRC<2:0> = 000).................215
Band Gap Start-up Time........................................... 191
CAN Bit..................................................................... 132
CAN Module I/O........................................................ 211
Center-Aligned PWM.................................................. 99
CLKO and I/O........................................................... 189
Dead-Time Timing.................................................... 101
Edge-Aligned PWM .................................................... 99
External Clock........................................................... 184
I2C Bus Data (Master Mode) .................................... 207
I2C Bus Start/Stop Bits (Master Mode)..................... 207
I2C Bus Start/Stop Bits (Slave Mode)....................... 209
Input Capture............................................................ 195
Motor Control PWM.................................................. 198
Motor Control PWM Module Fault ............................ 198
Output Compare....................................................... 196
Output Compare/PWM ............................................. 197
PWM Output............................................................... 85
QEI Module External Clock....................................... 194
QEI Module Index Pulse........................................... 200
Reset, Watchdog Timer, Oscillator Start-up Timer
and Power-up Timer......................................... 190
SPI Master Mode (CKE = 0)..................................... 201
SPI Master Mode (CKE = 1)..................................... 202
SPI Slave Mode (CKE = 0)....................................... 203
SPI Slave Mode (CKE = 1)....................................... 205
Time-out Sequence on Power-up
(MCLR Not Tied to VDD), Case 1 ..................... 156
Time-out Sequence on Power-up
(MCLR Not Tied to VDD), Case 2 ..................... 156
Time-out Sequence on Power-up
(MCLR Tied to VDD) ......................................... 156
Timerx External Clock............................................... 192
Timing Requirements
A/D Conversion
10-Bit High-Speed............................................ 217
Band Gap Start-up Time........................................... 191
CAN Module I/O........................................................ 211
CLKO and I/O........................................................... 189
External Clock........................................................... 185
I2C Bus Data (Master Mode) .................................... 208
I2C Bus Data (Slave Mode) ...................................... 210
Input Capture............................................................ 195
Motor Control PWM.................................................. 198
Output Compare....................................................... 196
QEI Module External Clock....................................... 194
QEI Module Index Pulse........................................... 200
Quadrature Decoder................................................. 199
Reset, Watchdog Timer, Oscillator Start-up Timer
and Power-up Timer......................................... 191
Simple Output Compare/PWM Mode ....................... 197
SPI Master Mode (CKE = 0)..................................... 201
SPI Master Mode (CKE = 1)..................................... 202
SPI Slave Mode (CKE = 0)....................................... 204
SPI Slave Mode (CKE = 1)....................................... 206
Timer1 External Clock .............................................. 192
Timer2 and Timer4 External Clock........................... 193
Timer3 and Timer5 External Clock........................... 193
Timing Specifications
PLL Clock ................................................................. 186
PLL Jitter ........................................................... ....... 186
Trap Vectors....................................................................... 46
Traps................................................................................... 45
Hard and Soft ............................................................. 46
Trap Sources.............................................................. 45