ISL28158 - Intersil Corporation - Datasheet.Directory

FN6377.2

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

1-888-INTERSIL or 1-888-468-3774 |Intersil (and design) is a registered trademark of Intersil Americas Inc.

All other trademarks mentioned are the property of their respective owners.

ISL28158, ISL28258

34µA Micro-power Single and Dual

Precision Rail-to-Rail Input-Output (RRIO)

Low Input Bias Current Op Amps

The ISL28158 and ISL28258 are micro-po wer pr ecision

operational amplifiers optimized for single supply operation

at 5.5V and can operate down to 2.4V.

These devices feature an Input Range Enhancement Circuit

(IREC), which enables them to maintain CMRR performance

for input voltages greater than the positive supply. The input

signal is capable of swinging 0.25V above the positive

supply and to 100mV below the negative supply with only a

slight degradation of the CMRR performanc e. The outpu t

operation is rail-to-rail.

The ISL28158 and ISL28258 draw minimal supply current

while meeting excellent DC-accuracy noise and output drive

specifications. Competing devices seriously degrade these

parameters to achieve micro-power supply current. Offset

current, voltage and current noise, slew rate, and gain

bandwidth product are all two to ten times better than on

previous micro-power op amps.

The 1/f corner of the voltage noise spectrum is at 100Hz.

This results in low frequency noise performance, which can

only be found on devices with an order of magnitude higher

supply current.

ISL28158 and ISL28258 can be operated from one lithium

cell or two Ni-Cd batteries. The input rang e includes both

positive and negative rail. The ou tput swings to both rails.

Pinouts

Features

• 34µA typical supply current

• 300µV maximum offset voltage (8 Ld SOIC)

• 1pA typical input bias current

• 200kHz gain bandwidth product

• 2.4V to 5.5V single supply voltage range

• Rail-to-rail input and output

• Enable pin (ISL28158 only)

• Pb-free (RoHS compliant)

Applications

• Battery- or solar-powered systems

• 4mA to 20mA current loops

• Handheld consumer products

• Medical devices

• Sensor amplifiers

• ADC buffers

• DAC output amplifiers

ISL28158

(6 LD SOT-23)

TOP VIEW

ISL28158

(8 LD SOIC)

TOP VIEW

ISL28258

(8 LD SOIC)

TOP VIEW

ISL28258

(8 LD MSOP)

TOP VIEW

OUT

V-

IN+

V+

IN-

IN+

V+

OUT

V- NC

OUT_A

IN-_A

IN+_A

V+

OUT_B

IN-_B

V- IN+_B

OUT_A

IN-_A

IN+_A

V+

OUT_B

IN-_B

V- IN+_B

Ordering Information

PART NUMBER

(Note) PART

MARKING PACKAGE

(Pb-free) PKG.

DWG. #

ISL28158FHZ-T7* GABW 6 Ld SOT-23 MDP0038

ISL28158FHZ-T7A* GABW 6 Ld SOT-23 MDP0038

ISL28158FBZ 28158 FBZ 8 Ld SOIC MDP0027

ISL28158FBZ-T7* 28158 FBZ 8 Ld SOIC MDP0027

Coming Soon

ISL28258FBZ 28258 FBZ 8 Ld SOIC MDP0027

Coming Soon

ISL28258FBZ-T7* 28258 FBZ 8 Ld SOIC MDP0027

Coming Soon

ISL28258FUZ 8258Z 8 Ld MSOP MDP0043

Coming Soon

ISL28258FUZ-T7* 8258Z 8 Ld MSOP MDP0043

*Please refer to TB347 for details on reel specifications.

NOTE: These Intersil Pb-free plastic packaged products employ

special Pb-free material sets; molding compounds/die attach

materials and 100% matte tin plate PLUS ANNEAL - e3 termination

finish, which is RoHS compliant and compatible with both SnPb and

Pb-free soldering operations. Intersil Pb-fr ee products are MSL

classified at Pb-free peak reflow temperatures that meet or exceed

the Pb-free requirements of IPC/JEDEC J STD-020.

Data Sheet February 11, 2008

2FN6377.2

February 11, 2008

Absolute Maximum Ratings (TA = +25°C) Thermal Information

Supply Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.75V

Supply Turn On Voltage Slew Rate . . . . . . . . . . . . . . . . . . . . . 1V/µs

Differential Input Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5mA

Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5V

Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . V- -0.5V to V+ +0.5V

ESD Rating

Human Body Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3kV

Machine Model. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .300V

Thermal Resistance θJA (°C/W)

6 Ld SOT-23 Package . . . . . . . . . . . . . . . . . . . . . . . 230

8 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . 110

8 Ld MSOP Package . . . . . . . . . . . . . . . . . . . . . . . . 115

Output Short-Circuit Duration . . . . . . . . . . . . . . . . . . . . . . .Indefinite

Ambient Operating Temperature Range . . . . . . . . .-40°C to +125°C

Storage Temperature Range . . . . . . . . . . . . . . . . . .-65°C to +150°C

Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . .+125°C

Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below

http://www.intersil.com/pbfree/Pb-FreeReflow.asp

CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and

result in failures not covered by warranty.

IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests

are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA

Electrical Specifications V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open, TA = +25°C unless otherwise specified.

Boldface limits apply over the operating temperature range, -40°C to +125°C. Temperature data

established by characterization.

PARAMETER DESCRIPTION CONDITIONS MIN

(Note 1) TYP MAX

(Note 1) UNIT

DC SPECIFICATIONS

VOS Input Offset Voltage 8 Ld SOIC -300

-650 3.1 300

650 µV

6 Ld SOT-23 -550

-750 5 550

750 µV

Input Offset Voltage vs Temperature 0.3 µV/°C

IOS Input Offset Current TA = -40°C to +85°C -35

-80 ±5 35

80 pA

IBInput Bias Current TA = -40°C to +85°C -30

-80 ±1 30

80 pA

VCM Common-Mode Voltage Range Guaranteed by CMRR 0 5 V

CMRR Common-Mode Rejection Ratio VCM = 0V to 5V 75

70 98 dB

PSRR Power Supply Rejection Ratio V+ = 2.4V to 5.5V 80

75 98 dB

AVOL Large Signal Voltage Gain VO = 0.5V to 4.5V, RL = 100kΩ to VCM 100

75 220 V/mV

VO = 0.5V to 4.5V, RL = 1kΩ to VCM 45 V/mV

VOUT Maximum Output Voltage Swing Output low, RL = 100kΩ to VCM 5.3 6

20 mV

Output low, RL = 1kΩ to VCM 135 150

250 mV

Output high, RL = 100kΩ to VCM 4.995

4.993 4.996 V

Output high, RL = 1kΩ to VCM 4.84

4.77 4.874 V

IS,ON Quiescent Supply Current, Enabled V+ = 5V 26

15 34 43

55 µA

V+ = 2.4V 20 µA

ΔVOS

ΔT

----------------

ISL28158, ISL28258

3FN6377.2

February 11, 2008

IS,OFF Quiescent Supply Current, Disabled 10 14

19 µA

IO+ Short-Circuit Output Source Current RL = 10Ω to VCM 27

20 30 mA

IO- Short-Circuit Output Sink Current RL = 10Ω to VCM 22

15 25 mA

VSUPPLY Supply Operating Range V+ to V-2.4 5.5 V

VENH EN Pin High Level 2V

VENL EN Pin Low Level 0.8 V

IENH EN Pin Input High Current VEN = V+11.5

1.6 µA

IENL EN Pin Input Low Current VEN = V-12 25

30 nA

AC SPECIFICATONS

GBW Gain Bandwidth Product AV = 100, RF = 100kΩ, RG = 1kΩ,

RL = 10kΩ to VCM 200 kHz

Unity Gain

Bandwidth -3dB Bandwidth AV =1, RF = 0Ω, VOUT = 10mVP-P 420 kHz

eNInput Noise Voltage Peak-to-Peak f = 0.1Hz to 10Hz 1.4 µVP-P

Input Noise Voltage Density fO = 1kHz 64 nV/√Hz

iNInput Noise Current Density fO = 10kHz 0.19 pA/√Hz

CMRR @ 60Hz Input Common Mode Rejection Ratio VCM = 1VP-P, RL = 10kΩ to VCM -70 dB

PSRR+ @

120Hz Power Supply Rejection Ratio (V+)V

+, V- = ±1.2V and ±2.5V,

VSOURCE = 1VP-P, RL = 10kΩ to VCM -64 dB

PSRR- @

120Hz Power Supply Rejection Ratio (V-)V

+, V- = ±1.2V and ±2.5V

VSOURCE = 1VP-P, RL = 10kΩ to VCM -85 dB

TRANSIENT RESPONSE

SR Slew Rate 0.1 V/µs

tr, tf, Large

Signal Rise Time, 10% to 90% VOUT AV

= +2,

VOUT = 1VP-P, Rg = Rf = 10kΩ

= 10kΩ to VCM 10 µs

Fall Time, 90% to 10% VOUT AV

= +2,

VOUT = 1VP-P, Rg = Rf = 10kΩ

10kΩ to VCM 9µs

tr, tf, Small

Signal Rise Time, 10% to 90% VOUT AV

= +2,

VOUT = 10mVP-P,

Rg = Rf = RL = 10kΩ to VCM 650 ns

Fall Time, 90% to 10% VOUT AV

= +2

VOUT = 10mVP-P,

Rg = Rf = R

10kΩ to VCM 640 ns

tEN Enable to Output Turn-on Delay T ime, 10%

EN to 10% VOUT VEN = 5V to 0V, AV

= +2,

Rg = Rf = RL = 1k to VCM 15 µs

Enable to Output Turn-of f Delay Time, 10%

EN to 10% VOUT VEN = 0V to 5V, AV

= +2,

Rg = Rf = R

= 1k

to VCM 0.5 µs

NOTE:

1. Parts are 100% tested at +25°C. Temperature limits established by characterization and are not production tested.

Electrical Specifications V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open, TA = +25°C unless otherwise specified.

Boldface limits apply over the operating temperature range, -40°C to +125°C. Temperature data

established by characterization. (Continued)

PARAMETER DESCRIPTION CONDITIONS MIN

(Note 1) TYP MAX

(Note 1) UNIT

ISL28158, ISL28258

4FN6377.2

February 11, 2008

Typical Performance Curves V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open.

FIGURE 1. GAIN vs FREQUENCY vs FEEDBACK RESISTOR

VALUES Rf/Rg

FIGURE 2. GAIN vs FREQUENCY vs VOUT, RL = 1k

FIGURE 3. GAIN vs FREQUENCY vs VOUT, RL = 10k FIGURE 4. GAIN vs FREQUENCY vs VOUT, RL = 100k

FIGURE 5. GAIN vs FREQUENCY vs RLFIGURE 6. FREQUENCY RESPONSE vs CLOSED LOOP GAIN

-9

-8

-7

-6

-5

-4

-3

-2

-1

100 1k 10k 100k 1M

FREQUENCY (Hz)

NORMALIZED GAIN (dB)

V+ = 5V

RL = 1k

AV = +2

VOUT = 10mVP-P

CL = 16.3pF

Rf = Rg = 10k

Rf = Rg = 4.99k

Rf = Rg = 1k

Rf = Rg = 499

-8

-7

-6

-5

-4

-3

-2

-1

1k 10k 100k 1M

FREQUENCY (Hz)

VOUT = 100mV

VOUT = 1V

NORMALIZED GAIN (dB)

VOUT = 50mV

VOUT = 10mV

V+ = 5V

RL = 1k

AV = +1

VOUT = 10mVP-P

CL = 16.3pF

-9

-8

-7

-6

-5

-4

-3

-2

-1

1k 10k 100k 1M

FREQUENCY (Hz)

VOUT = 100mV

VOUT = 50mV

VOUT = 10mV

V+ = 5V

RL = 10k

AV = +1

VOUT = 10mVP-P

CL = 16.3pF

VOUT = 1V

NORMALIZED GAIN (dB)

-9

-8

-7

-6

-5

-4

-3

-2

-1

1k 10k 100k 1M

FREQUENCY (Hz)

NORMALIZED GAIN (dB)

V+ = 5V

RL = 100k

AV = +1

VOUT = 10mVP-P

CL = 16.3pF

VOUT = 100mV

VOUT = 50mV

VOUT = 10mV

VOUT = 1V

-6

-5

-4

-3

-2

-1

1k 10k 100k 1M

FREQUENCY (Hz)

RL = 10k

RL = 1k

RL = 100k

NORMALIZED GAIN (dB)

V+ = 5V

AV = +1

VOUT = 10mVP-P

CL = 16.3pF

10 100 1k 10k 100k 1M

FREQUENCY (Hz)

-10

70 AV = 1, Rg = INF, Rf = 0

AV = 10, Rg = 1k, Rf = 9.09k

AV = 101, Rg = 1k, Rf = 100k

AV = 1001, Rg = 1k, Rf = 1M

AV = 1001

AV = 101

AV = 10

AV = 1

V+ = 5V

VOUT = 10mVP-P

CL = 16.3pF

RL = 10k

GAIN (dB)

ISL28158, ISL28258

5FN6377.2

February 11, 2008

FIGURE 7. GAIN vs FREQUENCY vs SUPPLY VOLTAGE FIGURE 8. GAIN vs FREQUENCY vs CL

FIGURE 9. CMRR vs FREQUENCY, V+ = 2.4V AND 5V FIGURE 10. PSRR vs FREQUENCY, V+, V- = ±1.2V

FIGURE 11. PSRR vs FREQUENCY, V+, V- = ±2.5V FIGURE 12. INPUT VOLTAGE NOISE DENSITY vs FREQUENC Y

Typical Performance Curves V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open. (Continued)

-8

-7

-6

-5

-4

-3

-2

-1

1V+ = 5V

1k 10k 100k 1M

FREQUENCY (Hz)

NORMALIZED GAIN (dB)

RL = 10k

AV = +1

VOUT = 10mVP-P

CL = 16.3pF

V+ = 2.4V

-10

-8

-6

-4

-2

1k 10k 100k 1M

FREQUENCY (Hz)

NORMALIZED GAIN (dB)

CL = 43.3pF

CL = 34.3pF

CL = 16.3pF

CL = 98.3pF

CL = 72.3pF

CL = 55.3pF

V+ = 5V

RL = 10k

AV = +1

VOUT = 10mVP-P

-90

-80

-70

-60

-50

-40

-30

-20

-10

10 100 1k 10k 100k 1M

FREQUENCY (Hz)

V+ = 2.4V, 5V

RL = 10k

AV = +1

VCM = 1VP-P

CL = 16.3pF

CMRR (dB)

-100

-80

-60

-40

-20

-90

-70

-50

-30

-10

10 100 1k 10k 100k 1M

FREQUENCY (Hz)

V+ = 2.4V

RL = 10k

AV = +1

VCM = 1VP-P

CL = 16.3pF

PSRR-

PSRR+

PSRR (dB)

-100

-80

-60

-40

-20

-90

-70

-50

-30

-10

PSRR (dB)

10 100 1k 10k 100k 1M

FREQUENCY (Hz)

V+ = 5V

RL = 10k

AV = +1

VCM = 1VP-P

CL = 16.3pF

PSRR-

PSRR+

100

1000

1 10 100 1k 10k 100k

FREQUENCY (Hz)

V+ = 5V

RL = 10k

AV = +1

CL = 16.3pF

INPUT VOLTAGE NOISE (nV/√Hz)

ISL28158, ISL28258

6FN6377.2

February 11, 2008

FIGURE 13. INPUT CURRENT NOISE DENSITY vs FREQUENCY FIGURE 14. INPUT VOLTAGE NOISE 0.1Hz TO 10Hz

FIGURE 15. LARGE SIGNAL STEP RESPONSE FIGURE 16. SMALL SIGNAL STEP RESPONSE

FIGURE 17. ENABLE TO OUTPUT RESPONSE

Typical Performance Curves V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open. (Continued)

0.1

1 10 100 1k 10k 100k

FREQUENCY (Hz)

V+ = 5V

RL = 10k

AV = +1

CL = 16.3pF

INPUT CURRENT NOISE (pA/√Hz)

-1.6

-1.4

-1.2

-1.0

-0.8

-0.6

-0.4

-0.2

012345678910

TIME (s)

V+ = 5V RL = 10k

Rg = 100, Rf = 100k

AV = 1000

CL = 16.3pF

INPUT NOISE (µV)

-0.6

-0.4

-0.2

0.2

0.4

0.6

0 50 100 150 200 250 300 350 400

TIME (µs)

V+, V- = ±2.5V

RL = 10k

Rg = Rf = 10k

AV = 2

CL = 16.3pF

VOUT = 1VP-P

LARGE SIGNAL (V)

0.006

0.008

0.010

0.012

0.014

0.016

0.018

0.020

0 50 100 150 200 250 300 350 400

TIME (µs)

V+, V- = ±2.5V

RL = 10k

Rg = Rf = 10k

AV = 2

CL = 16.3pF

VOUT = 10mVP-P

SMALL SIGNAL (V)

-1

0 50 100 150 200 250 300 350 400

TIME (µs)

-0.2

0.2

0.4

0.6

0.8

1.0

1.2

V-ENABLE (V)

OUTPUT (V)

V+ = 5V

Rg = Rf = 10k

AV = +2

VOUT = 1VP-P

CL = 16.3pF

V-ENABLE V-OUT

RL = 10k

ISL28158, ISL28258

7FN6377.2

February 11, 2008

FIGURE 18. INPUT OFFSET VOLT AGE vs COMMON MODE

INPUT VOLTAGE FIGURE 19. INPUT BIAS CURRENT vs COMMON MODE

INPUT VOLTAGE

FIGURE 20. SUPPLY CURRENT ENABLED vs

TEMPERATURE, V+, V- = ±2.5V FIGURE 21. SUPPLY CURRENT DISABLED vs

TEMPERATURE, V+, V- = ±2.5V

FIGURE 22. VOS (SOIC PKG) vs TEMPERATURE, VIN = 0V,

V+, V- = ±2.75V FIGURE 23. VOS (SOT PKG) vs TEMPERATURE, VIN = 0V,

V+, V- = ±2.75V

Typical Performance Curves V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open. (Continued)

-500

-400

-300

-200

-100

100

200

300

400

500

0123456

VCM (V)

100

-1

V+ = 5V

RL = OPEN

AV = +1000

Rf = 100k, Rg = 100

VOS (µV)

-100

-80

-60

-40

-20

100

-10123456

VCM (V)

V+ = 5V

RL = OPEN

AV = +1000

Rf = 100k, Rg = 100

I-BIAS (pA)

-40-200 20406080100120

TEMPERATURE (°C)

MAX

MEDIAN

MIN

N = 1000

CURRENT (µA)

-40-200 20406080100120

TEMPERATURE (°C)

MAX

MEDIAN

MIN

N = 1000

CURRENT (µA)

-700

-500

-300

-100

100

300

500

-40 -20 0 20 40 60 80 100 120

TEMPERATURE (°C)

MAX

MEDIAN

MIN

N = 1000

VOS (µV)

-1000

-800

-600

-400

-200

200

400

600

800

-40-200 20406080100120

TEMPERATURE (°C)

MAX

MEDIAN

MIN

N = 1000

VOS (µV)

ISL28158, ISL28258

8FN6377.2

February 11, 2008

FIGURE 24. VOS (SOIC PKG) vs TEMPERATURE, VIN = 0V,

V+, V- = ±2.5V FIGURE 25. VOS (SOT PKG) vs TEMPERATURE, VIN = 0V,

V+, V- = ±2.5V

FIGURE 26. VOS (SOIC PKG) vs TEMPERATURE, VIN = 0V,

V+, V- = ±1.2V FIGURE 27. VOS (SOT PKG) vs TEMPERATURE, VIN = 0V,

V+, V- = ±1.2V

FIGURE 28. IBIAS+ vs TEMPERATURE, V+, V- = ±2.5V FIGURE 29. IBIAS- vs TEMPERATURE, V+, V- = ±2.5V

Typical Performance Curves V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open. (Continued)

-700

-500

-300

-100

100

300

500

-40-200 20406080100120

TEMPERATURE (°C)

MAX

MEDIAN

MIN

N = 1000

VOS (µV)

-1000

-800

-600

-400

-200

200

400

600

800

1000

-40 -20 0 20 40 60 80 100 120

MAX

MEDIAN

MIN

N = 1000

TEMPERATURE (°C)

VOS (µV)

-700

-500

-300

-100

100

300

500

700

-40 -20 0 20 40 60 80 100 120

TEMPERATURE (°C)

MEDIAN

MIN

N = 1000

VOS (µV)

MAX

-1000

-800

-600

-400

-200

200

400

600

800

1000

-40 -20 0 20 40 60 80 100 120

MAX

MEDIAN

MIN

N = 1000

VOS (µV)

TEMPERATURE (°C)

-50

100

150

200

250

-40 -20 0 20 40 60 80 100 120

TEMPERATURE (°C)

MAX

MEDIAN

MIN

N = 1000

IBIAS+ (pA)

-50

100

150

200

250

300

350

400

450

500

-40-200 20406080100120

TEMPERATURE (°C)

MAX

N = 1000

MEDIAN

IBIAS- (pA)

MIN

ISL28158, ISL28258

9FN6377.2

February 11, 2008

FIGURE 30. IBIAS+ vs TEMPERATURE, V+, V- = ±1.2V FIGURE 31. IBIAS- vs TEMPERATURE, V+, V- = ±1.2V

FIGURE 32. IOS vs TEMPERATURE, V+, V- = ±2.5 FIGURE 33. IOS vs TEMPERATURE, V+, V- = ±1.2V

FIGURE 34. CMRR vs TEMPERA TURE, VCM = -2.5V TO +2.5V,

V+, V- = ±2.5V FIGURE 35. PSRR vs TEMPERATURE, V+, V- = ±1.2V TO ±2.75V

Typical Performance Curves V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open. (Continued)

-50

100

150

200

250

300

350

-40 -20 0 20 40 60 80 100 120

TEMPERATURE (°C)

MAX

MEDIAN

MIN

N = 1000

IBIAS+ (pA)

-50

100

150

200

250

300

350

400

450

-40-200 20406080100120

TEMPERATURE (°C)

MAX

MEDIAN

MIN

N = 1000

IBIAS- (pA)

-160

-140

-120

-100

-80

-60

-40

-20

-40 -20 0 20 40 60 80 100 120

TEMPERATURE (°C)

MAX

MEDIAN

MIN

N = 1000

IOS (pA)

-150

-130

-110

-90

-70

-50

-30

-10

-40 -20 0 20 40 60 80 100 120

TEMPERATURE (°C)

MAX

MIN

N = 1000

IOS (pA)

MEDIAN

100

110

120

130

140

-40-200 20406080100120

TEMPERATURE (°C)

CMRR (dB)

MAX

MEDIAN

MIN

N = 1000

100

110

120

130

140

TEMPERATURE (°C)

PSRR (dB)

MAX

MIN

-40-200 20406080100120

N = 1000

MEDIAN

ISL28158, ISL28258

10 FN6377.2

February 11, 2008

FIGURE 36. A VOL vs TEMPERATURE, V+, V - = ±2.5V,

VO = -2V TO +2V, RL = 100k FIGURE 37. A VOL vs TEMPERATURE, V+, V - = ±2.5V,

VO = -2V TO +2V, RL = 1k

FIGURE 38. VOUT HIGH vs TEMPERATURE, V+, V - =±2.5V,

RL = 1k FIGURE 39. VOUT HIGH vs TEMPERATURE, V+, V - = ±2.5V,

RL = 100k

FIGURE 40. VOUT LOW vs TEMPERA TURE, V+, V - = ±2.5V,

RL = 1k FIGURE 41. VOUT LOW vs TE MPERATURE, V+, V - = ±2.5V,

RL = 100k

Typical Performance Curves V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open. (Continued)

100

150

200

250

300

350

400

450

-40 -20 0 20 40 60 80 100 120

TEMPERATURE (°C)

MAX

MEDIAN

MIN

N = 1000

AVOL (V/mV)

-40 -20 0 20 40 60 80 100 120

TEMPERATURE (°C)

MAX

MEDIAN

MIN

N = 1000

AVOL (V/mV)

4.84

4.85

4.86

4.87

4.88

4.89

4.90

4.91

4.92

-40 -20 0 20 40 60 80 100 120

TEMPERATURE (°C)

MAX

MIN

MEDIAN

N = 1000

VOUT (V)

4.9955

4.9960

4.9965

4.9970

4.9975

4.9980

-40 -20 0 20 40 60 80 100 120

TEMPERATURE (°C)

MAX

MIN

MEDIAN

N = 1000

VOUT (V)

100

110

120

130

140

150

160

170

180

190

-40 -20 0 20 40 60 80 100 120

TEMPERATURE (°C)

MEDIAN

MIN

MAX

N = 1000

VOUT (mV)

4.0

4.5

5.0

5.5

6.0

6.5

7.0

7.5

-40 -20 0 20 40 60 80 100 120

TEMPERATURE (°C)

MEDIAN

MIN

MAX

N = 1000

VOUT (mV)

ISL28158, ISL28258

11 FN6377.2

February 11, 2008

FIGURE 42. IO+ SHORT CIRCUIT OUTPUT CURRENT vs

TEMPERATURE VIN = -2.55V, RL = 10k,

V+, V- = ±2.5V

FIGURE 43. IO- SHORT CIRCUIT OUTPUT CURRENT vs

TEMPERATURE VIN = +2.55V, RL = 10k,

V+, V- = ±2.5V

Pin Descriptions

ISL28158

(6 Ld SOT-23) ISL28158

(8 Ld SOIC)

ISL28258

(8 Ld SOIC)

(8 Ld MSOP) PIN NAME FUNCTION EQUIVALENT CIRCUIT

1, 5 NC Not connected

2 (A)

6 (B)

IN-

IN- (A)

IN- (B)

inverting input

Circuit 1

3 (A)

5 (B)

IN+

IN+ (A)

IN+ (B)

Non-inverting input See Circuit 1

2 4 4 V- Negative supply

Circuit 2

1 (A)

7 (B)

OUT

OUT (A)

OUT (B)

Output

Circuit 3

6 7 8 V+ Positive supply See Circuit 2

58 ENChip enable

Circuit 3

Typical Performance Curves V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open. (Continued)

-40 -20 0 20 40 60 80 100 120

TEMPERATURE (°C)

IO+ SHORT CIRCUIT CURRENT (mA)

MAX

MIN

N = 1000

MEDIAN

-32

-30

-28

-26

-24

-22

-20

-40 -20 0 20 40 60 80 100 120

TEMPERATURE (°C)

IO- SHORT CIRCUIT CURRENT (mA)

N = 1000 MAX

MEDIAN

MIN

IN+IN-

V+

V-

V+

V-

CAPACITIVELY

COUPLED

ESD CLAMP

V+

V-

OUT

LOGIC

V+

V-

ISL28158, ISL28258

12 FN6377.2

February 11, 2008

Applications Information

Introduction

The ISL28158 is a single CMOS rail-to -ra il input, output

(RRIO) operational amplifier with an enable feature. The

ISL28258 is a dual version withou t the enable feature. Both

devices are designed to operate from single supply (2.4V to

5.5V) or dual supplies (±1.2V to ±2.75V).

Rail-to-Rail Input/Output

These devices feature PMOS inputs with an input common

mode range that extends up to 0.3V beyond the V+ rail, and

to 0.1V below the V- rail. The CMOS output features

excellent drive capability, typically swinging to within 6mV of

either rai l wi t h a 10 0kΩ load.

Results of Over-Driving the Outpu t

Caution should be used when over-dri ving the output for

long periods of time. Over-driving the output can occur in two

ways. 1) The input voltage times the gain of the amplifier

exceeds the supply voltage by a large value or, 2) the output

current required is higher than the output stage can deliv er.

These conditions can result in a shift in the Input Offset

Voltage (VOS) as much as 1µV/hr. of exposure unde r these

conditions.

IN+ and IN- Input Protection

All input terminals have internal ESD protection diod es to both

positive and negati ve supply rails, limitin g the input vol t age to

within one diode beyond the supply rail s. They also contain

back-to-back diodes across the input te rmina ls (see “Pin

Descriptions” on page 11 - Circuit 1). For applications where

the input diff erential volt age is exp ected to exceed 0.5V, an

external series resistor must be used to ensure the input

currents never excee d 5mA (Figure 44).

Enable/Disable Feature

The ISL28158 offers an EN pin that disables the device

when pulled up to at least 2.0V. In the disabled state (output

in a high impedance state), the part consumes typically 10µA

at room temperature. By disabling the part, multiple

ISL28158 parts can be connected together as a MUX. In this

configuration, the outputs are tied togethe r in parallel and a

channel can be selected by the EN pin. The loading effects

of the feedback resistors of the disabled amplifier must be

considered when multiple amplifier outputs are connected

together. Note th at feed through from the IN+ to IN- pins

occurs on any Mux Amp disabled channel where the input

differential voltage exceeds 0.5V (e.g., active channel

VOUT = 1V, while disabled channel VIN = GND), so the mux

implementation is best suited for small signal applications. If

large signals are required, use series IN+ resistors, or large

value RF, to keep the feed through current low enough to

minimize the impact on the active channel. See “Limitations

of the Differential Input Protection” on page 12 for more

details. The EN pin also has an internal pull-down. If left

open, the EN pin will pull to the negative rail and the device

will be enabled by default. When not used, the EN pin should

either be left floating or connected directly to the -V pin.

Limitations of the Dif ferential Input Protection

If the input differential voltage is expected to exceed 0.5V, an

external current limiting resistor must be used to ensure the

input current never exceeds 5mA. For non-inverting unity

gain applications, the current limiting can be via a series IN+

resistor, or via a feedback resistor of appropriate value. For

other gain configurations, the series IN+ resistor is the best

choice, unless the feedback (RF) and gain setting (RG)

resistors are both sufficiently large to limit the input current to

5mA.

Large differential input voltages can arise from several

sources:

1) During open loop (comparator) operation. Used this way,

the IN+ and IN- voltages don’t track, so differentials arise.

2) When the amplifier is disabled but an inpu t signal is still

present. An RL or RG to GND keeps the IN- at GND, while

the varying IN+ signal creates a differential voltage. Mux

Amp applications are similar, except that the active channel

VOUT determines the voltage on the IN- terminal.

3) When the slew rate of the input pulse is considerably

faster than the op amp’ s slew rate. If th e VOUT can’t keep up

with the IN+ signal, a differential voltage results, and visible

distortion occurs on the input and output signals. To avoid

this issue, keep the input slew rate below 0.1V/µs, or use

appropriate current limi ting resistors.

Large (>2V) differential input voltages can also cause an

increase in disabled ICC.

FIGURE 44. INPUT CURRENT LIMIT I NG

RIN RL

VIN VOUT

ISL28158, ISL28258

13 FN6377.2

February 11, 2008

Using Only One Channel

The ISL28258 is a dual op amp. If th e application only

requires one channel, the user must configure the unused

channel to prevent it from oscillating. The unused channel

will oscillate if the input and output pins are floating. This will

result in higher than expected supply currents and possible

noise injection into th e channel being used. Th e proper way

to prevent this oscillation is to short the output to the

negative input and ground the positive input (as shown in

Figure 45).

Current Limiting

These devices have no internal current-limiting circuitry. If

the output is shorted, it is possible to exceed the Absolute

Maximum Rating for output current or power dissipation,

potentially resulting in the destructi on of the device.

Power Dissipation

It is possible to exceed the +125°C maximum junction

temperatures under certain load and power-supply

conditions. It is therefore important to calculate the

maximum junction temperature (TJMAX) for all applications

to determine if power supply voltages, load conditions, or

package type need to be modified to remain in the safe

operating area. These paramete rs are related in Equation 1:

where:

•P

DMAXTOTAL is the sum of the maximum power

dissipation of each amplifier in the package (PDMAX)

•PD

MAX for each amplifier can be calculated using

Equation 2:

where:

•T

MAX = Maximum ambient temperature

•θJA = Thermal resistance of the package

•PD

MAX = Maximum power dissipation of 1 amplifier

•V

S = Supply voltage (Magnitude of V + and V-)

•I

MAX = Maximum supply current of 1 amplifier

•V

OUTMAX = Maximum output voltage swing of the

application

•R

L = Load resistance

FIGURE 45. PREVENTING OSCILLA TIONS IN UNUSED

CHANNELS

TJMAX TMAX θJAxPDMAXTOTAL

()+= (EQ. 1)

PDMAX 2*VSISMAX VS

( - VOUTMAX)VOUTMAX

----------------------------

×+×=

(EQ. 2)

ISL28158, ISL28258

14 FN6377.2

February 11, 2008

ISL28158, ISL28258

SOT-23 Package Family

321

0.15 DC

2X 0.20 C

B0.20 MDC A-B

2 3

SEATING

PLANE

0.10 C

1 3

0.15 A-BC

(L1)

0.25

0° +3°

-0°

GAUGE

PLANE

MDP0038

SOT-23 PACKAGE FAMILY

SYMBOL

MILLIMETERS

TOLERANCESOT23-5 SOT23-6

A 1.45 1.45 MAX

A1 0.10 0.10 ±0.05

A2 1.14 1.14 ±0.15

b 0.40 0.40 ±0.05

c 0.14 0.14 ±0.06

D 2.90 2.90 Basic

E 2.80 2.80 Basic

E1 1.60 1.60 Basic

e 0.95 0.95 Basic

e1 1.90 1.90 Basic

L 0.45 0.45 ±0.10

L1 0.60 0.60 Reference

N 5 6 Reference

Rev. F 2/07

NOTES:

1. Plastic or metal protrusions of 0.25mm maximum per side are not

included.

2. Plastic interlead protrusions of 0.25mm maximum per side are not

included.

3. This dimension is measured at Datum Plane “H”.

4. Dimensioning and tolerancing per ASME Y14.5M-1994.

5. Index area - Pin #1 I.D. will be located within the indicated zone

(SOT23-6 only).

6. SOT23-5 version has no center lead (shown as a dashed line).

15 FN6377.2

February 11, 2008

ISL28158, ISL28258

Small Outline Package Family (SO)

GAUGE

PLANE

A1 L

DETAIL X 4° ±4°

SEATING

PLANE

0.010 BMCA

0.004 C

0.010 BMCA

(N/2)

NN (N/2)+1

PIN #1

I.D. MARK

h X 45°

SEE DETAIL “X”

0.010

MDP0027

SMALL OUTLINE PACKAGE FAMILY (SO)

SYMBOL

INCHES

TOLERANCE NOTESSO-8 SO-14

SO16

(0.150”)

SO16 (0.300”)

(SOL-16)

SO20

(SOL-20)

SO24

(SOL-24)

SO28

(SOL-28)

A 0.068 0.068 0.068 0.104 0.104 0.104 0.104 MAX -

A1 0.006 0.006 0.006 0.007 0.007 0.007 0.007 ±0.003 -

A2 0.057 0.057 0.057 0.092 0.092 0.092 0.092 ±0.002 -

b 0.017 0.017 0.017 0.017 0.017 0.017 0.017 ±0.003 -

c 0.009 0.009 0.009 0.011 0.011 0.011 0.011 ±0.001 -

D 0.193 0.341 0.390 0.406 0.504 0.606 0.704 ±0.004 1, 3

E 0.236 0.236 0.236 0.406 0.406 0.406 0.406 ±0.008 -

E1 0.154 0.154 0.154 0.295 0.295 0.295 0.295 ±0.004 2, 3

e 0.050 0.050 0.050 0.050 0.050 0.050 0.050 Basic -

L 0.025 0.025 0.025 0.030 0.030 0.030 0.030 ±0.009 -

L1 0.041 0.041 0.041 0.056 0.056 0.056 0.056 Basic -

h 0.013 0.013 0.013 0.020 0.020 0.020 0.020 Reference -

N 8 14 16 16 20 24 28 Reference -

Rev. M 2/07

NOTES:

1. Plastic or metal protrusions of 0.006” maximum per side are not included.

2. Plastic interlead protrusions of 0.010” maximum per side are not included.

3. Dimensions “D” and “E1” are measured at Datum Plane “H”.

4. Dimensioning and tolerancing per ASME Y14.5M-1994

All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.

Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality

Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without

notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and

reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result

from its use. No lice nse is gran t ed by i mpli catio n or other wise u nder an y p a tent or patent right s of Int ersi l or it s sub sidi aries.

For information regarding Intersil Corporation and its products, see www.intersil.com

FN6377.2

February 11, 2008

ISL28158, ISL28258

Mini SO Package Family (MSOP)

1(N/2)

(N/2)+1

PLANE

SEATING

N LEADS

0.10 C

PIN #1

I.D.

E1E

DETAIL X

3° ±3°

GAUGE

PLANE

SEE DETAIL "X"

0.25

A1 L

0.25 C A B

0.08 C A B

MDP0043

MINI SO PACKAGE FAMILY

SYMBOL

MILLIMETERS

TOLERANCE NOTESMSOP8 MSOP10

A 1.10 1.10 Max. -

A1 0.10 0.10 ±0.05 -

A2 0.86 0.86 ±0.09 -

b 0.33 0.23 +0.07/-0.08 -

c 0.18 0.18 ±0.05 -

D 3.00 3.00 ±0.10 1, 3

E 4.90 4.90 ±0.15 -

E1 3.00 3.00 ±0.10 2, 3

e 0.65 0.50 Basic -

L 0.55 0.55 ±0.15 -

L1 0.95 0.95 Basic -

N 8 10 Reference -

Rev. D 2/07

NOTES:

1. Plastic or metal protrusions of 0.15mm maximum per side are not

included.

2. Plastic interlead protrusions of 0.25mm maximum per side are

not included.

3. Dimensions “D” and “E1” are measured at Datum Plane “H”.

4. Dimensioning and tolerancing per ASME Y14.5M-1994.