ISL28246FBZ-T7 - Intersil Corporation

FN6321.3

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

1-888-INTERSIL or 1-888-468-3774 |Intersil (and design) is a registered trademark of Intersil Americas Inc.

All other trademarks mentioned are the property of their respective owners.

ISL28146, ISL28246

5MHz, Single and Dual Rail-to-Rail

Input-Output (RRIO) Op Amps

The ISL28146 and ISL28246 are lo w-power single and dual

operational amplifiers optimized for single supply operation

from 2.4V to 5.5V, allowing operation from one lithium cell or

two Ni-Cd batteries. They feature a gain-bandwidth product

of 5MHz and are unity-gain stable with a -3dB bandwidth of

13MHz.

These devices feature an Input Range Enhancement Circuit

(IREC) which enables them to maintain CMRR performance for

input voltages greater than the positive supply . The input signal

is capable of swinging 0.25V above a 5.0V supply and to within

10mV from ground. The output operation is rail-to-rail.

The parts draw minimal supply current while meeting

excellent DC accuracy, AC performance, noise and output

drive specifications. The ISL28146 features an enable pin

that can be used to turn the device off and reduce the supply

current to only 16µA. Operation is guaranteed over -40°C to

+125°C temperature range.

Features

• 5MHz gain bandwidth product @ AV = 10 0

• 13MHz -3db unity gain bandwidth

• 1mA typical supply current (per amplifier)

• 650µV maximum offset voltage

• 16nA typical input bias current

• Down to 2.4V single supply voltage range

• Rail-to-rail input and output

• Enable pin (ISL28146 only)

• -40°C to +125°C operation

• Pb-free (RoHS compliant)

Applications

• Low-end audio

• 4mA to 20mA current loops

• Medical devices

• Sensor amplifiers

• ADC buffers

• DAC output amplifiers

Ordering Information

PART

NUMBER

(Note) PART

MARKING PACKAGE

(Pb-Free) PKG.

DWG. #

ISL28146FHZ-T7* GABS 6 Ld SOT-23 MDP0038

ISL28146FHZ-T7A* GABS 6 Ld SOT-23 MDP0038

ISL28246FBZ 28246 FBZ 8 Ld SOIC MDP0027

ISL28246FBZ-T7* 28246 FBZ 8 Ld SOIC MDP0027

ISL28246FUZ 8246Z 8 Ld MSOP MDP0043

ISL28246FUZ-T7* 8246Z 8 Ld MSOP MDP0043

ISL28146EVAL1Z Evaluation Board - 6 Ld SOT-23

ISL28246SOICEVAL1Z Evaluation Board - 8 Ld SOIC

ISL28246MSOPEVAL1Z Evaluation Board - 8 Ld MSOP

*Please refer to TB347 for details on reel specifications

NOTE: These Intersil Pb-free plastic packaged products employ special

Pb-free material sets, molding compounds/die attach materials, and

100% matte tin plate plus anneal (e3 termination finish, which is RoHS

compliant and compatible with both SnPb and Pb-free soldering

operations). Intersil Pb-free products are MSL classified at Pb-free peak

reflow temperatures that meet or exceed the Pb-free requirements of

IPC/JEDEC J STD-020.

Pinouts

ISL28146

(6 LD SOT-23)

TOP VIEW

ISL28246

(8 LD MSOP)

TOP VIEW

ISL28246

(8 LD SOIC)

TOP VIEW

OUT

V-

IN+

V+

IN-

OUT_A

IN-_A

IN+_A

V+

OUT_

IN-_B

V- IN+_B

OUT_A

IN-_A

IN+_A

V+

OUT_B

IN-_B

V- IN+_B

Data Sheet June 23, 2008

2FN6321.3

June 23, 2008

Absolute Maximum Ratings (TA = +25°C) Thermal Information

Supply Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.75V

Supply Turn On Voltage Slew Rate . . . . . . . . . . . . . . . . . . . . . 1V/µs

Differential Input Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5mA

Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5V

Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . V- - 0.5V to V+ + 0.5V

ESD Rating

Human Body Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3kV

Machine Model. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .300V

Charged Device Model. . . . . . . . . . . . . . . . . . . . . . . . . . . . .1500V

Thermal Resistance (Typical, Note 1) θJA (°C/W)

6 Ld SOT-23 Package . . . . . . . . . . . . . . . . . . . . . . . 230

8 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . 120

8 Ld MSOP Package . . . . . . . . . . . . . . . . . . . . . . . . 160

Output Short-Circuit Duration . . . . . . . . . . . . . . . . . . . . . . .Indefinite

Ambient Operating Temperature Range . . . . . . . . .-40°C to +125°C

Storage Temperature Range . . . . . . . . . . . . . . . . . .-65°C to +150°C

Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . .+125°C

Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below

http://www.intersil.com/pbfree/Pb-FreeReflow.asp

CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and

result in failures not covered by warranty.

NOTE:

1. θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.

IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests

are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA

Electrical Specifications V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open, TA = +25°C unless otherwise specified.

Boldface limits apply over the operating temperature range, -40°C to +125°C.

Temperature data established by characterization.

PARAMETER DESCRIPTION CONDITIONS MIN

(Note 2) TYP MAX

(Note 2) UNIT

DC SPECIFICATIONS

VOS Input Offset Voltage -650

-750 30 650

750 µV

Input Offset Voltage vs Temperature 0.3 µV/°C

IOS Input Offset Current -10

-15 010

15 nA

IBInput Bias Current -35

-40 16 35

40 nA

CMIR Common-Mode Voltage Range Guaranteed by CMRR 0 5 V

CMRR Common-Mode Rejection Ratio VCM = 0V to 5V 90

85 114 dB

PSRR Power Supply Rejection Ratio V+ = 2.4V to 5.5V 90

85 99 dB

AVOL Large Signal Voltage Gain VO = 0.5V to 4V, RL = 100kΩ to VCM 600

500 1770 V/mV

VO = 0.5V to 4V, RL = 1kΩ to VCM 140 V/mV

VOUT Maximum Output Voltage Swing Output low, RL = 100kΩ to VCM 36

10 mV

Output low, RL = 1kΩ to VCM 70 90

110 mV

Output high, RL = 100kΩ to VCM 4.99

4.98 4.994 mV

Output high, RL = 1kΩ to VCM 4.92

4.89 4.94 V

IS,ON Supply Current, Enabled Per Amplifier 1 1.25

1.4 mA

IS,OFF Supply Current, Disabled 10 14

16 µA

ΔVOS

ΔT

----------------

ISL28146, ISL28246

3FN6321.3

June 23, 2008

IO+ Short-Circuit Output Source Current RL = 10Ω to VCM 48

45 56 mA

IO- Short-Circuit Output Sink Current RL = 10Ω to VCM -54 -48

-45 mA

VSUPPLY Supply Operating Range V+ to V-2.4 5.5 V

VENH EN Pin High Level, ISL28146 Only 2V

VENL EN Pin Low Level, ISL28146 Only 0.8 V

IENH EN Pin Input High Current, ISL28146

Only VEN = V+11.5

1.6 µA

IENL EN Pin Input Low Current, ISL28146

Only VEN = V-16 25

30 nA

AC SPECIFICATIONS

GBW Gain Bandwidth Product AV = 100, RF = 100kΩ, RG = 1kΩ5MHz

Unity Gain

Bandwidth -3dB Bandwidth AV =1, RF = 0Ω, RL = 10kΩ, VOUT = 10mVP-P 13 MHz

eNInput Noise Voltage Peak-to-Peak f = 0.1Hz to 10Hz 0.4 µVP-P

Input Noise Voltage Density fO = 1kHz 12 nV/√Hz

iNInput Noise Current Density fO = 10kHz 0.35 pA/√Hz

CMRR Input Common Mode Rejection Ratio fO = to 120Hz; VCM = 1VP-P, RL = 1kΩ-90 dB

PSRR-

to 120Hz Power Supply Rejection Ratio (V-)V

+, V- = ±1.2V and ±2.5V, VSOURCE = 1VP-P,

RL = 1kΩ-88 dB

PSRR+

to 120Hz Power Supply Rejection Ratio (V+)V

+, V- = ±1.2V and ±2.5V, VSOURCE = 1VP-P,

RL = 1kΩ-105 dB

TRANSIENT RESPONSE

SR Slew Rate VOUT = ±1.5V, Rf = 50kΩ, RG = 50kΩ to VCM ±1.9 V/µs

tr, tf, Large

Signal Rise Time, 10% to 90%, VOUT AV

= +2

VOUT = 2VP-P, Rg = Rf = R

= 1k

Ω to VCM 0.6 µs

Fall Time, 90% to 10%, VOUT AV

= +2

VOUT = 2VP-P, Rg = Rf = R

= 1k

Ω to VCM 0.5 µs

tr, tf, Small

Signal Rise Time, 10% to 90%, VOUT AV

= +2

VOUT = 10mVP-P,

Rg = Rf = R

= 1k

Ω to VCM 65 nS

Fall Time, 90% to 10%, VOUT AV

= +2

VOUT = 10mVP-P,

Rg = Rf = R

= 1k

Ω to VCM 62 nS

tEN Enable to Output Turn-on Delay Time,

10% EN to 10% VOUT VEN = 5V to 0V, AV

= +2,

Rg = Rf = R

= 1k

Ω to VCM 5µs

Enable to Output Turn-off Delay Time,

10% EN to 10% VOUT VEN = 0V to 5V, AV

= +2,

Rg = Rf = R

= 1k

Ω to VCM 0.3 µs

NOTE:

2. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization

and are not production tested.

Electrical Specifications V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open, TA = +25°C unless otherwise specified.

Boldface limits apply over the operating temperature range, -40°C to +125°C.

Temperature data established by characterization. (Continued)

PARAMETER DESCRIPTION CONDITIONS MIN

(Note 2) TYP MAX

(Note 2) UNIT

ISL28146, ISL28246

4FN6321.3

June 23, 2008

Typical Performance Curves V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open

FIGURE 1. GAIN vs FREQUENCY vs FEEDBACK RESISTOR

VALUES Rf/Rg

FIGURE 2. GAIN vs FREQUENCY vs VOUT, RL = 1k

FIGURE 3. GAIN vs FREQUENCY vs VOUT, RL = 10k FIGURE 4. GAIN vs FREQUENCY vs VOUT, RL = 100k

FIGURE 5. GAIN vs FREQUENCY vs RLFIGURE 6. FREQUENCY R ESPONSE vs CLOSED LOOP GAIN

-15

-10

-5

100 1k 10k 100k 1M 10M 100M

FREQUENCY (Hz)

V+ = 5V

RL = 1k

AV = +2

VOUT = 10mVP-P

CL = 16.3pF

NORMALIZED GAIN (dB)

Rf = Rg = 100k

Rf = Rg = 1k

Rf = Rg = 10k

-9

-8

-7

-6

-5

-4

-3

-2

-1

10k 100k 1M 10M 100M

FREQUENCY (Hz)

V+ = 5V

RL = 1k

AV = +1

VOUT = 10mVP-P

CL = 16.3pF

NORMALIZED GAIN (dB)

VOUT = 100mV

VOUT = 10mV

VOUT = 50mV

VOUT = 1V

-9

-8

-7

-6

-5

-4

-3

-2

-1

10k 100k 1M 10M 100M

FREQUENCY

(Hz)

V+ = 5V

RL = 10k

AV = +1

VOUT = 10mVP-P

CL = 16.3pF

NORMALIZED GAIN (dB)

VOUT = 100mV

VOUT = 10mV

VOUT = 50mV

VOUT = 1V

-9

-8

-7

-6

-5

-4

-3

-2

-1

10k 100k 1M 10M 100M

FREQUENCY

(Hz)

V+ = 5V

RL = 100k

AV = +1

VOUT = 10mVP-P

CL = 16.3pF

NORMALIZED GAIN (dB)

VOUT = 100mV

VOUT = 10mV

VOUT = 50mV

VOUT = 1V

RL =10k

RL =1k

-9

-8

-7

-6

-5

-4

-3

-2

-1

10k 100k 1M 10M 100M

FREQUENCY

(Hz)

V+ = 5V

AV = +1

VOUT = 10mVP-P

CL = 16.3pF

NORMALIZED GAIN (dB)

RL =100k

-10

GAIN (dB)

100 1k 10k 100k 1M 10M 100M

FREQUENCY

(Hz)

V+ = 5V

VOUT = 10mVP-P

CL = 16.3pF

RL = 10k

AV = 1, Rg = INF, Rf = 0

AV = 10, Rg = 1k, Rf = 9.09k

AV = 101, Rg = 1k,

AV = 1001, Rg = 1k, Rf = 1M

Rf = 100k

ISL28146, ISL28246

5FN6321.3

June 23, 2008

FIGURE 7. GAIN vs FREQUENCY vs SUPPLY VOLTAGE FIGURE 8. GAIN vs FREQUENCY vs CL

FIGURE 9. CMRR vs FREQUENCY, V+ = 2.4V and 5V FIGURE 10. PSRR vs FREQUENCY, V+, V- = ±1.2V

FIGURE 11. PSRR vs FREQUENCY, V, V+, V- = ±2.5V FIGURE 12. INPUT VOLTAGE NOISE DENSITY vs FREQUENCY

Typical Performance Curves V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open (Continued)

-9

-8

-7

-6

-5

-4

-3

-2

-1

10k 100k 1M 10M 100M

FREQUENCY

(Hz)

NORMALIZED GAIN (dB)

RL = 10k

AV = +1

VOUT = 10mVP-P

CL = 16.3pF

V+ = 5V

V+ = 2.4V

-8

-7

-6

-5

-4

-3

-2

-1

CL = 51.7pF

CL = 43.7pF

CL = 37.7pF

CL = 26.7pF

CL = 16.7pF

CL = 4.7pF

10k 100k 1M 10M 100M

FREQUENCY (Hz)

V+ = 5V

RL = 1k

AV = +1

VOUT = 10mVP-P

NORMALIZED GAIN (dB)

-100

-80

-60

-40

-20

CMRR (dB)

V+ = 2.4V, 5V

RL = 1k

AV = +1

VCM = 1VP-P

CL = 16.3pF

100 1k 10k 100k 1M 10M

FREQUENCY (Hz)

10 -120

-100

-80

-60

-40

-20

PSRR (dB)

100 1k 10k 100k 1M 10M

FREQUENCY (Hz)

PSRR-

PSRR+

V+, V- = ±1.2V

RL = 1k

AV = +1

VSOURCE = 1VP-P

CL = 16.3pF

PSRR-

PSRR+

V+, V- = ±2.5V

RL = 1k

AV = +1

VSOURCE = 1VP-P

CL = 16.3pF

-120

-100

-80

-60

-40

-20

PSRR (dB)

100 1k 10k 100k 1M 10M

FREQUENCY (Hz)

10 10

100

1 10 100 1k 10k 100k

FREQUENCY (Hz)

INPUT VOLTAGE NOIS E (nV/√Hz)

V+ = 5V

RL = 1k

AV = +1

CL = 16.3pF

ISL28146, ISL28246

6FN6321.3

June 23, 2008

FIGURE 13. INPUT CURRENT NOISE DENSITY vs FREQUENCY FIGURE 14. INPUT VOLTAGE NOISE 0.1Hz to 10Hz

FIGURE 15. LARGE SIGNAL STEP RESPONSE FIGURE 16. SMALL SIGNAL STEP RESPONSE

FIGURE 17. ENABLE TO OUTPUT RESPONSE FIGURE 18. INPUT OFFSET VOL T AGE vs COMMON-MODE

INPUT VOLTAGE

Typical Performance Curves V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open (Continued)

0.1

1 10 100 1k 10k 100k

FREQUENCY (Hz)

INPUT CURRENT NOISE (pA/√Hz)

V+ = 5V

RL = 1k

AV = +1

CL = 16.3pF

-0.5

-0.4

-0.3

-0.2

-0.1

0.1

0.2

0.3

0.4

0.5

012345678910

TIME (s)

INPUT NOISE (µV)

V+ = 5V

RL = 10k

Rg = 10, Rf = 100k

AV = 10000

CL = 16.3pF

-1.5

-1.0

-0.5

0.5

1.0

1.5

012345678910

TIME (µs)

LARGE SIGNAL (V)

V+, V- = ±2.5V

RL = 1k

Rg = Rf = 10k

AV = 2

CL = 16.3pF

VOUT = 1.5VP-P

0.012

0.014

0.016

0.018

0.020

0.022

0.024

0.026

0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0

TIME (µs)

SMALL SIGNAL (V)

V+, V- = ±2.5V

RL = 1k

Rg = Rf = 10k

AV = 2

CL = 16.3pF

VOUT = 10mVP-P

-1

0 102030405060708090100

TIME (µs)

V-ENABLE (V)

-0.1

0.1

0.3

0.5

0.7

0.9

1.1

1.3

OUTPUT (V)

V+ = 5V

Rg = Rf = RL = 1k

AV = +2

VOUT = 1VP-P

CL = 16.3pF

V-ENABLE V-OUT

-100

-80

-60

-40

-20

100

-10123456

VCM (V)

VOS (µV)

V+ = 5V

RL = OPEN

AV = +1000

Rf = 100k, Rg = 100

ISL28146, ISL28246

7FN6321.3

June 23, 2008

FIGURE 19. INPUT OFFSET CURRENT vs COMMON-MODE INPUT VOLTAGE

FIGURE 20. SUPPL Y CURRENT ENABLED vs

TEMPERATURE, V+, V- = ±2.5V FIGURE 21. SUPPLY CURRENT DISABLED vs

TEMPERATURE, V+, V- = ±2.5V

FIGURE 22. VOS (SOT PKG) vs TEMPERATURE, V+, V - = ±2.5V FIGURE 23. VOS (SOT PKG) vs TEMPERATURE, V+, V- = ±1.2V

Typical Performance Curves V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open (Continued)

-100

-80

-60

-40

-20

100

-10123456

VCM (V)

I-BIAS (nA)

V+ = 5V

RL = OPEN

AV = +1000

Rf = 100k, Rg = 100

600

700

800

900

1000

1100

1200

-40-200 20406080100120

TEMPERATURE (°C)

CURRENT (µA)

MIN

MEDIAN

MAX

N = 1150

-40 -20 0 20 40 60 80 100 120

TEMPERATURE (° C)

CURRENT (µA)

MIN

MEDIAN

MAX

N = 1150

-850

-650

-450

-250

-50

150

350

550

750

-40 -20 0 20 40 60 80 100 120

TEMPERATURE (°C)

VOS (µV)

MIN

MEDIAN

MAX

N = 1150 -650

-450

-250

-50

150

350

550

750

-40 -20 0 20 40 60 80 100 120

TEMPERATURE (°C)

MIN

MAX

N = 1150

VOS (µV)

MEDIAN

ISL28146, ISL28246

8FN6321.3

June 23, 2008

FIGURE 24. IBIAS+ vs TEMPERATURE, V+, V- = ±2.5V FIGURE 25. IBIAS- vs TEMPERATURE, V+, V- = ±2.5V

FIGURE 26. IBIAS+ vs TEMPERATURE, V+, V- = ±1.2V FIGURE 27. IBIAS- vs TEMPERATURE, V+, V- = ±1.2V

FIGURE 28. IOS vs TEMPERATURE V+, V- = ±2.5V FIGURE 29. IOS vs TEMPERATURE V+, V- = ±1.2V

Typical Performance Curves V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open (Continued)

-10

-5

-40 -20 0 20 40 60 80 100 120

TEMPERATURE (°C)

IBIAS+ (nA)

MIN

MEDIAN

MAX

N = 1150 -10

-5

-40 -20 0 20 40 60 80 100 120

TEMPERATURE (°C)

IBIAS- (nA)

MIN

MEDIAN

MAX

N = 1150

-25

-20

-15

-10

-5

-40 -20 0 20 40 60 80 100 120

TEMPERATURE (°C)

IBIAS+ (nA)

MIN

MEDIAN

MAX

N = 1150 -25

-20

-15

-10

-5

-40 -20 0 20 40 60 80 100 120

TEMPERATURE (°C)

MIN

MEDIAN

MAX

N = 1150

IBIAS- (nA)

-8

-6

-4

-2

-40 -20 0 20 40 60 80 100 120

TEMPERATURE (°C)

IOS (nA)

MIN

MEDIAN

MAX

N = 1150 -8

-6

-4

-2

-40 -20 0 20 40 60 80 100 120

TEMPERATURE (°C)

IOS (nA)

MIN

MEDIAN

MAX

N = 1150

ISL28146, ISL28246

9FN6321.3

June 23, 2008

FIGURE 30. CMRR vs TEMPERA TURE VCM = +2.5V T O -2.5V,

V+, V- = ±2.5V FIGURE 31. PSRR vs TEMPERA TURE V+, V - = ±1.2V T O ±2.75V

FIGURE 32. A VOL vs TEMPERATURE V+, V- = ±2.5V,

VO = +2V, RL= 100k

FIGURE 33. AVOL vs TEMPERATURE V+, V- = ±2.5V,

VO = +2V, RL = 1k

FIGURE 34. VOUT HIGH vs TEMPERATURE V+, V- = ±2.5V,

RL = 1k FIGURE 35. VOUT LOW vs TEMPERATURE V+, V- = ±2.5V,

RL = 1k

Typical Performance Curves V+ = 5V, V- = 0V, VCM = 2.5V, RL = Open (Continued)

100

105

110

115

120

125

130

135

140

-40 -20 0 20 40 60 80 100 120

TEMPERATURE (°C)

CMRR (dB)

MIN

MEDIAN

MAX

N = 1150 90

100

105

110

115

120

-40-200 20406080100120

TEMPERATURE (°C)

PSRR (dB)

MIN

MEDIAN

MAX

N = 1150

500

1000

1500

2000

2500

3000

3500

4000

4500

-40 -20 0 20 40 60 80 100 120

TEMPERATURE (°C)

AVOL (V/mV)

MIN

MAX

N = 1150

MEDIAN

100

120

140

160

180

200

-40 -20 0 20 40 60 80 100 120

TEMPERATURE (°C)

AVOL (V/mV)

MIN

MEDIAN

MAX

N = 1150

4.930

4.935

4.940

4.945

4.950

4.955

4.960

-40-200 20406080100120

TEMPERATURE (°C)

VOUT (V)

MIN

MEDIAN

MAX

N = 1150 45

-40 -20 0 20 40 60 80 100 120

TEMPERATURE (°C)

MIN

MAX

N = 1150

VOUT (mV)

MEDIAN

ISL28146, ISL28246

10 FN6321.3

June 23, 2008

Pin Descriptions

ISL28146

(6 Ld SOT-23)

ISL28246

(8 Ld SOIC)

(8 Ld MSOP) PIN NAME FU NCTION EQUIVALENT CIRCUIT

42 (A)

6 (B)

IN-

IN-_A

IN-_B

Inverting input

Circuit 1

33 (A)

5 (B)

IN+

IN+_A

IN-+_B

Non-inverting input See Circuit 1

2 4 V- Negative supply

Circuit 2

11 (A)

7 (B)

OUT

OUT_A

OUT_B

Output

Circuit 3

6 8 V+ Positive supply See Circuit 2

5ENChip enable

Circuit 3

IN+IN-

V+

V-

V+

V-

CAPACITIVELY

COUPLED

ESD CLAMP

V+

V-

OUT

LOGIC

V+

V-

ISL28146, ISL28246

11 FN6321.3

June 23, 2008

Applications Information

Introduction

The ISL28146 and ISL28246 are single and dual channel

rail-to-rail input, output (RRIO) micropower precision

operational amplifiers. The parts are designed to operate

from single supply (2.4V to 5.0V) or dual supply (±1.2V to

±2.75V). The parts have an input common mode range that

extends 0.25V above the posit ive rail and down to the

negative supply rail. The output operation can swing within

about 3mV of the supply rails with a 100kΩ load.

Rail-to-Rail Input

Many rail-to-rail input stages use two differential input pairs,

a long-tail PNP (or PFET) and an NPN (or NFET). Severe

penalties have to be paid for this circuit topology. As the

input signal moves from one supply rail to another, the

operational amplifier switches from one input pair to the

other causing drastic changes in input offset voltage and an

undesired change in magnitude and polarity of input offset

current.

The ISL28146 and ISL28246 achieve input rail-to-rail

operation without sacrificin g important precision

specifications and degrading distortion performance. The

devices’ input offset voltage exhibits a smooth behavior

throughout the entire common-mode input range. The input

bias current versus the common-mode voltage range gives

an undistorted behavior from typically down to the negative

rail and up to 0.25V higher than the V+ rail.

Rail-to-Rail Output

A pair of complementary MOS devices are used to achieve

the rail-to-rail output swing. The NMOS sinks current to

swing the output in the negative direction. The PMOS

sources current to swing the output in the positive direction.

The ISL28146 and ISL28246 with a 100kΩ load will swing to

within 3mV of the positive supply rail and within 3mV of the

negative supply rail.

Results of Over-Driving the Outpu t

Caution should be used when over-driving the output for long

periods of time. Over-driving the output can occur in two ways:

1. The input voltage times the gain of the amplifier exceeds the

supply voltage by a large value.

2. The output current required is higher than the output stage

can deliver. These conditions can result in a shift in the Input

Offset V oltage (VOS) as much as 1µV/hr. of exposure under

these conditions.

IN+ and IN- Input Protection

All input terminals have internal ESD protection diod es to both

positive and negati ve supply rails, limitin g the input vol t age to

within one diode beyond the supply rail s. They also contain

back-to-back diodes across the inp ut termina ls (“Pin

Descriptions” on page 10 - Circuit 1). For applications where

the input diff erential volt age is exp ected to exceed 0.5V, an

external series resistor must be used to ensure the input

currents never exceed 5mA (Figure 36).

Enable/Disable Feature

The ISL28146 offers an EN pin that disables the device

when pulled up to at least 2.0V. In the disabled state (output

in a high impedance state), the part consumes typically 10µA

at room temperature. The EN pin has an interna l pu l l -do wn.

If left open, the EN pin will pull to the negative rail and the

device will be enabled by default. When not used, the EN pin

should either be left floating or connected directly to the -V

pin.

By disabling the part, multiple ISL28146 parts can be

connected together as a MUX. In this configuration, the

outputs are tied together in parallel and a channel can be

selected by the EN pin. The loading effects of the feedback

resistors of the disabled amplifie r must be considered when

multiple amplifier outputs are connected together. Note that

feed through from the IN+ to IN- pins occurs on any Mux

Amp disabled channel where the input differential voltage

exceeds 0.5V (e.g ., ac tive channel VOUT = 1V, while

disabled channel VIN = GND), so the mux implementation is

best suited for small signal applications. If large signals are

required, use series IN+ resistors, or a large value RF, to

keep the feed through current low enough to minimize the

impact on the active channel. See “Limitations of the

Differential Input Protection” on page 11.

Limitations of the Dif ferential Input Protection

If the input differential voltage is expected to exceed 0.5V, an

external current limiting resistor must be used to ensure the

input current never exceeds 5mA. For non-inverting unity gain

applications, the current limiting can be via a series IN+ resistor ,

or via a feedback resistor of appropriate value. For other gain

configurations, the series IN+ resistor is the best choice, unless

the feedback (RF) and gain setting (RG) resistors are both

sufficiently large to limit the input current to 5mA.

Large differential input voltages can arise from several

sources:

1. During open loop (comparator) operation. Used this way ,

the IN+ and IN- voltages don’t track, so differentials arise.

2. When the amplifier is disabled but an input signal is still

present. An RL or RG to GND keeps the IN- at GND, while

the varying IN+ signal creates a differential voltage. Mux

Amp applications are similar, except that the active

channel VOUT determines the voltage on the IN- terminal.

3. When the slew rate of the input pulse is considerably

faster than the op amp’s slew rate. If the VOUT can’t keep

FIGURE 36. INPUT CURRENT LIMITING

RIN RL

VIN VOUT

ISL28146, ISL28246

12 FN6321.3

June 23, 2008

up with the IN+ signal, a differential voltage results, and

visible distortion occurs on the input and output signals.

To avoid this issue, keep the input slew rate below

1.9V/µs, or use appropriate current limiting resistors.

Large (>2V) differential input voltages can also cause an

increase in disabled ICC.

Using Only One Channel

The ISL28246 is a dual op amp. If th e application only

requires one channel, the user must configure the unused

channel to prevent it from oscillating. The unused channel

will oscillate if the input and output pins are floating. This will

result in higher than expected supply currents and possible

noise injection into th e channel being used. The proper way

to prevent this oscillation is to short the output to the

negative input and ground the positive input (Figure 37).

Current Limiting

These devices have no internal current-limiting circuitry. If

the output is shorted, it is possible to exceed the Absolute

Maximum Rating for output current or power dissipation,

potentially resulting in the destructi on of the device.

Power Dissipation

It is possible to exceed the +125°C maximum junction

temperatures under certain load and power-supply

conditions. It is therefore important to calculate the

maximum junction temperature (TJMAX) for all applications

to determine if power supply voltages, load conditions, or

package type need to be modified to remain in the safe

operating area. These parameters are related using

Equation 1:

where:

•P

DMAXTOTAL is the sum of the maximu m power

dissipation of each amplifier in the package (PDMAX)

•PD

MAX for each amplifier can be calculated using

Equation 2:

where:

•T

MAX = Maximum ambient temperature

•θJA = Thermal resistance of the package

•PD

MAX = Maximum power dissipation of 1 amplifier

•V

S = Supply voltage (Magnitude of V + and V-)

•I

MAX = Maximum supply current of 1 amplifier

•V

OUTMAX = Maximum output voltage swing of the

application

RL = Load resistance

ECG/EEG AMPLIFIER APPLICATION CIRCUIT

ECG and EEG amplifiers must extract millivolt low frequency

AC signals from the skin of the patient while rejecting AC

common mode interference and static DC potentials created

at the electrode-to-skin interface. In Figure 38, the EL8171

Instrumentation amplifier (U1) and the ISL28146 (U2) form a

differential input, high impedance high pass patient lead

amplifier . U2, RF1 and CF1 form a low pass active feedback

amplifier. Inserting this amplifier in the feedback loop results

in a high pass frequency response in the forward direction.

The corner frequency is given by Equatio n 3:

Voltage dividers R1 through R2 and R3 through R4 set the

overall amplifier pass-band gain. Unwanted DC offsets

appearing at the patient leads are cancelled by U2 at U1A’s

inverting input. Resistor divider pair, R3 through R4 define

the maximum input DC level that is cancelled, and is given

by Equation 4:

In the passband range, U1B’s gain is +1 and the total signal

gain is defined by the divider ratios according to Equation 5:

The gain bandwidth product of the differential amplifier U1

determines the frequency response limit. Reference

amplifiers U3A and U3B form a DC feedback loop that

supplies a reference voltage drive to the patient to establish

a common mode DC reference for the differential amplifiers.

The voltage at the VCM sense electrode is maintained at the

reference voltage set by RF1-R F2 .

With the values shown in Figure 38, the performance

parameters ar e:

1. Supply Voltage range = +2.4V to +5.5V

2. Total supply current draw @ +5V = 1.3mA (typ)

3. Common-mode reference voltage (VCM) = V+/2

4. Max DC Input Offset Voltage = VCM ±0.18V to ±0.41V

5. Passband Gain = 425 V/V

6. Lower -3dB Freq uency = 0.05Hz

FIGURE 37. PREVENTING OSCILLA TIONS IN UNUSED

CHANNELS

TJMAX TMAX θJAxPDMAXTOTAL

()+= (EQ. 1)

PDMAX 2*VSISMAX VS

( - VOUTMAX)VOUTMAX

----------------------------

×+×=

(EQ. 2)

fHPF

3dB–

–1/[2*π*RF1*CF1=(EQ. 3)

VINDC V[R

+R3R4

+()⁄]=(EQ. 4)

VOUTU1Gain VOUT VIN

⁄R1R2

+()R2

⁄[]

∗R3R4

+()R4

⁄[]==

(EQ. 5)

ISL28146, ISL28246

13 FN6321.3

June 23, 2008

V+

500k

SENSE

FB- R1

10k

158

CF1

4.7µF

12.4k

2.21k

V+

0.082µF

EL8171

ISL28146

VOUT+

VOUT-

VIN+

REFERE NCE

TO OTHER

CHANNELS

V+

PROTECTION

CIRCUIT

0.01µF

SUPPLY

COMMON

+2.4 TO 5.5V

SUPPLY

V+

0.47µF 4.7µF

U3A 1/2

ISL28288

V+

U3B 1/2

ISL28288

1nF

CB 1nF

V+

RFB

10k

RFA

10k

RF1

680k

FIGURE 38. ECG/EEG AMPLIFIER

PATIENT

LEAD

CONNECTOR

VIN-

V+

10k

FB+

DRIVE

VDC

Offset

Signal

VDC

Offset

SignalSignal

PATIENT

ELECTRODE

PADS

VDC

Offset

Signal

VDC

Offset

SignalSignal

ISL28146, ISL28246

14 FN6321.3

June 23, 2008

ISL28146, ISL28246

SOT-23 Package Family

321

0.15 DC

2X 0.20 C

B0.20 MDC A-B

2 3

SEATING

PLANE

0.10 C

1 3

0.15 A-BC

(L1)

0.25

0° +3°

-0°

GAUGE

PLANE

MDP0038

SOT-23 PACKAGE FAMILY

SYMBOL

MILLIMETERS

TOLERANCESOT23-5 SOT23-6

A 1.45 1.45 MAX

A1 0.10 0.10 ±0.05

A2 1.14 1.14 ±0.15

b 0.40 0.40 ±0.05

c 0.14 0.14 ±0.06

D 2.90 2.90 Basic

E 2.80 2.80 Basic

E1 1.60 1.60 Basic

e 0.95 0.95 Basic

e1 1.90 1.90 Basic

L 0.45 0.45 ±0.10

L1 0.60 0.60 Reference

N 5 6 Reference

Rev. F 2/07

NOTES:

1. Plastic or metal protrusions of 0.25mm maximum per side are not

included.

2. Plastic interlead protrusions of 0.25mm maximum per side are not

included.

3. This dimension is measured at Datum Plane “H”.

4. Dimensioning and tolerancing per ASME Y14.5M-1994.

5. Index area - Pin #1 I.D. will be located within the indicated zone

(SOT23-6 only).

6. SOT23-5 version has no center lead (shown as a dashed line).

15 FN6321.3

June 23, 2008

ISL28146, ISL28246

Small Outline Package Family (SO)

GAUGE

PLANE

A1 L

DETAIL X 4° ±4°

SEATING

PLANE

0.010 BMCA

0.004 C

0.010 BMCA

(N/2)

NN (N/2)+1

PIN #1

I.D. MARK

h X 45°

SEE DETA IL “X”

0.010

MDP0027

SMALL OUTLINE PACKAGE FAMILY (SO)

SYMBOL

INCHES

TOLERANCE NOTESSO-8 SO-14

SO16

(0.150”)

SO16 (0.300”)

(SOL-16)

SO20

(SOL-20)

SO24

(SOL-24)

SO28

(SOL-28)

A 0.068 0.068 0.068 0.104 0.104 0.104 0.104 MAX -

A1 0.006 0.006 0.006 0.007 0.007 0.007 0.007 ±0.003 -

A2 0.057 0.057 0.057 0.092 0.092 0.092 0.092 ±0.002 -

b 0.017 0.017 0.017 0.017 0.017 0.017 0.017 ±0.003 -

c 0.009 0.009 0.009 0.011 0.011 0.011 0.011 ±0.001 -

D 0.193 0.341 0.390 0.406 0.504 0.606 0.704 ±0.004 1, 3

E 0.236 0.236 0.236 0.406 0.406 0.406 0.406 ±0.008 -

E1 0.154 0.154 0.154 0.295 0.295 0.295 0.295 ±0.004 2, 3

e 0.050 0.050 0.050 0.050 0.050 0.050 0.050 Basic -

L 0.025 0.025 0.025 0.030 0.030 0.030 0.030 ±0.009 -

L1 0.041 0.041 0.041 0.056 0.056 0.056 0.056 Basic -

h 0.013 0.013 0.013 0.020 0.020 0.020 0.020 Reference -

N 8 14 16 16 20 24 28 Reference -

Rev. M 2/07

NOTES:

1. Plastic or metal protrusions of 0.006” maximum per side are not included.

2. Plastic interlead protrusions of 0.010” maximum per side are not included.

3. Dimensions “D” and “E1” are measured at Datum Plane “H”.

4. Dimensioning and tolerancing per ASME Y14.5M-1994

All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.

Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality

Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without

notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and

reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result

from its use. No lice nse is gran t ed by i mpli catio n or other wise u nder an y p a tent or patent right s of Int ersi l or it s sub sidi aries.

For information regarding Intersil Corporation and its products, see www.intersil.com

FN6321.3

June 23, 2008

ISL28146, ISL28246

Mini SO Package Family (MSOP)

1(N/2)

(N/2)+1

PLANE

SEATING

N LEADS

0.10 C

PIN #1

I.D.

E1E

DETAIL X

3° ±3°

GAUGE

PLANE

SEE DETAIL "X"

0.25

A1 L

0.25 C A B

0.08 C A B

MDP0043

MINI SO PACKAGE FAMILY

SYMBOL

MILLIMETERS

TOLERANCE NOTESMSOP8 MSOP10

A1.101.10 Max. -

A1 0.10 0.10 ±0.05 -

A2 0.86 0.86 ±0.09 -

b 0.33 0.23 +0.07/-0.08 -

c0.180.18 ±0.05 -

D 3.00 3.00 ±0.10 1, 3

E4.904.90 ±0.15 -

E1 3.00 3.00 ±0.10 2, 3

e0.650.50 Basic -

L0.550.55 ±0.15 -

L1 0.95 0.95 Basic -

N 8 10 Reference -

Rev. D 2/07

NOTES:

1. Plastic or metal protrusions of 0.15mm maximum per side are not

included.

2. Plastic interlead protrusions of 0.25mm maximum per side are

not included.

3. Dimensions “D” and “E1” are measured at Datum Plane “H”.

4. Dimensioning and tolerancing per ASME Y14.5M-1994.