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25
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AF
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48
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N)
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S
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48V Input, 5V&3.3V Dual Output
48V Input, 5V&3.3V Dual Output
100W DC-DC Converter
100W DC-DC Converter
(Rev01)
-1-
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Introduction
Introduction
ALH25AF48(N) half-brick dual output products
provide two independent and fully regulated
positive outputs, the outputs are also separate-
ly trimmable. A remote on/off feature is includ-
ed as standard. ALH25AF48(N) dual output iso-
lated DC/DC converters are built using the
industry standard half-brick pin-out and pack-
age 61.0mm x 57.9mm x 12.7mm (2.4" x 2.28"
x 0.5"). Typical efficiencies are 88% for the
5V/3.3V outputs. The ALH25AF48(N) dual out-
put series are available with 2:1 input range of
36V-75V, and with output combination of
5V/3.3V at maximum current of 25 Amps and
output power is less than 100W. The maximum
current can be drawn from either output, or in
any combination, as long as the total output
current does not exceed 25 Amps and the out-
put power is 100W. The input-output isolation is
1500Vdc.
ALH25AF48(N) half-brick dual output products
are designed to meet CISPR22, EN55022, UL,
TUV, and CSA certifications.
Features
Features
1. Two independent positive outputs
2. Each output is separately trimmable
3. Remote control function
4. High efficiency
5. High power density
6. Low output noise
7. Open frame structure
8. Input undervoltage protection
9. Short circuit protection
10. Over current protection
11. Output overvoltage protection
12. Over-temperature protection
13. Wide operating board temperature:
-40°C ~ 110°C
14. No minimum load requirement
AA
AALL
LLHH
HH22
2255
55AA
AAFF
FF44
4488
88((
((NN
NN))
))
HH
HHAA
AALL
LLFF
FF-
-BB
BBRR
RRII
IICC
CCKK
KK
DD
DDUU
UUAA
AALL
LL
OO
OOUU
UUTT
TTPP
PPUU
UUTT
TT
SS
SSEE
EERR
RRII
IIEE
EESS
SS
33
3366
66VV
VVDD
DDCC
CC
TT
TTOO
OO
77
7755
55VV
VVDD
DDCC
CC
II
IINN
NNPP
PPUU
UUTT
TT,,
,,
11
1100
0000
00WW
WW
DD
DDCC
CC//
//DD
DDCC
CC
CC
CCOO
OONN
NNVV
VVEE
EERR
RRTT
TTEE
EERR
RR
-2-
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AA
AALL
LLHH
HH22
2255
55AA
AAFF
FF44
4488
88((
((NN
NN))
))
HH
HHAA
AALL
LLFF
FF-
-BB
BBRR
RRII
IICC
CCKK
KK
DD
DDUU
UUAA
AALL
LL
OO
OOUU
UUTT
TTPP
PPUU
UUTT
TT
SS
SSEE
EERR
RRII
IIEE
EESS
SS
33
3366
66VV
VVDD
DDCC
CC
TT
TTOO
OO
77
7755
55VV
VVDD
DDCC
CC
II
IINN
NNPP
PPUU
UUTT
TT,,
,,
11
1100
0000
00WW
WW
DD
DDCC
CC//
//DD
DDCC
CC
CC
CCOO
OONN
NNVV
VVEE
EERR
RRTT
TTEE
EERR
RR
-3-
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T
Typical Application
ypical Application
Block Diagram
Block Diagram
NOTE: CNT logic is optional. Positive Logic Control (for ALH25AF48): Low=Off, High=On.
Negative Logic Control (for ALH25AF48N): Low=On, High=Off.
Recommended External components:
Fuse : Recommended: 10A.
C1 : Recommended 100µF/100V (use two parallel if Ta< -5°C).
C3=C5* : Recommended electrolytic capacitor of 1000µF/10V(LOW ESR).
C2=C4 : Recommended metallitic film capacitor of 1µF/50V.
Note*: For C3 and C5, the minimum output capacitor is 470µF/10V.
If Ta< -5°C, the minimum external load capacitor is 440µF( 2X220µF tantalum capacitor parallel)
EMI
Filter OCP
PWM
+Vin
-Vin
CNT
To -Vin
Feed-
back
1
2
3
4
5
6
+Vo1
-Vo1
TRM1
PWM Error
AMP
8
7+Vo2
-Vo2
9TRM2
Model Numbering
Model Numbering
Ordering Information
Ordering Information
ALH25AF48(N)-7 48 5, 3.3 20, 25 100 86 88 Io1=20A, Io2=0A
85 87 Io1=10A, Io2=15A
80 82 Io1=0A, Io2=25A
ALH25AF48(N)-6 48 5, 3.3 20, 25 100 86 88 Io1=20A, Io2=0A
85 87 Io1=10A, Io2=15A
80 82 Io1=0A, Io2=25A
ALH25AF48(N) 48 5, 3.3 20, 25 100 86 88 Io1=20A, Io2=0A
85 87 Io1=10A, Io2=15A
80 82 Io1=0A, Io2=25A
Note:
*: Testing conditions are: Ta=25°C, wind velocity=300ft./min.
AA
AALL
LLHH
HH22
2255
55AA
AAFF
FF44
4488
88((
((NN
NN))
))
HH
HHAA
AALL
LLFF
FF-
-BB
BBRR
RRII
IICC
CCKK
KK
DD
DDUU
UUAA
AALL
LL
OO
OOUU
UUTT
TTPP
PPUU
UUTT
TT
SS
SSEE
EERR
RRII
IIEE
EESS
SS
33
3366
66VV
VVDD
DDCC
CC
TT
TTOO
OO
77
7755
55VV
VVDD
DDCC
CC
II
IINN
NNPP
PPUU
UUTT
TT,,
,,
11
1100
0000
00WW
WW
DD
DDCC
CC//
//DD
DDCC
CC
CC
CCOO
OONN
NNVV
VVEE
EERR
RRTT
TTEE
EERR
RR
-4-
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ALH 25 A F 48 N - 7
1234 5 7
Note:
1--- Product series name
2--- Output rated current
3--- First rated output voltag is 5V
4--- Second rated output voltage is 3.3V
5--- Input rated voltage is 48V
6--- CNT Optional Mark: N presents negative logic, default is positive logic
7--- Pin length
Default: 4.8mm ± 0.5mm ( 0.189in. ± 0.02in.)
7: 5.8mm ± 0.5mm ( 0.228in. ± 0.02in.)
6: 3.8mm ± 0.25mm ( 0.15in. ± 0.01in.)
8: 2.8mm ± 0.25mm ( 0.11in. ± 0.01in.)
6
Model Input Output Output Ripple & Noise Efficiency* notes and conditions
Number Voltage Voltage Current (mV pp) ( % )
( V ) ( V ) ( A )max max min typ
AA
AALL
LLHH
HH22
2255
55AA
AAFF
FF44
4488
88((
((NN
NN))
))
HH
HHAA
AALL
LLFF
FF-
-BB
BBRR
RRII
IICC
CCKK
KK
DD
DDUU
UUAA
AALL
LL
OO
OOUU
UUTT
TTPP
PPUU
UUTT
TT
SS
SSEE
EERR
RRII
IIEE
EESS
SS
33
3366
66VV
VVDD
DDCC
CC
TT
TTOO
OO
77
7755
55VV
VVDD
DDCC
CC
II
IINN
NNPP
PPUU
UUTT
TT,,
,,
11
1100
0000
00WW
WW
DD
DDCC
CC//
//DD
DDCC
CC
CC
CCOO
OONN
NNVV
VVEE
EERR
RRTT
TTEE
EERR
RR
-5-
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Absolute Maximum Rating
Absolute Maximum Rating
Input Voltage(continuous) -0.3 80 Vdc
Input Voltage(peak/surge) -0.3 100 Vdc 100ms non-repetitive
Board temperature -40 110 °C
storage temperature -55 125 °C
Input Characteristics
Input Characteristics
Input Voltage Range 36 48 75 Vdc
Input Reflected Current 12 25 mAp-p Vin=48V, Io1=10A, Io2=15A
T urn-of f Input Voltage 30 33 35 V
T urn-on Input Voltage 31 34.5 36 V
T urn On Time 6 20 ms
T urn On Delay 8 20 ms
CNT Function
CNT Function
Logic High 3 10 Vdc Logic optional.
Logic Low -0.7 1.2 Vdc
Control Current 2 mA
General Specifications
General Specifications
MTBF 1200 k Hrs 25°C (board)
Isolation 1500 Vdc
Pin solder temperature 260 °C wave solder < 15 s
Hand Soldering Time 5 s iron temperature 425°C
Weight 80 grams
Characteristic Min Typ Max Units Notes
Characteristic Min Typ Max Units Notes
Characteristic Min Typ Max Units Notes
Characteristic Min Typ Max Units Notes
AA
AALL
LLHH
HH22
2255
55AA
AAFF
FF44
4488
88((
((NN
NN))
))
HH
HHAA
AALL
LLFF
FF-
-BB
BBRR
RRII
IICC
CCKK
KK
DD
DDUU
UUAA
AALL
LL
OO
OOUU
UUTT
TTPP
PPUU
UUTT
TT
SS
SSEE
EERR
RRII
IIEE
EESS
SS
33
3366
66VV
VVDD
DDCC
CC
TT
TTOO
OO
77
7755
55VV
VVDD
DDCC
CC
II
IINN
NNPP
PPUU
UUTT
TT,,
,,
11
1100
0000
00WW
WW
DD
DDCC
CC//
//DD
DDCC
CC
CC
CCOO
OONN
NNVV
VVEE
EERR
RRTT
TTEE
EERR
RR
-6-
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ALH25AF48(N)
ALH25AF48(N) Output Characteristic
Output Characteristic
Power 100 W
Output Current 20/25 A
Output Setpoint Voltage 4.95 5 5.05 Vdc Vin=48V, Io1=10A, Io2=15A
3.25 3.3 3.35 Vdc Vin=48V, Io1=10A,Io2=15A
Line Regulation
Vo1 ±0.2 %Vo Vin=36~75V, Io1=10A, Io2=15A
Vo2 ±0.2 %Vo Vin=36~75V, Io1=10A, Io2=15A
Load Regulation
Vo1 ±0.5 %Vo Io1=0~20A, Io2=0A, Vin=48V
Vo2 ±0.5 %Vo Io1=0A, Io2=0~25A, Vin=48V
Dynamic Response
50%-75%-50% load 2 3 %Vo DI/Dt=1A/10µs
100 500 µs DI/Dt=1A/10µs
25%-50%-25% load 2 3 %Vo DI/Dt=1A/10µs
100 500 µs DI/Dt=1A/10µs
Current Limit Threshold 26 37.5 A Io1+Io2
Short Circuit Current 30 A(rms)
Efficiency 85 87 % Vin=48V, Io1=10A, Io2=15A
T rim Range 90 110 %Vo Both output
Over Voltage Protection V o1 5.7 7 V
Vo2 3.9 5 V
Temperature Regulation -0.03 0.03 %V o/°C
Ripple&Noise (mV pp) 100 mV ( 0-20MHz BW, Tboard=25°C )
Over Temperature Protection 111 125 °C
Switching Frequency 250 kHz
Characteristic Min Typ Max Units Notes
AA
AALL
LLHH
HH22
2255
55AA
AAFF
FF44
4488
88((
((NN
NN))
))
HH
HHAA
AALL
LLFF
FF-
-BB
BBRR
RRII
IICC
CCKK
KK
DD
DDUU
UUAA
AALL
LL
OO
OOUU
UUTT
TTPP
PPUU
UUTT
TT
SS
SSEE
EERR
RRII
IIEE
EESS
SS
33
3366
66VV
VVDD
DDCC
CC
TT
TTOO
OO
77
7755
55VV
VVDD
DDCC
CC
II
IINN
NNPP
PPUU
UUTT
TT,,
,,
11
1100
0000
00WW
WW
DD
DDCC
CC//
//DD
DDCC
CC
CC
CCOO
OONN
NNVV
VVEE
EERR
RRTT
TTEE
EERR
RR
-7-
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Characteristic Curves
Characteristic Curves
ALH25AF48N Typical Efficiency Vs Vin
Io2=1.5Io1 ALH25AF48N Typical Efficiency Vs Vin
Io2 decrease by 10%, Io1 increase by 10%
Io1(Io2=1.5Io1) (amps)
Efficiency(%)
12345678910
50
60
70
80
90
100
vin=75V
vin=48V
vin=36V
Io2(amps)
Efficiency(%)
25 20 15 10 5 0
82
84
86
88
90
92
Vin=75V
Vin=48V
Vin=36V
ALH25AF48N Typical Efficiency vs Vin
5V: load variable; 3.3V no load ALH25AF48N Typical Efficiency vs Vin
5V:no load; 3.3V load variable
Io1(amps)
2 6 10 14 18
50
60
70
80
90
100
Vin=36V
Vin=48V
Vin=75V
Efficiency(%)
Io2(amps)
15913172125
50
60
70
80
90
100
Vin=36V
Vin=48V
Vin=75V
Efficiency(%)
AA
AALL
LLHH
HH22
2255
55AA
AAFF
FF44
4488
88((
((NN
NN))
))
HH
HHAA
AALL
LLFF
FF-
-BB
BBRR
RRII
IICC
CCKK
KK
DD
DDUU
UUAA
AALL
LL
OO
OOUU
UUTT
TTPP
PPUU
UUTT
TT
SS
SSEE
EERR
RRII
IIEE
EESS
SS
33
3366
66VV
VVDD
DDCC
CC
TT
TTOO
OO
77
7755
55VV
VVDD
DDCC
CC
II
IINN
NNPP
PPUU
UUTT
TT,,
,,
11
1100
0000
00WW
WW
DD
DDCC
CC//
//DD
DDCC
CC
CC
CCOO
OONN
NNVV
VVEE
EERR
RRTT
TTEE
EERR
RR
-8-
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Characteristic Curves
Characteristic Curves (continued )
(continued )
ALH25AF48N Typical T ransient Response
25%- 50%- 25%(Io2) Ch1:Vo1 Ch2:Vo2 ALH25AF48N Typical T ransient Response
50%- 75%- 50%(Io2) Ch1:Vo1 Ch2:Vo2
ALH25AF48N Typical T ransient Response
25%- 50%- 25%(Io1) Ch1:Vo1 Ch2:Vo2 ALH25AF48N Typical T ransient Response
50%- 75%- 50%(Io1) Ch1:Vo1 Ch2:Vo2
Characteristic Curves
Characteristic Curves (continued )
(continued )
AA
AALL
LLHH
HH22
2255
55AA
AAFF
FF44
4488
88((
((NN
NN))
))
HH
HHAA
AALL
LLFF
FF-
-BB
BBRR
RRII
IICC
CCKK
KK
DD
DDUU
UUAA
AALL
LL
OO
OOUU
UUTT
TTPP
PPUU
UUTT
TT
SS
SSEE
EERR
RRII
IIEE
EESS
SS
33
3366
66VV
VVDD
DDCC
CC
TT
TTOO
OO
77
7755
55VV
VVDD
DDCC
CC
II
IINN
NNPP
PPUU
UUTT
TT,,
,,
11
1100
0000
00WW
WW
DD
DDCC
CC//
//DD
DDCC
CC
CC
CCOO
OONN
NNVV
VVEE
EERR
RRTT
TTEE
EERR
RR
-9-
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ALH25AF48N Typical Output Voltage Startup
From Power On (Ch1:Vo1 Ch2:Vo2 Ch3:Vin)
ALH25AF48N Typical Output Voltage Startup
From CNT On Ch1:Vo1 Ch2:Vo2 Ch3:CNT
ALH25AF48N Typical Output Voltage Startup
From Power Off Ch1:Vo1 Ch2:Vo2 Ch3:Vin
ALH25AF48N Typical Output Voltage Startup
From CNT Off Ch1:Vo1 Ch2:Vo2 Ch3:CNT
Characteristic Curves
Characteristic Curves (continued )
(continued )
AA
AALL
LLHH
HH22
2255
55AA
AAFF
FF44
4488
88((
((NN
NN))
))
HH
HHAA
AALL
LLFF
FF-
-BB
BBRR
RRII
IICC
CCKK
KK
DD
DDUU
UUAA
AALL
LL
OO
OOUU
UUTT
TTPP
PPUU
UUTT
TT
SS
SSEE
EERR
RRII
IIEE
EESS
SS
33
3366
66VV
VVDD
DDCC
CC
TT
TTOO
OO
77
7755
55VV
VVDD
DDCC
CC
II
IINN
NNPP
PPUU
UUTT
TT,,
,,
11
1100
0000
00WW
WW
DD
DDCC
CC//
//DD
DDCC
CC
CC
CCOO
OONN
NNVV
VVEE
EERR
RRTT
TTEE
EERR
RR
-10-
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ALH25AF48N Ripple&Noise Vin=75V Io1=10A
Io2=15A Ch1:Vo1 Ch2:Vo2
AA
AALL
LLHH
HH22
2255
55AA
AAFF
FF44
4488
88((
((NN
NN))
))
HH
HHAA
AALL
LLFF
FF-
-BB
BBRR
RRII
IICC
CCKK
KK
DD
DDUU
UUAA
AALL
LL
OO
OOUU
UUTT
TTPP
PPUU
UUTT
TT
SS
SSEE
EERR
RRII
IIEE
EESS
SS
33
3366
66VV
VVDD
DDCC
CC
TT
TTOO
OO
77
7755
55VV
VVDD
DDCC
CC
II
IINN
NNPP
PPUU
UUTT
TT,,
,,
11
1100
0000
00WW
WW
DD
DDCC
CC//
//DD
DDCC
CC
CC
CCOO
OONN
NNVV
VVEE
EERR
RRTT
TTEE
EERR
RR
-11-
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Pin Location
Pin Location
The +Vin and -Vin input connection pins are
located as shown in Figure 1. ALH25AF48(N)
converters have a 2:1 input voltage range and
48 Vin converters can accept 36-75 Vdc. Care
should be taken to avoid applying reverse
polarity to the input which can damage the con-
verter.
Input Characteristic
Input Characteristic
Fusing
Fusing
The ALH25AF48(N) power modules have no
internal fuse. An external fuse must always
be employed! To meet international safety
requirements, a 250 Volt rated fuse should be
used.
Standard safety agency regulations require
input fusing. Recommended fuse ratings for the
ALH25AF48(N) series are 10A.
Input Reverse V
Input Reverse Voltage Protection
oltage Protection
Under installation and cabling conditions where
reverse polarity across the input may occur,
reverse polarity protection is recommended.
Protection can easily be provided as shown in
Figure 2. In both cases the diode rating is
10A/100V. Placing the diode across the
inputs rather than in-line with the input
offers an advantage in that the diode only
conducts in a reverse polarity condition,
which increases circuit efficiency and ther-
mal performance.
Input Undervoltage Protection
Input Undervoltage Protection
The ALH25AF48(N) series are protected
against undervoltage on the input. If the input
voltage drops below the acceptable range, the
converter will shut down. It will automatically
restart when the undervoltage condition is
removed.
Input Filter
Input Filter
Input filters are included in the converters to
help achieve standard system emissions certifi-
cations. Some users however, may find that
additional input filtering is necessary. The
ALH25AF48(N) series have an internal switch-
ing frequency of 250 kHz, so a high frequency
capacitor mounted close to the input terminals
produces the best results. To reduce reflected
noise, a capacitor can be added across the
input as shown in Figure 3, forming a πfilter. A
100µF/100V electrolytic capacitor is recom-
mended for C1.
+Vin
CNT
-Vin
2.40
(60.96)
2.28
(57.91)
Trim1
-Vo1
+Vo1
Trim2
-Vo2
+Vo2
Fig.1 Pin Location (component-side view)
+Vin
-Vin
+Vin
-Vin
Fig.2 Reverse Polarity Protection Circuits
AA
AALL
LLHH
HH22
2255
55AA
AAFF
FF44
4488
88((
((NN
NN))
))
HH
HHAA
AALL
LLFF
FF-
-BB
BBRR
RRII
IICC
CCKK
KK
DD
DDUU
UUAA
AALL
LL
OO
OOUU
UUTT
TTPP
PPUU
UUTT
TT
SS
SSEE
EERR
RRII
IIEE
EESS
SS
33
3366
66VV
VVDD
DDCC
CC
TT
TTOO
OO
77
7755
55VV
VVDD
DDCC
CC
II
IINN
NNPP
PPUU
UUTT
TT,,
,,
11
1100
0000
00WW
WW
DD
DDCC
CC//
//DD
DDCC
CC
CC
CCOO
OONN
NNVV
VVEE
EERR
RRTT
TTEE
EERR
RR
-12-
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For conditions where EMI is a concern, a differ-
ent input filter can be used. Figure 4 shows an
input filter designed to reduce EMI effects. C1is
a 100µF/100V electrolytic capacitor, and C2is a
0.68µF/100V metal film or ceramic high fre-
quency capacitor. Cy1, Cy2, Cy3 and Cy4 are
each 0.033µF/630V high frequency ceramic
capacitors. Cy5, Cy6, Cy7 and Cy8 are each
4700pF/1000V high frequency ceramic capaci-
tors. L1 is a 1.8mH common mode choke.
Co is the output capacitor, it can refer to the
output capacitor of C3and C5 in T
Typical
ypical
Application
Application on page 3.
When a filter inductor is connected in series
with the power converter input, an input capac-
itor C1should be added. An input capacitor C1
should also be used when the input wiring is
long, since the wiring can act as an inductor.
Failure to use an input capacitor under these
conditions can produce large input voltage
spikes and an unstable output.
CNT Function
CNT Function
The ALH25AF48(N) series provide a control
function allowing the user to turn the output on
and off using an external circuit. ALH25AF48
series are the positive logic control and
ALH25AF48N series are the negative logic con-
trol.
For ALH25AF48 series applying a voltage less
than 1.2V to the CNT pin will disable the output,
and applying a voltage greater than 3V will
enable it. For ALH25AF48N series applying a
voltage less than 1.2V to the CNT pin will
enable the output, and applying a voltage
greater than 3V will disable it,
If the remote on/off function is not used:
Leave CNT pin open for positive logic.
Connect CNT pin to ground for negative
logic.
The maximum voltage that can be applied to
the CNT pin is 10V.
-Vo1
+V
o1
C1
C2
Cy1
Cy2
L1
Cy3
Cy4
-Vo2
+Vo2
Cy5
Cy6
Cy7
Cy8
+Vin
-Vin
Co
Co
+
+
Fig.4 EMI Reduction Input Filter
-Vin
CNT
-Vin
CNT
-Vin
CNT
-Vin
CNT
Fig.8 Relay Control
Fig.5 Simple Control
Fig.6 Transistor Control
Fig.7 Isolated Control
+Vin
-Vin
C1
Fig.3 Ripple Rejection Input Filter
AA
AALL
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HH22
2255
55AA
AAFF
FF44
4488
88((
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))
HH
HHAA
AALL
LLFF
FF-
-BB
BBRR
RRII
IICC
CCKK
KK
DD
DDUU
UUAA
AALL
LL
OO
OOUU
UUTT
TTPP
PPUU
UUTT
TT
SS
SSEE
EERR
RRII
IIEE
EESS
SS
33
3366
66VV
VVDD
DDCC
CC
TT
TTOO
OO
77
7755
55VV
VVDD
DDCC
CC
II
IINN
NNPP
PPUU
UUTT
TT,,
,,
11
1100
0000
00WW
WW
DD
DDCC
CC//
//DD
DDCC
CC
CC
CCOO
OONN
NNVV
VVEE
EERR
RRTT
TTEE
EERR
RR
-13-
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Input-Output
Input-Output
Characteristic
Characteristic
Safety Consideration
Safety Consideration
For safety-agency approval of the system in
which the power module is used, the power
module must be installed in compliance with the
spacing and separation requirements of the
end-use safety agency standard, i.e., UL1950,
CSA C22.2 No. 950-95, and EN60950. The
input-to-output 1500VDC isolation is an opera-
tional insulation. The DC/DC power module
should be installed in end-use equipment, in
compliance with the requirements of the ulti-
mate application, and is intended to be supplied
by an isolated secondary circuit. When the sup-
ply to the DC/DC power module meets all the
requirements for SELV(<60Vdc), the output is
considered to remain within SELV limits (level
3). If connected to a 60Vdc power system, dou-
ble or reinforced insulation must be provided in
the power supply that isolates the input from
any hazardous voltages, including the ac
mains. One Vi pin and one Vo pin are to be
grounded or both the input and output pins are
to be kept floating. Single fault testing in the
power supply must be performed in combina-
tion with the DC/DC power module to demon-
strate that the output meets the requirement for
SELV. The input pins of the module are not
operator accessible.
Note: Do not ground either of the input pins of
the module, without grounding one of the output
pins. This may allow a non-SELV voltage to
appear between the output pin and ground.
Output
Output
Characteristic
Characteristic
Minimum Load Requirement
Minimum Load Requirement
There is no minimum load requirement for
ALH25AF48(N) series.
Output Over-V
Output Over-Voltage Protection
oltage Protection
The over-voltage protection has a separate
feedback loop which activates when the output
voltage Vo1 is between 5.7~7V, and Vo2 is
between 3.9~5V.
Output T
Output Trimming
rimming
Users can increase or decrease the output volt-
age by adding an external resistor between the
TRIM pin and either the Vo (+ ) or Vo ( - ) pins.
The trim resistor should be positioned close to
the module. If the trim feature is not used,
leave the TRIM pin open.
Trimming up by more than 10% of the nominal
output may damage the converter. Trimming
down more than 10% can cause the converter
to regulate improperly. Trim down and trim up
circuits and equations are shown in following
Figures (on the next two page).
Note that at elevated output voltages the
maximum power rating of the module
remains the same, and the output current
capability will decrease correspondingly.
AA
AALL
LLHH
HH22
2255
55AA
AAFF
FF44
4488
88((
((NN
NN))
))
HH
HHAA
AALL
LLFF
FF-
-BB
BBRR
RRII
IICC
CCKK
KK
DD
DDUU
UUAA
AALL
LL
OO
OOUU
UUTT
TTPP
PPUU
UUTT
TT
SS
SSEE
EERR
RRII
IIEE
EESS
SS
33
3366
66VV
VVDD
DDCC
CC
TT
TTOO
OO
77
7755
55VV
VVDD
DDCC
CC
II
IINN
NNPP
PPUU
UUTT
TT,,
,,
11
1100
0000
00WW
WW
DD
DDCC
CC//
//DD
DDCC
CC
CC
CCOO
OONN
NNVV
VVEE
EERR
RRTT
TTEE
EERR
RR
-14-
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Where Vo is the output voltage after trim-up. 
Ru1 is in kΩ.
Ru1 =
16 - 2.7Vo
Vo - 5
Load
Ru1
-Vin
CNT
+Vin Trim1
Trim2
Vo1-
Vo1+
Vo2+
Vo2-
Fig.9 Output Voltage Vo1 Trim-up
Adjustment Resistor Value (kΩ)
Output Voltage Trim-up ( volts )
5
5.05
5.1
5.15
5.2
5.25
5.3
5.35
5.4
5.45
5.5
01020304050
3.3V Out: Ru2=
( 5.825 - Vo ) x 0.33
Vo - 3.3
Load
Ru2
-Vin
CNT
+Vin Trim1
Trim2
Vo1-
Vo1+
Vo2+
Vo2-
Where Vo is the output voltage after trim-down. 
Ru2 is in kΩ.
Fig.11 Output Voltage Vo2 Trim-up
Adjustment Resistor Value (kΩ)
Output Voltage Trim-up ( volts )
3.333
3.366
3.399
3.432
3.465
3.498
3.531
3.564
3.597
3.63
0 3 6 9 12 15 18 21 24 27
Fig.12 Typical Trim-up Curves for
ALH25AF48(N) Series 3.3V Output
Fig.10 Typical Trim-up Curves for
ALH25AF48(N) Series 5V Output
pin-side view
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AA
AALL
LLHH
HH22
2255
55AA
AAFF
FF44
4488
88((
((NN
NN))
))
HH
HHAA
AALL
LLFF
FF-
-BB
BBRR
RRII
IICC
CCKK
KK
DD
DDUU
UUAA
AALL
LL
OO
OOUU
UUTT
TTPP
PPUU
UUTT
TT
SS
SSEE
EERR
RRII
IIEE
EESS
SS
33
3366
66VV
VVDD
DDCC
CC
TT
TTOO
OO
77
7755
55VV
VVDD
DDCC
CC
II
IINN
NNPP
PPUU
UUTT
TT,,
,,
11
1100
0000
00WW
WW
DD
DDCC
CC//
//DD
DDCC
CC
CC
CCOO
OONN
NNVV
VVEE
EERR
RRTT
TTEE
EERR
RR
-15-
Load
R
d1
-Vin
CNT
+Vin Trim1
Trim2
Vo1-
Vo1+
Vo2+
Vo2-
Where Vo is the output voltage after trim-down. 
Rd1 is in kΩ.
Rd1 =
3.7Vo - 16
5 -Vo
Fig.13 Output Voltage Vo1 Trim-down
Adjustment Resistor Value (kΩ)
Output Voltage Trim-down ( volts )
4.5
4.55
4.6
4.65
4.7
4.75
4.8
4.85
4.9
4.95
5
0 1020304050
Load
Rd2
-Vin
CNT
+Vin Trim1
Trim2
Vo1-
Vo1+
Vo2+
Vo2-
Where Vo is the output voltage after trim-down.
Rd2 is in kΩ.
Rd2 =
( Vo - 2.89 ) x 0.66
3.3 - Vo
Fig.15 Output Voltage Vo2 Trim-down
Adjustment Resistor Value (kΩ)
Output Voltage Trim-down ( volts )
2.97
3.003
3.036
3.069
3.102
3.135
3.168
3.201
3.234
3.267
3.3
012345678
Fig.14 Typical Trim-down Curves for
ALH25AF48(N) Series 5V Output Fig.16 Typical Trim-down Curves for
ALH25AF48(N) Series 3.3V Output
pin-side view
AA
AALL
LLHH
HH22
2255
55AA
AAFF
FF44
4488
88((
((NN
NN))
))
HH
HHAA
AALL
LLFF
FF-
-BB
BBRR
RRII
IICC
CCKK
KK
DD
DDUU
UUAA
AALL
LL
OO
OOUU
UUTT
TTPP
PPUU
UUTT
TT
SS
SSEE
EERR
RRII
IIEE
EESS
SS
33
3366
66VV
VVDD
DDCC
CC
TT
TTOO
OO
77
7755
55VV
VVDD
DDCC
CC
II
IINN
NNPP
PPUU
UUTT
TT,,
,,
11
1100
0000
00WW
WW
DD
DDCC
CC//
//DD
DDCC
CC
CC
CCOO
OONN
NNVV
VVEE
EERR
RRTT
TTEE
EERR
RR
-16-
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Output Over-Current Protection
Output Over-Current Protection
ALH25AF48(N) series half-brick dual output
products feature continuously current limiting
as part of their Overcurrent Protection (OCP)
circuits. When Io1+Io2 exceeds 26A, such as
during a short circuit condition, the module will
be in hiccup protection.
Output Filters
Output Filters
When the load is sensitive to ripple and noise,
an output filter can be added to minimize the
effects. A simple output filter to reduce output
ripple and noise can be made by connecting a
capacitor across the output as shown in Figure
17. The recommended value for the output
capacitor C1 is 1000µF/10V(LOW ESR).
Extra care should be taken when long leads or
traces are used to provide power to the load.
Long lead lengths increase the chance for
noise to appear on the lines. Under these con-
ditions C2 can be added across the load as
shown in Figure 18. The recommended compo-
nent for C2 is 1000µF/10V(LOW ESR) capaci-
tor and connecting a 0.1µF ceramic capacitor
C1 in parallel generally.
Decoupling
Decoupling
Noise on the power distribution system is not
always created by the converter. High speed
analog or digital loads with dynamic power
demands can cause noise to cross the power
inductor back onto the input lines. Noise can be
reduced by decoupling the load. In most cases,
connecting a 10 µF tantalum capacitor in paral-
lel with a 0.1µF ceramic capacitor across the
load will decouple it. The capacitors should be
connected as close to the load as possible.
Ground Loops
Ground Loops
Ground loops occur when different circuits are
given multiple paths to common or earth
ground, as shown in Figure 19. Multiple ground
points can slightly different potential and cause
current flow through the circuit from one point to
another. This can result in additional noise in all
the circuits. To eliminate the problem, circuits
should be designed with a single ground con-
nection as shown in Figure 20.
Parallel Power Distribution
Parallel Power Distribution
Figure 21. shows a typical parallel power distri-
bution design. Such designs, sometimes called
daisy chains, can be used for very low output
currents, but are not normally recommended.
The voltage across loads far from the source
+Vout
-Vout
Load
C1C2
Fig.18 Output Ripple Filter For a Distant
Load
+Vout
-Vout
Load
C1
Fig.17 Output Ripple Filter
+Vout
-Vout
Load Load
RLine
RLine RLine
RLine
RLine
+Vout
-Vout
Load Load
RLine
RLine RLine
RLine
RLine
RLine
Ground
Loop
Fig.19 Ground Loops
Fig.20 Single Point Ground
AA
AALL
LLHH
HH22
2255
55AA
AAFF
FF44
4488
88((
((NN
NN))
))
HH
HHAA
AALL
LLFF
FF-
-BB
BBRR
RRII
IICC
CCKK
KK
DD
DDUU
UUAA
AALL
LL
OO
OOUU
UUTT
TTPP
PPUU
UUTT
TT
SS
SSEE
EERR
RRII
IIEE
EESS
SS
33
3366
66VV
VVDD
DDCC
CC
TT
TTOO
OO
77
7755
55VV
VVDD
DDCC
CC
II
IINN
NNPP
PPUU
UUTT
TT,,
,,
11
1100
0000
00WW
WW
DD
DDCC
CC//
//DD
DDCC
CC
CC
CCOO
OONN
NNVV
VVEE
EERR
RRTT
TTEE
EERR
RR
-17-
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can vary greatly depending on the IR drops
along the leads and changes in the loads clos-
er to the source. Dynamic load conditions
increase the potential problems.
Radial Power Distribution
Radial Power Distribution
Radial power distribution is the preferred
method of providing power to the load. Figure
22 shows how individual loads are connected
directly to the power source. This arrangement
requires additional power leads, but it avoids
the voltage variation problems associated with
the parallel power distribution technique.
Mixed Distribution
Mixed Distribution
In the real world a combination of parallel and
radial power distribution is often used. Dynamic
and high current loads are connected using a
radial design, while static and low current loads
can be connected in parallel. This combined
approach minimizes the drawbacks of a parallel
design when a purely radial design is not feasi-
ble.
Thermal Management
Thermal Management
T
Technologies
echnologies
The ALH25AF48(N) series feature high effi-
ciency, the 5V/3.3 V output units have typical
efficiency of 87% at full load. With less heat dis-
sipation and temperature-resistant components
such as ceramic capacitors, these modules
exhibit good behavior during prolonged expo-
sure to high temperatures. Maintaining the
operating board temperature (Tc) within the
specified range help keep internal-component
temperatures within their specifications which
in turn help keep MTBF from falling below the
specified rating. Proper cooling of the power
modules is also necessary for reliable and con-
sistent operation.
Basic Thermal Management
Basic Thermal Management
Measuring the board temperature of the mod-
ule (Tc) as the method shown in Figure 24 can
verify the proper cooling. Figure 24 shows the
board surface of the module and the pin loca-
tions. The module should work under 90°C for
the reliability of operation and TCmust not
exceed 110 °C while operating in the final sys-
tem configuration. The measurement can be
made with a surface probe after the module has
Load 1 Load 2 Load 3
+Vout
-Vout
RL1 RL2
RL3
RG1 RG2
RG3
RL = Lead Resistance
RG = Ground Lead Resistance
Load 4
RL4
RG4
Fig.23 Mixed Power Distribution
Load 1 Load 2 Load 3
+Vout
-Vout
RL1 RL2
RL3
RG1 RG2
RG3
RL = Lead Resistance
RG = Ground Lead Resistance
Fig.22 Radial Power Distribution
Load 1 Load 2 Load 3
+Vout
-Vout
RL1 RL2 RL3
RG1 RG2 RG3
I1 + I2 + I3I2 + I3I3
RL = Lead Resistance
RG = Ground Lead Resistance
Fig.21 Parallel Power Distribution
11.5 (0.45)
39.2 (1.54)
+Vin
CNT
-Vin
MEASURE CASE
TEMPERATURE HERE
Dimensions: millimeters (inches)
Trim1
-Vo1
+Vo1
Trim2
-Vo2
+Vo2
(Between MOSFET and 
thermal resistance)
Fig.24 Board Temperature Measurement
component-side view
AA
AALL
LLHH
HH22
2255
55AA
AAFF
FF44
4488
88((
((NN
NN))
))
HH
HHAA
AALL
LLFF
FF-
-BB
BBRR
RRII
IICC
CCKK
KK
DD
DDUU
UUAA
AALL
LL
OO
OOUU
UUTT
TTPP
PPUU
UUTT
TT
SS
SSEE
EERR
RRII
IIEE
EESS
SS
33
3366
66VV
VVDD
DDCC
CC
TT
TTOO
OO
77
7755
55VV
VVDD
DDCC
CC
II
IINN
NNPP
PPUU
UUTT
TT,,
,,
11
1100
0000
00WW
WW
DD
DDCC
CC//
//DD
DDCC
CC
CC
CCOO
OONN
NNVV
VVEE
EERR
RRTT
TTEE
EERR
RR
-18-
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reached thermal equilibrium.
It makes the assumption that the final system
configuration exists and can be used for a test
environment.
The following text and graphs show guidelines
to predict the thermal performance of the mod-
ule for typical configurations that in natural or
forced airflow environments. Note that Tc of
module must always be checked in the final
system configuration to verify proper opera-
tional due to the variation in test conditions.
Thermal management acts to transfer the heat
dissipated by the module to the surrounding
environment. The amount of power dissipated
by the module as heat (PD) is got by the equa-
tion below:
PD= PI -PO
where : PIis input power;
POis output power;
PD is dissipated power.
Also, module efficiency (η) is defined as the fol-
lowing equation:
ηη = PO / PI
If eliminating the input power term, from two
above equations can yield the equation below:
PD = PO( 1 - ηη) /ηη
The module power dissipation then can be cal-
culated through the equation.
Because each power module output voltage
has a different power dissipation curve, a plot of
power dissipation versus output current over
three different line voltages is given in each
module-specific data sheet. The typical power
dissipation curves of ALH25AF48N series are
shown as figure 25 to figure 28.
12345678910
Io1(Io2=1.5Io1)(amps)
4
6
8
10
12
14
16
Power Dissipation(W)
Vin=36V
Vin=48V
Vin=75V
Fig.25 ALH25AF48N Power Dissipation
Curves, Io2=1.5Io1
2522.5 2017.5 1512.5 10 7.5 52.5 0
Io2(amps)
10
11
12
13
14
15
16
17
18
Power Dissipation(W)
Vin=36V
Vin=48V
Vin=75V
Fig.26 ALH25AF48N Power Dissipation
Curves, 5V:10%increase, 3.3V:10%decrease
246810 12 14 16 18 20
Io1(amps)
4
6
8
10
12
14
16
Power Disspation
Vin=36V
Vin=48V
Vin=75V
Fig.27 ALH25AF48N Power Dissipation
Curves, 5V:load variable, 3.3V:no load
AA
AALL
LLHH
HH22
2255
55AA
AAFF
FF44
4488
88((
((NN
NN))
))
HH
HHAA
AALL
LLFF
FF-
-BB
BBRR
RRII
IICC
CCKK
KK
DD
DDUU
UUAA
AALL
LL
OO
OOUU
UUTT
TTPP
PPUU
UUTT
TT
SS
SSEE
EERR
RRII
IIEE
EESS
SS
33
3366
66VV
VVDD
DDCC
CC
TT
TTOO
OO
77
7755
55VV
VVDD
DDCC
CC
II
IINN
NNPP
PPUU
UUTT
TT,,
,,
11
1100
0000
00WW
WW
DD
DDCC
CC//
//DD
DDCC
CC
CC
CCOO
OONN
NNVV
VVEE
EERR
RRTT
TTEE
EERR
RR
-19-
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Module Derating
Module Derating
Experiment Setup
Experiment Setup
From the experimental set up shown in figure
29, the derating curves as figure 30 can be
drawn. Note that the PWB ( printed-wiring
board ) and the module must be mounted verti-
cally. The passage has a rectangular cross-
section. The clearance between the facing
PWB and the top of the module is kept 13 mm
(0.5 in.) constantly.
Convection W
Convection Without Heat Sinks
ithout Heat Sinks
Heat transfer can be enhanced by increasing
the airflow over the module. Figure 30 shows
the maximum power that can be dissipated by
the module.
In the test, natural convection airflow was mea-
sured at 0.1 m/s (20 ft./min.). The 0.5 m/s to 2.0
m/s (100 ft./min. to 400 ft./min.) curves are test-
ed with externally adjustable fans. The appro-
priate airflow for a given operating condition
can be determined through figure 30.
Fig.30 Forced Convection Power Derating
246810 12 14 16 18 20 22 24 25
Io2(amps)
0
5
10
15
20
25
Power Disspation
Vin=36V
Vin=48V
Vin=75V
Fig.28 ALH25AF48N Power Dissipation
Curves, 5V:no load, 3.3V:load variable
Dimensions: millimeters (inches).
facing PWB
PWB
Module
50.8(2.0)
Air velocity and
Ambient Temperature
Testing Point
Air flow
13(0.5)
Fig.29 Experiment Set Up
0 20 40 60 80 100 120
Ambient Air Temperature(
o
C
)
0
5
10
15
20
Power Dissipation(W)
0.1m/s
0.5m/s
1m/s
2m/s
0 20 40 60 80 100 120
Ambient Air Temperature(
o
C
)
0
20
40
60
80
100
Output Power(W)
0.1m/s
0.5m/s
1m/s
2m/s
ALH25AF48N
DERATING CURVES (Pd-Ta)
ALH25AF48N
DERATING CURVES (Po -Ta)
Testing condition: Io2=1.5Io1
The condition can be determined from the efficiency curves.
ALH25AF48N derating curves (Pd-Ta)
ALH25AF48N derating curves (Po-Ta)
AA
AALL
LLHH
HH22
2255
55AA
AAFF
FF44
4488
88((
((NN
NN))
))
HH
HHAA
AALL
LLFF
FF-
-BB
BBRR
RRII
IICC
CCKK
KK
DD
DDUU
UUAA
AALL
LL
OO
OOUU
UUTT
TTPP
PPUU
UUTT
TT
SS
SSEE
EERR
RRII
IIEE
EESS
SS
33
3366
66VV
VVDD
DDCC
CC
TT
TTOO
OO
77
7755
55VV
VVDD
DDCC
CC
II
IINN
NNPP
PPUU
UUTT
TT,,
,,
11
1100
0000
00WW
WW
DD
DDCC
CC//
//DD
DDCC
CC
CC
CCOO
OONN
NNVV
VVEE
EERR
RRTT
TTEE
EERR
RR
-20-
USA Europe Asia
TEL: 1-760-930-4600 44-(0)1384-842-211 852-2437-9662
FAX: 1-760-930-0698 44-(0)1384-843-355 852-2402-4426 www.astec.com
Mechanical
Mechanical
Considerations
Considerations
Installation
Installation
Although ALH25AF48(N) series converters can
be mounted in any orientation, free air-flowing
must be taken. Normally power components
are always put at the end of the airflow path or
have the separate airflow paths. This can keep
other system equipment cooler and increase
component life spans.
Soldering
Soldering
ALH25AF48(N) converters are compatible with
standard wave soldering techniques. When
wave soldering, the converters pins should be
preheated for 20-30 seconds at 110°C, and
wave soldered at 260°C for less than 15 sec-
onds.
When hand soldering, the iron temperature
should be maintained at 450°C and applied to
the converter pins for less than 5 seconds.
Longer exposure can cause internal damage to
the converter. Cleaning can be performed with
cleaning solvent IPA or with water.
MTBF
MTBF
The MTBF, calculated in accordance with
Bellcore TR-NWT-000332 is 1,200,000 hours.
Obtaining this MTBF in practice is entirely pos-
sible. ASTEC can supply replacements for con-
verters from other manufacturers, or offer cus-
tom solutions.
Please contact the Company for details.
Note*: Pin length is optional.
Detailed information can refer to the Model Numbering
Model Numbering on page 4.
AA
AALL
LLHH
HH22
2255
55AA
AAFF
FF44
4488
88((
((NN
NN))
))
HH
HHAA
AALL
LLFF
FF-
-BB
BBRR
RRII
IICC
CCKK
KK
DD
DDUU
UUAA
AALL
LL
OO
OOUU
UUTT
TTPP
PPUU
UUTT
TT
SS
SSEE
EERR
RRII
IIEE
EESS
SS
33
3366
66VV
VVDD
DDCC
CC
TT
TTOO
OO
77
7755
55VV
VVDD
DDCC
CC
II
IINN
NNPP
PPUU
UUTT
TT,,
,,
11
1100
0000
00WW
WW
DD
DDCC
CC//
//DD
DDCC
CC
CC
CCOO
OONN
NNVV
VVEE
EERR
RRTT
TTEE
EERR
RR
-21-
USA Europe Asia
TEL: 1-760-930-4600 44-(0)1384-842-211 852-2437-9662
FAX: 1-760-930-0698 44-(0)1384-843-355 852-2402-4426 www.astec.com
Mechanical Chart
Mechanical Chart (pin-side view)
(pin-side view)
-Vin
CNT
+Vin
+Vo2
-Vo2
Trim2
25.4 (1.0)
4.8 (0.19) 48.26 (1.9)
10.16 (0.4)
10.16 (0.4)
7.62 (0.3)
57.9 (2.28)
61.0 (2.4)
mm (inches)
7.62 (0.3)
7.62 (0.3)
7.62 (0.3)
10.2 (0.4)
+Vo1
-Vo1
Trim1
12.70 (0.5)
12.7 (0.5)
5.8(0.23)*
5-
φ1.0 (0.04)
except Vo pins
only +Vo and -Vo pins
4-
φ1.5 (0.06)
Tolerances:
Inches Millimeters
.xx !0.020 .x !0.5
.xxx !0.010 .xx !0.25
Pins
>4mm !0.02inch ( !0.5mm)
<4mm !0.01inch ( !0.25mm)
PART NUMBER DESCRIPTION
ss pp
c
-0 iv L- xxx f yy h n -p-mx-Options
p = Pin Length
Omit this digit for Standard 5mm
6 = 3.8mm, 7= 5.8mm
iv = Input Voltage 8 = 2.8mm
05 = Range centered on 5V
12 = Range centered on 12V Enable Logic Polarity
24 = 18 to 36(2:1), 9 to 36V(4:1) Omit for Positive Enable Logic
36 = 20 to 60V N = Negative Enable
46 = 18V to 75V (4:1) Except: AK60C-20H, BK60C-30H
48 = Typ 36 to 75V Omit for Negative Logice
P = Positive Logic
c = Pinout compatability
A= Astec Footprint or "non Lucent" footprint H = High Efficiency (Synch rect.)
C= Ind Std, Exact Lucent drop in Omit H if Conventional Diode (low Eff)
yy = Output Current
pp = Package Type ie. 08 = 8 Amps
40 = 1" x 2" SMD
42 = 1.5" x 2" SMD f = # of Outputs
45 = 1.45" X 2.3" (1/4 Brk) F = Single Output
60 = 2.4" X 2.3" (1/2 Brk) D = Dual Output
80 = Full size 4.6" x 2.4"
72= 2.35" X 3.3 (3/4 Brk) xxx = Output Voltage
Format is XX.X (ie 1.8V = 018)
ss = Series
AA = 1/2brick Dual (Old designator)
AK = Ind Std sizes (1/4, 1/2, full) <150W mx = Options
AM/BM = Full size, astec pin out M1,M2 = .25" Height Heatsink
AL = Half size, astec pin-out M3,M4 = .5" height Heatsink
BK = Ind Std size =>150W or feature rich M5.M6 = 1.0" Height Heatsink
AV = Avansys Product
Note: For some products, they may not conform with the PART NUMBER DESCRIPTION above absolutely.
REVISION Q ATTACHMENT I Page 1 of 2
NEW PART NUMBER DESCRIPTION
Acs ii V1 V2 V3Vin -e t p Mx
Output Voltage
A = 5.0V E = 7.5V
F = 3.3V B = 12V, C = 15V
G = 2.5V L = 8V, H = 24V, R = 28V
D = 2.0V / 2.1V Omit V2 and V3 if Single Output
Y = 1.8V Omit V3 if Dual Output
M = 1.5V ie for Dual Output 5 and 3.3V
K = 1.2V V1 =A, V2 = F, V3 =Omit
J = 0.9V V1 =A, V2 = F, V3 =Omit
ii = Output Current Max
ie 60 = 60 Amps Vin = Input Voltage range
300 = 250V to 450V
S = Size 48 = 36V to 75V
F = Full Brick 24 = 18V to 36V
H = Half Brick 03 = 1.8V to 5.0V
Q = Quarter Brick 08 = 5.0V to 13.0V
S = 1 X 2 18 Pin SMT PFC: Power Factor Corrected
E = 1 X 2 Thru Hole
C = (.53X1.3X.33) SMT (Austin Lite drop in) E = Enable Logic for > 15W
V = Conventional Package (2X2.56") or ( Omit this digit for Positive enable
A = SIP N = Negative Logic
W = Convent pkg (Wide 2.5X3) E = Enable Logic for < 15W
R = 1 X 1 Thru Hole Omit this digit for no enable option
A = SIP 1 = Negative Logic
T = 1.6 X 2 4 = Positive Logic
c = Construction Trim for 1W to 15W
E = Enhanced Thermals (Baseplate or adapter plate) 9 = Trim Added
I = Integrated (Full Featured) Hong Kong models
L = Low Profile (Open Frame, No case - Isolated)
P = Open Frame (SIP or SMT) non-isolated P = Pin Length
Omit this digit for Standard 5mm
6 = 3.8mm
8 = 2.8mm
7 = 5.8 mm
Mx - Factory Options
customer Specific
Note: For some products, they may not conform with the NEW PART NUMBER DESCRIPTION above absolutely.
REVISION Q ATTACHMENT I Page 2 of 2