Triple Processor Supervisors
ADM13307
Rev. 0
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rights of third parties that may result from its use. Specifications subject to change without notice. No
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Tel: 781.329.4700 www.analog.com
Fax: 781.461.3113 ©2007 Analog Devices, Inc. All rights reserved.
FEATURES
Triple supervisory circuits
Supply voltage range of 2.0 V to 5.5 V
Pretrimmed threshold options: 1.8 V, 2.5 V, 3.3 V, and 5 V
Adjustable 0.6 V and 1.25 V voltage references
Maximum supply current of 40 μA
140 ms (minimum) reset timeout
RESET valid from VDD ≥ 1.1 V
Push-pull RESET and RESET outputs
8-lead, narrow body SOIC package
Temperature range: −40°C to +85°C
APPLICATIONS
Supervising DSPs/microcontrollers
Industrial and portable equipment
Wireless systems
Notebook/desktop computers
GENERAL DESCRIPTION
The ADM13307 is a triple voltage supervisor designed to
monitor up to three voltage levels in DSP and microprocessor-
based systems.
There are five models available, all of which feature a combina-
tion of internally pretrimmed undervoltage threshold options
for monitoring 1.8 V, 2.5 V, 3.3 V, and 5 V supplies. There are
also two adjustable input options with undervoltage thresholds of
either 0.6 V or 1.25 V.
The ADM13307-18, ADM13307-25, and ADM13307-33
models have two internally fixed thresholds and one externally
programmable threshold via a resistor string. The ADM13307-4
and ADM13307-5 offer one internally fixed threshold and two
externally programmable thresholds. See the Ordering Guide
for a list of all available options.
During power-up, RESET is asserted when the supply voltage
exceeds 1.1 V. The device then monitors the SENSEv input
pins and holds the RESET output low as long as the SENSEv
pins remain below the rising threshold voltage, VIT+.
Once the supplies monitored at the SENSEv inputs rise above
their associated thresholds, the reset signal remains low for the
reset timeout period before deasserting. Subsequently, if a volt-
age monitored by the SENSEv pins falls below its associated
falling input threshold voltage, VIT−, the RESET output asserts.
FUNCTIONAL BLOCK DIAGRAMS
06923-002
V
DD
14kΩ
R1 R2
R3 R4
RESET
LOGIC + TIMER
OSCILLATOR
RESET
ADM13307-33
ADM13307-25
ADM13307-18
SENSE1
SENSE2
GND
SENSE3
MR
RESET
1.25V
Figure 1.
06923-001
V
DD
14kΩ
R1 R2
0.6V
RESET
LOGIC + TIMER
OSCILLATOR
RESET
ADM13307-4
ADM13307-5
SENSE1
SENSE2
SENSE3
MR
RESET
GND
Figure 2.
The ADM13307 features both an active high RESET and an
active low RESET output.
The manual reset input of the ADM13307 can be used to initiate
a reset by means of an external push button or logic signal.
The ADM13307 is available in an 8-lead narrow body SOIC
package. The device operates over the extended industrial
temperature range of −40°C to +85°C.
ADM13307
Rev. 0 | Page 2 of 12
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
General Description ......................................................................... 1
Functional Block Diagrams ............................................................. 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
Timing Requirements .................................................................. 5
Switching Characteristics ............................................................ 5
Functional Truth Table ................................................................ 5
Absolute Maximum Ratings ............................................................ 6
Thermal Resistance .......................................................................6
ESD Caution...................................................................................6
Pin Configuration and Function Descriptions ..............................7
Typical Performance Characteristics ..............................................8
Theory of Operation ...................................................................... 10
Input Configuration ................................................................... 10
Reset Output ............................................................................... 10
Manual Reset (MR) .................................................................... 10
Outline Dimensions ....................................................................... 11
Ordering Guide .......................................................................... 11
REVISION HISTORY
8/07—Revision 0: Initial Version
ADM13307
Rev. 0 | Page 3 of 12
SPECIFICATIONS
VDD = 2.0 V to 5.5 V, −40°C ≤ TA ≤ +85°C, unless otherwise noted.
Table 1. ADM13307-18, ADM13307-25, and ADM13307-33
Parameter Min Typ Max Unit Test Conditions/Comments
OPERATING VOLTAGE RANGE, VDD 2.0 5.5 V
SUPPLY CURRENT, IDD 40 μA
INPUT CAPACITANCE, CI 10 pF VI = 0 V to VDD
RESET, RESET Output
High Level Output Voltage, VOH V
DD − 0.2 V IOH = −20 μA
V
DD − 0.4 V IOH = −2 mA, VDD = 3.3 V
V
DD − 0.4 V IOH = −3 mA, VDD = 5.5 V
Low Level Output Voltage, VOL 0.2 V IOL = 20 μA
0.4 V IOL = 2 mA, VDD = 3.3 V
0.4 V IOL = 3 mA, VDD = 5.5 V
Power-Up Reset Voltage1 0.4 V IOL = 20 μA, VDD ≥ 1.1 V
SENSE INPUTS
Falling Input Threshold Voltage, VIT− 1.22 1.25 1.28 V TA = 0°C to 85°C
1.64 1.68 1.72 V TA = 0°C to 85°C
2.20 2.25 2.30 V TA = 0°C to 85°C
2.86 2.93 3.00 V TA = 0°C to 85°C
4.46 4.55 4.64 V TA = 0°C to 85°C
1.22 1.25 1.29 V TA = −40°C to +85°C
1.64 1.68 1.73 V TA = −40°C to +85°C
2.20 2.25 2.32 V TA = −40°C to +85°C
2.86 2.93 3.02 V TA = −40°C to +85°C
4.46 4.55 4.67 V TA = −40°C to +85°C
Hysteresis at SENSEv Inputs, VHYS 10 mV VIT− = 1.25 V
15 mV VIT− = 1.68 V
20 mV VIT− = 2.25 V
30 mV VIT− = 2.93 V
40 mV VIT− = 4.55 V
INPUT VOLTAGE AT MR
High Level, VIH 0.7 × VDD V
Low Level, VIL 0.3 × VDD V
INPUT TRANSITION RISE AND FALL RATE AT MR 50 ns/V
HIGH LEVEL INPUT CURRENT, IH
MR −130 −180 μA
MR = 0.7 × VDD, VDD = 5.5 V
SENSE1 5 8 μA SENSE1 = VDD = 5.5 V
SENSE2 6 9 μA SENSE2 = VDD = 5.5 V
SENSE3 −25 +25 nA SENSE3 = VDD
LOW LEVEL INPUT CURRENT, IL
MR −430 −600 μA
MR = 0 V, VDD = 5.5 V
SENSEv −25 +25 nA SENSE1, SENSE2, SENSE3 = 0 V
1 The lowest supply voltage at which RESET becomes active. tr, VDD ≥ 15 μs/V.
ADM13307
Rev. 0 | Page 4 of 12
VDD = 2.0 V to 5.5 V, −40°C ≤ TA ≤ +85°C, unless otherwise noted.
Table 2. ADM13307-4 and ADM13307-5
Parameter Min Typ Max Unit Test Conditions/Comments
OPERATING VOLTAGE RANGE, VDD 2.0 5.5 V
SUPPLY CURRENT, IDD 40 μA
INPUT CAPACITANCE, CI 10 pF VI = 0 V to VDD
RESET, RESET Output
High Level Output Voltage, VOH V
DD − 0.2 V IOH = −20 μA
V
DD − 0.4 V IOH = −2 mA, VDD = 3.3 V
V
DD − 0.4 V IOH = −3 mA, VDD = 5.5 V
Low Level Output Voltage, VOL 0.2 V IOL = 20 μA
0.4 V IOL = 2 mA, VDD = 3.3 V
0.4 V IOL = 3 mA, VDD = 5.5 V
Power-Up Reset Voltage1 0.4 V IOL = 20 μA, VDD ≥ 1.1 V
SENSE INPUTS
Falling Input Threshold Voltage, VIT− 0.5946 0.6 0.6048 V TA = −40°C to +85°C
0.5952 0.6 0.6048 V TA = −40°C to +85°C, 2.35 V ≤ VDD ≤ 5.5 V
2.23 2.25 2.29 V TA = −40°C to +85°C
2.90 2.93 2.98 V TA = −40°C to +85°C
Hysteresis at SENSEv Inputs, VHYS 0 mV VIT− = 0.6 V
20 mV VIT− = 2.25 V
30 mV VIT− = 2.93 V
INPUT VOLTAGE AT MR
High Level, VIH 0.7 × VDD V
Low Level, VIL 0.3 × VDD V
INPUT TRANSITION RISE AND FALL RATE AT MR 50 ns/V
HIGH LEVEL INPUT CURRENT, IH
MR −130 −180 μA
MR = 0.7 × VDD, VDD = 5.5 V
SENSE1 5 8 μA SENSE1 = VDD = 5.5 V
SENSE2 −50 +50 nA SENSE2 = VDD = 5.5 V
SENSE3 −25 +25 nA SENSE3 = VDD
LOW LEVEL INPUT CURRENT, IL
MR −430 −600 μA
MR = 0 V, VDD = 5.5 V
SENSEv −25 +25 nA SENSE1, SENSE2, SENSE3 = 0 V
1 The lowest supply voltage at which RESET becomes active. tr, VDD ≥ 15 μs/V.
ADM13307
Rev. 0 | Page 5 of 12
TIMING REQUIREMENTS
VDD = 2.0 V to 5.5 V, RL = 1 MΩ, CL = 50 pF, TA = 25°C.
Table 3. ADM13307-18, ADM13307-25 and ADM13307-33
Parameter Min Typ Max Unit Test Conditions/Comments
Pulse Width (tw)
SENSEv 6 μs VSENSEvL = VIT− − 0.3 V, VSENSEvH = VIT+ + 0.3 V
MR 100 ns VIH = 0.7 × VDD, VIL = 0.3 × VDD
Table 4. ADM13307-4 and ADM13307-5
Parameter Min Typ Max Unit Test Conditions/Comments
Pulse Width (tw)
SENSEv 30 μs VSENSEvL = VIT− − 0.3 V, VSENSEvH = VIT+ + 0.3 V
MR 100 ns VIH = 0.7 × VDD, VIL = 0.3 × VDD
SWITCHING CHARACTERISTICS
VDD = 2.0 V to 5.5 V, RL = 1 MΩ, CL = 50 pF, TA = 25°C
Table 5. ADM13307-18, ADM13307-25 and ADM13307-33
Parameter Min Typ Max Unit Test Conditions/Comments
Delay Time (td) 140 200 280 ms
VI(SENSEv) ≥ VIT+ + 0.2 V, MR ≥ 0.7 × VDD
Propagation Delay, High-to-Low, MR to RESET1/RESET (tPHL) 200 500 ns VI(SENSEv) ≥ VIT+ + 0.2 V, VIH ≥ 0.7 × VDD, VIL ≥ 0.3 × VDD
Propagation Delay, Low-to-High, MR to RESET/RESET1 (tPLH) 200 500 ns VI(SENSEv) ≥ VIT+ + 0.2 V, VIH ≥ 0.7 × VDD, VIL ≥ 0.3 × VDD
Propagation Delay, High-to-Low, SENSEv to RESET1/RESET (tPHL) 1 5 μs
VIH = VIT+ + 0.3 V, VIL = VIT− − 0.3 V, MR ≥ 0.7 × VDD
Propagation Delay, Low-to-High, SENSEv to RESET/RESET1 (tPLH) 1 5 μs
VIH = VIT+ + 0.3 V, VIL = VIT− − 0.3 V, MR ≥ 0.7 × VDD
1 The reset timeout delay of 200 ms masks the propagation delay
Table 6. ADM13307-4 and ADM13307-5
Parameter Min Typ Max Unit Test Conditions/Comments
Delay Time (td) 140 200 280 ms
VI(SENSEv) ≥ VIT+ + 0.2 V, MR ≥ 0.7 × VDD
Propagation Delay, High-to-Low, MR to RESET1/RESET (tPHL) 200 500 ns VI(SENSEv) ≥ VIT+ + 0.2 V, VIH ≥ 0.7 × VDD, VIL ≥ 0.3 × VDD
Propagation Delay, Low-to-High, MR to RESET/RESET1 (tPLH) 200 500 ns VI(SENSEv) ≥ VIT+ + 0.2 V, VIH ≥ 0.7 × VDD, VIL ≥ 0.3 × VDD
Propagation Delay, High-to-Low, SENSEv to RESET1/RESET (tPHL) 30 μs
VIH = VIT+ + 0.3 V, VIL = VIT− − 0.3 V, MR ≥ 0.7 × VDD
Propagation Delay, Low-to-High, SENSEv to RESET/RESET1 (tPLH) 30 μs
VIH = VIT+ + 0.3 V, VIL = VIT− − 0.3 V, MR ≥ 0.7 × VDD
1 The reset timeout delay of 200 ms masks the propagation delay.
FUNCTIONAL TRUTH TABLE
Table 7.
MR SENSE1 > VIT1 SENSE2 > VIT2 SENSE3 > VIT3 RESET RESET
L X1 X
1 X
1 L H
H 0 0 0 L H
H 0 0 1 L H
H 0 1 0 L H
H 0 1 1 L H
H 1 0 0 L H
H 1 0 1 L H
H 1 1 0 L H
H 1 1 1 H L
1 X = don’t care.
ADM13307
Rev. 0 | Page 6 of 12
ABSOLUTE MAXIMUM RATINGS
Table 8.
Parameter Rating
Supply Voltage Range, VDD −0.3 V to +6 V
MR −0.3 V to VDD + 0.3 V
SENSE1, SENSE2, SENSE3 (VDD + 0.3 V)VIT/VREF
RESET, RESET
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
−0.3 V to +6 V
Maximum Low Output Current 5 mA
Maximum High Output Current −5 mA
Input Clamp Current (VI < 0 V, VI > VDD) ±20 mA
Output Clamp Current (VO < 0 V, VO > VDD) ±20 mA
Operating Temperature Range −40°C to +85°C
Storage Temperature Range −65°C to +150°C
Lead Temperature
Soldering (10 sec) 300°C
Vapor Phase (60 sec) 215°C
Infrared (15 sec) 220°C
THERMAL RESISTANCE
Table 9.
Package Type θJA Unit
8-Lead SOIC_N (R-8) 206 °C/W
ESD CAUTION
ADM13307
Rev. 0 | Page 7 of 12
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
06923-003
SENSE1 1
SENSE2 2
SENSE3 3
GND 4
VDD
8
MR7
RESET6
RESET5
ADM13307
TOP VIEW
(Not to Scale)
Figure 3.Pin Configuration
Table 10. Pin Function Descriptions
Pin No. Mnemonic Description
1 SENSE1 Sense Voltage Input 1.
2 SENSE2 Sense Voltage Input 2.
3 SENSE3 Sense Voltage Input 3.
4 GND Ground.
5 RESET Active Low Reset Output.
6 RESET Active High Reset Output.
7 MR Manual Reset.
8 VDD Supply Voltage.
ADM13307
Rev. 0 | Page 8 of 12
TYPICAL PERFORMANCE CHARACTERISTICS
0.6003
0.5985
06923-004
FREE AIR TEMPERATURE, T
A
(°C)
INPUT THRESHOLD VOLTAGE, V
IT
(V)
0.6001
0.5999
0.5997
0.5995
0.5993
0.5991
0.5989
0.5987
–40–200 20406080
T
A
= 25°C
V
DD
= 2V
MR = OPEN
06923-007
0
01
MINIMUM PULSE DURATION AT SENSE,
t
W (µs)
000
10
9
8
7
6
5
4
3
2
1
100 200 300 400 500 600 700 800 900
VDD = 5.5V
MR = OPEN
SENSE THRESHOLD OVERDRIVE (mV)
Figure 7. ADM13307-18, ADM13307-25 and ADM13307-33 Minimum Pulse
Duration at Sense vs. Sense Threshold Overdrive
Figure 4. Sense Threshold Voltage vs. Free Air Temperature at VDD
40
–10
–1.0 6.5
06923-005
SUPPLY VOLTAGE, V
DD
(V)
SUPPLY CURRENT, I
DD
(µA)
35
30
25
20
15
10
5
0
–5
–0.5 00.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
SENSEv = 5.5V
MR = OPEN
T
A
= 25°C
30
0 1000
06923-017
MINIMUM PULSE DURATION AT SENSE, t
W
(µs)
40
39
38
37
36
35
34
33
32
31
100 200 300 400 500 600 700 800 900
V
DD
= 5.5V
MR = OPEN
SENSE THRESHOLD OVERDRIVE (mV)
Figure 5. Supply Current vs. Supply Voltage Figure 8. ADM13307-4 and ADM13307-5 Minimum Pulse Duration at Sense
vs. Sense Threshold Overdrive
0
0––5–4–3–2–1
06923-008
HIGH LEVEL OUTPUT CURRENT, IOH (mA)
HIGH LEVEL OUTPUT VOLTAGE, V
OH (V)
2.50
6
2.00
1.00
0.50
1.50
–40°C
0°C
+25°C
+85°C
VDD = 2V
MR = OPEN
–900
–1.0 7.0
06923-006
INPUT VOLTAGE AT MR, V
I
(V)
INPUT CURRENT, I
I
(µA)
100
200
0
–100
–200
–300
–400
–500
–600
–700
–800
–0.5 00.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5
V
DD
= 5.5V
T
A
= 25°C
Figure 6. Input Current vs. Input Voltage at MR Figure 9. High Level Output Voltage vs. High Level Output Current
ADM13307
Rev. 0 | Page 9 of 12
06923-009
0
0––50–40–30–20–10
HIGH LEVEL OUTPUT CURRENT, IOH (mA)
HIGH LEVEL OUTPUT VOLTAGE, V
OH (V)
6.0
60
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
–40°C
0°C
+25°C
+85°C
VDD = 5.5V
MR = OPEN
Figure 10. High Level Output Voltage vs. High Level Output Current
0
06
06923-010
LOW LEVEL OUTPUT CURRENT, I
OL
(mA)
LOW LEVEL OUTPUT VOLTAGE, V
OL
(V)
0.25
0.20
0.15
0.10
0.05
24135
V
DD
= 2V
MR = OPEN
–40°C
0°C
+25°C
+85°C
Figure 11. Low Level Output Voltage vs. Low Level Output Current
0
06
06923-016
LOW LEVEL OUTPUT CURRENT, IOL (mA)
LOW LEVEL OUTPUT VOLTAGE, V
OL (V)
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
5 10152025303540455055
–40°C
0°C
+25°C
+85°C
VDD = 5.5V
MR = OPEN
Figure 12. Low Level Output Voltage vs. Low Level Output Current
ADM13307
Rev. 0 | Page 10 of 12
THEORY OF OPERATION
The ADM13307 devices are triple voltage supervisors designed
to monitor up to three supplies and provide a reset signal to
DSP and microprocessor-based systems.
There are five models available, all of which feature a combina-
tion of internally pretrimmed undervoltage threshold options
for monitoring 1.8 V, 2.5 V, 3.3 V, and 5 V supplies. There are
also adjustable input options with threshold voltages of either
0.6 V or 1.25 V.
ADM13307-18, ADM13307-25, and ADM13307-33 models
have two internally fixed thresholds and one externally
programmable threshold, via a resistor string, while the
ADM13307-4 and ADM13307-5 offer one internally fixed
threshold and two externally programmable thresholds via a
resistor string. See the Ordering Guide for a list of all available
options.
INPUT CONFIGURATION
The ADM13307 is powered through VDD. To increase noise
immunity in noisy applications, place a 0.1 μF capacitor
between the VDD input and ground.
The SENSEv inputs are resistant to short power supply glitches.
Do not allow unused SENSEv inputs to float or to be grounded,
instead connect it to a supply voltage greater than its specified
threshold voltage.
Typically, the threshold voltage at an adjustable SENSEv input
is either 0.6 V or 1.25 V. Refer to the Ordering Guide for details.
For example, to monitor a voltage greater than 1.25 V, con-
nect a resistor divider network to the device as depicted in
Figure 13, where,
⎟
⎠
⎞
⎜
⎝
⎛+
=
R2
R2R1
VMONITERED V25.1
06923-012
R1
R2
MONITORED VOLTAGE
V
REF
= 1.25V
Figure 13. Setting the Adjustable Monitor
RESET OUTPUT
The reset outputs are guaranteed to be in the correct state for
VDD down to 1.1 V. During power up, RESET is asserted when
the supply voltage becomes greater than 1.1 V.
Once the supplies monitored at the SENSEv pins rise above their
associated threshold level, the RESET signal remains low for the
reset timeout period before deasserting. Subsequently, if a supply
monitored by the SENSEv pins falls below its associated thresh-
old, the RESET output reasserts.
06923-013
SENSEv
V
(NOM)
0
1
V
IT–
RESET
t
d
t
d
t
t
Figure 14. Reset Timing Diagram
The ADM13307 features both an active-low push-pull RESET
output and active-high push-pull RESET output.
MANUAL RESET (MR)
The ADM13307 features a manual reset input, which when driven
low, asserts the reset output, as shown in Figure 15. When MR
transitions from low to high, the reset remains asserted for the
duration of the reset active timeout period before deasserting.
An external push-button switch can be connected between MR
and ground to allow the user to generate a reset.
06923-015
0
1
RESET
td
t
0
1
t
MR
Figure 15. Manual Reset Timing Diagram
ADM13307
Rev. 0 | Page 11 of 12
OUTLINE DIMENSIONS
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
COMPLIANT TO JEDEC STANDARDS MS-012-A A
012407-A
0.25 (0.0098)
0.17 (0.0067)
1.27 (0.0500)
0.40 (0.0157)
0.50 (0.0196)
0.25 (0.0099) 45°
8°
0°
1.75 (0.0688)
1.35 (0.0532)
SEATING
PLANE
0.25 (0.0098)
0.10 (0.0040)
4
1
85
5.00 (0.1968)
4.80 (0.1890)
4.00 (0.1574)
3.80 (0.1497)
1.27 (0.0500)
BSC
6.20 (0.2441)
5.80 (0.2284)
0.51 (0.0201)
0.31 (0.0122)
COPLANARITY
0.10
Figure 16. 8-Lead Standard Small Outline Package [SOIC_N]
Narrow Body
(R-8)
Dimensions shown in millimeters and (inches).
ORDERING GUIDE
Model
Nominal Input Voltage Threshold Voltage (Typical) Temperature
Range
Package
Description
Package
Option
SENSE1 SENSE2 SENSE3 SENSE1 SENSE2 SENSE3
ADM13307-18ARZ13.3 V 1.8 V Adj22.93 V 1.68 V 1.25 V –40°C to +85°C 8-Lead SOIC_N R-8
ADM13307-18ARZ-RL71
3.3 V 1.8 V Adj22.93 V 1.68 V 1.25 V –40°C to +85°C 8-Lead SOIC_N R-8
ADM13307-25ARZ1
3.3 V 2.5 V Adj22.93 V 2.25 V 1.25 V –40°C to +85°C 8-Lead SOIC_N R-8
ADM13307-25ARZ-RL71
3.3 V 2.5 V Adj22.93 V 2.25 V 1.25 V –40°C to +85°C 8-Lead SOIC_N R-8
ADM13307-33ARZ1
5 V 3.3 V Adj24.55 V 2.93 V 1.25 V –40°C to +85°C 8-Lead SOIC_N R-8
ADM13307-33ARZ-RL71
5 V 3.3 V Adj24.55 V 2.93 V 1.25 V –40°C to +85°C 8-Lead SOIC_N R-8
ADM13307-4ARZ1
2.5 V Adj3Adj32.25 V 0.6 V 0.6 V –40°C to +85°C 8-Lead SOIC_N R-8
ADM13307-4ARZ-RL71
2.5 V Adj3Adj32.25 V 0.6 V 0.6 V –40°C to +85°C 8-Lead SOIC_N R-8
ADM13307-5ARZ1
3.3 V Adj3Adj32.93 V 0.6 V 0.6 V –40°C to +85°C 8-Lead SOIC_N R-8
ADM13307-5ARZ-RL71
3.3 V Adj3Adj32.93 V 0.6 V 0.6 V –40°C to +85°C 8-Lead SOIC_N R-8
1 Z = RoHS Compliant Part.
2 1.25 V adjustable. External resistor divider determines the actual sense voltage.
3 0.6 V adjustable. External resistor divider determines the actual sense voltage.
ADM13307
Rev. 0 | Page 12 of 12
NOTES
©2007 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D06923-0-8/07(0)
