Parameter Symbol Value Units
Storage Temperature TSTG -55 to +125 °C
Operating Temperature TOPR -55 to +85 °C
Reflow Temperature Profile (Refer to fig. 11)
EMITTER
DC/Average Forward Input Current IF(avg) 20 mA
Peak Forward Input Current (50% duty cycle, 1 ms P.W.) IF(pk) 40 mA
Peak Transient Input Current - (61 µs P.W., 300 pps)I
F(trans) 1.0 A
Reverse Input Voltage VR5V
Input Power Dissipation PD35 mW
DETECTOR
Average Output Current (Pin 6) IO(avg) 60 mA
Emitter-Base Reverse Voltage VEBR 0.5 V
Supply Voltage, Output Voltage HCPL-0700 VCC, VO
-0.5 to 7 V
HCPL-0701 -0.5 to 18
Output power dissipation PD100 mW
ABSOLUTE MAXIMUM RATINGS (TA= 25°C unless otherwise specified)
1
2
3
4 5
6
7
8
+
_
VF
VCC
VB
VO
GND
HCPL-0700 / HCPL-0701
N/C
N/C
SINGLE-CHANNEL
HCPL-0700
HCPL-0701
Package Dimensions
Lead Coplanarity : 0.004 (0.10) MAX
0.202 (5.13)
0.182 (4.63)
0.021 (0.53)
0.011 (0.28) 0.050 (1.27)
TYP
0.244 (6.19)
0.224 (5.69)
0.143 (3.63)
0.123 (3.13)
0.008 (0.20)
0.003 (0.08)
0.010 (0.25)
0.006 (0.16)
SEATING PLANE
0.164 (4.16)
0.144 (3.66)
0.019 [0.48]
Pin 1
NOTE
All dimensions are in inches (millimeters)
FEATURES
Low current - 0.5 mA
Superior CTR-2000%
Superior CMR-10 kV/µs
CTR guaranteed 0-70°C
*BSI, CSA and UL approval
LOW INPUT CURRENT
HIGH GAIN SPLIT
DARLINGTON OPTOCOUPLERS
DESCRIPTION
The HCPL-0700 and HCPL-0701 optocouplers consist of an AlGaAs
LED optically coupled to a high gain split darlington photodetector
housed in a compact 8-pin small outline package.
The split darlington configuration separating the input photodiode
and the first stage gain from the output transistor permits lower out-
put saturation voltage and higher speed operation than possible with
conventional darlington phototransistor optocoupler.
The combination of a very low input current of 0.5 mA and a high
current transfer ratio of 2000% makes this family particularly useful
for input interface to MOS, CMOS, LSTTL and EIA RS232C, while
output compatibility is ensured to CMOS as well as high fan-out TTL
requirements.
APPLICATIONS
Digital logic ground isolation
Telephone ring detector
EIA-RS-232C line receiver
High common mode noise line receiver
µP bus isolation
Current loop receiver
*Samples submitted for certification - Approval pending
2001 Fairchild Semiconductor Corporation
DS300394 3/5/01 1 OF 9 www.fairchildsemi.com
ELECTRICAL CHARACTERISTICS (TA= 0 to 70°C unless otherwise specified.)
Parameter Test Conditions Symbol Device Min Typ** Max Unit
EMITTER TA=25°C) VFAll 1.0 1.27 1.7
Input Forward Voltage (IF= 1.6 mA) 1.75 V
Input Reverse Breakdown Voltage (TA= 25°C, IR= 10 µA) BVRAll 5.0 20
Temperature coefficient of forward voltage (IF= 1.6 mA) (VF/TA) All -1.8 mV/°C
DETECTOR (IF= 0 mA, VO= VCC = 18 V) IOH
HCPL-0701 0.01 100 µA
Logic high output current (IF= 0 mA, VO= VCC = 7 V) HCPL-0700 0.01 250
Logic low supply (IF= 1.6 mA, VO= Open) ICCL
HCPL-0700 0.4 1.5 mA
(VCC = 18 V) HCPL-0701
Logic high supply (IF= 0 mA, VO= Open) ICCH
HCPL-0700 0.05 10 µA
(VCC = 18 V) HCPL-0701
INDIVIDUAL COMPONENT CHARACTERISTICS
Parameter Test Conditions Symbol Device Min Typ** Max Unit
COUPLED (IF= 0.5 mA, VO= 0.4 V, VCC = 4.5 V) HCPL-0701 400 2000 5000
Current transfer ratio (IF= 1.6 mA, VO= 0.4 V, VCC = 4.5 V) CTR HCPL-0701 500 1300 2600 %
(Notes 1,2) (IF= 1.6 mA, VO= 0.4 V, VCC = 4.5 V) HCPL-0700 300 1300 2600
(IF= 0.5 mA, IO= 2 mA, VCC = 4.5 V) 0.05 0.4
Logic low output voltage (IF= 1.6 mA, IO= 8 mA, VCC = 4.5 V) HCPL-0701 0.10 0.4
output voltage (IF= 5 mA, IO= 15 mA, VCC = 4.5 V) VOL 0.13 0.4 V
(Note 2) (IF= 12 mA, IO= 24 mA, VCC = 4.5 V) 0.20 0.4
(IF= 1.6 mA, IO= 4.8 mA, VCC = 4.5 V) HCPL-0700 0.08 0.4
TRANSFER CHARACTERISTICS (TA= 0 to 70°C Unless otherwise specified)
** All typicals at TA= 25°C
SINGLE-CHANNEL
HCPL-0700
HCPL-0701
Characteristics Test Conditions Symbol Min Typ** Max Unit
(Relative humidity = 45%)
Input-output (TA = 25°C, t = 5 s) II-O 1.0 µA
insulation leakage current (VI-O = 3000 VDC)
(Note 4)
Withstand insulation test voltage (RH 650%, TA = 25°C) VISO 2500 VRMS
(Note 4, 5) ( t = 1 min.)
Resistance (input to output) (Note 4) (VI-O = 500 VDC) RI-O 1012 1
ISOLATION CHARACTERISTICS (TA= 0 to 70°C Unless otherwise specified)
www.fairchildsemi.com 2 OF 9 3/5/01 DS300394
LOW INPUT CURRENT
HIGH GAIN SPLIT
DARLINGTON OPTOCOUPLERS
** All typicals at TA= 25°C
SINGLE-CHANNEL
HCPL-0700
HCPL-0701
Parameter Test Conditions Symbol Device Min Typ** Max Unit
(RL= 4.7 k1, IF= 0.5 mA) HCPL-0701 4 30
Propagation delay TA= 25°C25
time to logic low (RL= 270 1, IF= 12 mA) TPHL HCPL-0701 0.2 s
(Note 2) (Fig. 13) TA= 25°C1
(RL= 2.2 k1, IF= 1.6 mA) HCPL-0700 1.5 15
TA= 25°C10
(RL= 4.7 k1, IF= 0.5 mA) HCPL-0701 12 90
Propagation delay (RL= 4.7 k1, IF= 0.5 mA) TA= 25°C60
time to logic high (RL= 270 1, IF= 12 mA) TPLH HCPL-0701 1.3 10 µs
(Note 2) (Fig. 13) TA= 25°C7
(RL= 2.2 k1, IF= 1.6 mA) HCPL-0700 7 50
TA= 25°C35
Common mode HCPL-0700
transient (IF= 0 mA, VCM= 10 VP-P)|CMH| 1,000 10,000 V/µs
immunity at TA= 25°C, (RL= 2.2 k1) (Note 3) (Fig. 14) HCPL-0701
logic high
Common mode HCPL-0700
transient (IF= 1.6 mA, VCM= 10 VP-P, RL= 2.2 k1)|CML| 1,000 10,000 V/µs
immunity at TA= 25°C (Note 3) (Fig. 14) HCPL-0701
logic low
SWITCHING CHARACTERISTICS (TA= 0 to 70°C unless otherwise specified., VCC = 5 V)
1. Current Transfer Ratio is defined as a ratio of output collector current, IO, to the forward LED input current, IF, times 100%.
2. Pin 7 open. Use of a resistor between pins 5 and 7 will decrease gain and delay time.
3. Common mode transient immunity in logic high level is the maximum tolerable (positive) dVcm/dt on the leading edge of the
common mode pulse signal, VCM, to assure that the output will remain in a logic high state (i.e., VO2.0 V). Common mode
transient immunity in logic low level is the maximum tolerable (negative) dVcm/dt on the trailing edge of the common mode pulse
signal, VCM, to assure that the output will remain in a logic low state (i.e., VOT0.8 V).
4. Device is considered a two terminal device: Pins 1, 2, 3 and 4 are shorted together and Pins 5, 6, 7 and 8 are shorted together.
5. 2500 VAC RMS for 1 minute duration is equivalent to 3000 VAC RMS for 1 second duration.
NOTES
DS300394 3/5/01 3 OF 9 www.fairchildsemi.com
LOW INPUT CURRENT
HIGH GAIN SPLIT
DARLINGTON OPTOCOUPLERS
Current Limiting Resistor Calculations
R1(Non-Invert) = VDD1 - VDF - VOL1
IF
R1(Invert) = VDD1 - VOH1 - VDF
IF
R2= VDD2 - = VOLX (@ IL - I2)
IL
Where:
VDD1 - Input Supply Voltage
VDD2 - Output Supply Voltage
VDF - Diode Forward Voltage
VOL1 - Logic 0 Voltage of Driver
VOH1 - Logic 1 Voltage of Driver
IF- Diode Forward Current
VOLX - Saturation Voltage of
Output Transistor
IL- Load Current Through
Resistor R2
I2- Input Current of Output Gate
ELECTRICAL CHARACTERISTICS (TA= 25°C unless otherwise specified)
3
4
2
1
6
5
7
8
2
R
1
RIN OUT
V
DD1 DD2
V
IN
4
3
2
5
6
7R
2
OUT
1 8
DD2
V
R
1
INPUT OUTPUT
CMOS CMOS 74XX 74LXX 74SXX 74LSXX 74HXX
@ 5 V @ 10 V
R1 (1)R2 (1)R2 (1)R2 (1)R2 (1)R2 (1)R2 (1)R2 (1)
CMOS NON-INV. 2000
@ 5 V INV. 510
CMOS NON-INV. 5100
@ 10 V INV. 4700
74XX NON-INV. 2200
INV. 180
74LXX NON-INV. 1800 1000 2200 750 1000 1000 1000 560
INV. 100
74SXX NON-INV. 2000
INV. 360
74LSXX NON-INV. 2000
INV. 180
74HXX NON-INV. 2000
INV. 180
Fig. 1 Resistor Values for Logic Interface
Fig. 2 Non-Inverting Logic Interface Fig. 3 Inverting Logic Interface
SINGLE-CHANNEL
HCPL-0700
HCPL-0701
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LOW INPUT CURRENT
HIGH GAIN SPLIT
DARLINGTON OPTOCOUPLERS
Fig. 4 Propagation Delay vs. Temperature
TA - TEMPERATURE (˚C)
TA - TEMPERATURE (˚C)
-60 -40 -20 0 20 40 60 80 100
t
p
- PROPAGATION DELAY (µs)
0
5
10
15
20
25
30
35
t
p
- PROPAGATION DELAY (µs)
Fig. 6 Propagation Delay vs. Temperature
-60 -40 -20 0 20 40 60 80 100
0
1
2
3
4
tPHL
tPLH
IF = 12 mA
VCC = 5 V
RL = 270
1/f = 50 µs
TA - TEMPERATURE (˚C)
Fig. 7 Logic High Output Current vs. Temperature
-40 -20 0 20 40 60 80 100
I
OH
- LOGIC HIGH OUTPUT CURRENT (nA)
0.01
0.1
1
10
100
1000 VCC = VO = 5.5 V
TA - TEMPERATURE (˚C)
Fig. 5 Propagation Delay vs. Temperature
-60 -40 -20 0 20 40 60 80 100
t
p
- PROPAGATION DELAY (µs)
0
2
4
6
8
10
12
14
16
18
20
tPHL
tPLH
IF = 1.6 mA
VCC = 5 V
RL = 2.2 k
1/f = 50 µs
VCC = 5 V
IF = 0.5 mA
RL = 4.7 k
1/f = 50 µs
tPLH
tPHL
SINGLE-CHANNEL
HCPL-0700
HCPL-0701
DS300394 3/5/01 5 OF 9 www.fairchildsemi.com
LOW INPUT CURRENT
HIGH GAIN SPLIT
DARLINGTON OPTOCOUPLERS
Fig. 8 Output Current vs. Input Forward Current
IF - INPUT FORWARD CURRENT (mA)
0.01 0.1 1 10
I
O
- OUTPUT CURRENT (mA)
0.01
0.1
1
10
100
TA = 70˚C
TA = 25˚C
TA = 0˚C
TA = -40˚C
TA = 85˚C
Fig. 9 Input Forward Current vs. Forward Voltage
VF - FORWARD VOLTAGE (V)
1.1 1.2 1.3 1.4 1.5 1.6
I
F
- FORWARD CURRENT (mA)
0.001
0.01
0.1
1
10
100
TA = 85˚C
TA = 70˚C
TA = 25˚C
TA = 0˚C
TA = -40˚C
VCC
= 5V
VO = 0.4V
IF - INPUT FORWARD CURRENT (mA)
0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6
I
CCL
- LOGIC LOW SUPPLY CURRENT (mA)
0.0
0.1
0.2
0.3
0.4
0.5
VCC
= 18V
VCC
= 5V
Logic Low Supply Current vs.
Input Forward Current
Fig. 10 Logic Low Supply Current
vs. Input Forward Current
Fig. 11 DC Transfer Characteristics
VO - OUTPUT VOLTAGE (V)
012
I
O
- OUTPUT CURRENT (mA)
0
20
40
60
80
IF
= 5.0mA
IF
= 4.5mA
IF
= 4.0mA
IF
= 3.5mA
IF
= 3.0mA
IF
= 2.5mA
VCC
= 5V
TA
= 25˚C
IF
= 0.5mA
IF
= 1.0mA
IF
= 1.5mA
IF
= 2.0mA
Fig. 12 Current Transfer Ratio
vs. Input Forward Current
IF - INPUT FORWARD CURRENT (mA)
0.1 1 10
CTR - CURRENT TRANSFER RATIO (%)
0
500
1000
1500
2000
2500
3000
3500
TA
= 85˚C
TA
= 70˚C
TA
= 25˚C
TA
= 0˚C
TA
= -40˚C
VCC = 5V
VO = 0.4V
SINGLE-CHANNEL
HCPL-0700
HCPL-0701
www.fairchildsemi.com 6 OF 9 3/5/01 DS300394
LOW INPUT CURRENT
HIGH GAIN SPLIT
DARLINGTON OPTOCOUPLERS
Pulse Gen
CM
V
V
FF
B
A
+-
+5 V
O
V
-
I
F
3
4
+
F
V
-
2
1
Shield
Noise
6
O
5
GND
7
8
V
B
V
CC
V
L
R
PLH
OL
V
V
O
0
5 V
1.5 V
F
I
1.5 V
T
PHL
T
Switch at A : I = 0 mA
F
Switch at B : I = 1.6 mA
F
t
r
V
O
O
V
OL
V
5 V
0 V 10% 10%
90%
CM
V 10 V
3
I Monitor
F
4
I/ < 100 s
10% D.C.
tr = 5ns
Generator
Pulse
Z = 50
f
O
+
V
F
I
E
1
F
-
2
1
V
O
O
6
5
GND
7
8
V
B
V
L
R
CC
V+5 V
0.1 µF
L
C = 15 pF*
0.1 µF
f
t
m
R
90%
Shield
Noise
* Includes probe and fixture capacitance
Fig. 14 Common Mode Immunity Test Circuit
Fig. 13 Switching Time Test Circuit
SINGLE-CHANNEL
HCPL-0700
HCPL-0701
DS300394 3/5/01 7 OF 9 www.fairchildsemi.com
LOW INPUT CURRENT
HIGH GAIN SPLIT
DARLINGTON OPTOCOUPLERS
R1 .R1 Tape and Reel (500 per reel)
R2 .R2 Tape and Reel (2500 per reel)
Order
Entry
Option Identifier Description
4.0 ± 0.1
Ø1.5 MIN
User Direction of Feed
2 ± 0.05
1.75 ± 0.10
5.5 ± 0.05
12.0 ± 0.3
8.0 ± 0.1
0.3 MAX
8.3 ± 0.1
3.5 ± 0.2
0.1 MAX 6.4 ± 0.2
5.2 ± 0.2
Ø1.5 + 0.1/-0
ORDERING INFORMATION
225˚C
Time>183˚C:120 sec to180 sec
220˚C:10 sec to 40 sec
1
0
32 4 5
50
200
150
100
250
0Time (Min)
RECOMMENDED IR REFLOW PROFILE: J-STD-020
Fig. 15 JEDEC Reflow Profile
QT Carrier Tape Specifications
SINGLE-CHANNEL
HCPL-0700
HCPL-0701
www.fairchildsemi.com 8 OF 9 3/5/01 DS300394
LOW INPUT CURRENT
HIGH GAIN SPLIT
DARLINGTON OPTOCOUPLERS
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO
ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME
ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED
HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF
OTHERS.
LIFE SUPPORT POLICY
FAIRCHILDS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical
implant into the body,or (b) support or sustain life,
and (c) whose failure to perform when properly
used in accordance with instructions for use provided
in labeling, can be reasonably expected to result in a
significant injury of the user.
2. A critical component in any component of a life support
device or system whose failure to perform can be
reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
SINGLE-CHANNEL
HCPL-0700
HCPL-0701
LOW INPUT CURRENT
HIGH GAIN SPLIT
DARLINGTON OPTOCOUPLERS
DS300394 3/5/01 9 OF 9 www.fairchildsemi.com