_________________________________________________________________Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
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The MAX3740A evaluation kit (EV kit) is an assembled
demonstration board that provides complete optical and
electrical evaluation of the MAX3740A VCSEL driver.
The output of the evaluation kit can be interfaced to an
SMA connector, which can be connected to a 50
I
-
terminated oscilloscope. With slight modifications, the
evaluation kit can also be used to evaluate the
MAX3740A operation with a common-cathode VCSEL.
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♦ Fully Assembled and Tested
♦ Single +3.3V Power Supply Operation
♦ Allows Optical and Electrical Evaluation
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PART TEMP. RANGE IC PACKAGE
MAX3740AEVKIT -40°C to +85°C 24 QFN
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DESIGNATION
QTY
DESCRIPTION
C1, C2, C5, C9,
C13, C15, C16,
C17
8
0.1µF ±10% ceramic capacitors
(0402)
C3
1
0.047µF ±10% ceramic capacitor
(0402)
C4, C6, C7, C8,
C11, C12
6
0.01µF ±10% ceramic capacitors
(0402)
C10
1
Open
C14
1
10µF ±10% ceramic capacitor
(0805)
C18
1
10µF ±10% tantalum capacitor
(B Case)
D1
1
VCSEL laser and photodiode*
D2
1
LED, red T1 package
L1, L2, L3
3
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L4
1
1µH inductor (1008CS)
R1, R2
2
10kΩ potentiometers
R3
1
350Ω ±1% resistor (0402)
R4
1
2.49kΩ ±1% resistor (0402)
R5, R12
2
499Ω ±1% resistors (0402)
R6, R13
2
10kΩ ±5% resistors (0402)
R7
1
0Ω ±1% resistor (0402)*
R8
1
4.7kΩ ±1% resistor (0402)
R9, R11
2
49.9Ω ±1% resistors (0402)
R10, R26, R27,
R34, R35, R36
6
Open
R14
1
20kΩ potentiometer
R15
1
50kΩ potentiometer
DESIGNATION
QTY
DESCRIPTION
R16
1
500kΩ potentiometer
Q1, Q2
2
NPN transistors (SOT23)
Q3
1
MOSFET (SOT23)
JU1–JU8, JU10
9
2-pin headers, 0.1in centers
J1–J7
7
SMA connectors, round contacts
TP1–TP11, TP20,
TP21
13
Test points
U1
1
MAX3740AETG (24QFN)
U2
1
MAX495ESA (8 SO)
None
9
Shunts
None
1
MAX3740A EV board
None
1
MAX3740A data sheet
* These components are not supplied but can be
populated for VCSEL testing.
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SUPPLIER
PHONE
AVX
843-444-2863
Coilcraft
847-639-6400
Digi-Key
218-681-6674
EF Johnson
402-474-4800
Murata
415-964-6321
Note: Please indicate that you are using the MAX3701
when ordering from these suppliers.
19-2694; Rev B, 07/04
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2 ________________________________________________________________________________________
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In the electrical configuration, an automatic power control
(APC) test circuit is included to emulate a semiconductor
laser with a monitor photodiode. Monitor diode current is
provided by transistor Q1, which is controlled by an
operational amplifier (U2). The APC test circuit,
consisting of U2 and Q1, applies the simulated monitor
diode current to the MD pin of the MAX3740. To ensure
proper operation in the electrical configuration, set up the
evaluation board as follows:
1) Place shunts on JU4 - JU8 and JU10 (see the
Adjustment and Control Description section for
details).
2) Remove shunts JU1 and JU2.
3) To enable the output connect TX_DISABLE to GND
by placing a shunt on JU3.
Note: When performing the following resistance
checks, autoranging DMMs may forward bias the on-
chip ESD protection and cause inaccurate
measurements. To avoid this, manually set the DMM
to a high range.
4) Adjust R15, the RBIASSET potentiometer, for 1.7kΩ
resistance between TP4 (BIASSET) and ground.
5) Adjust R1, the RPWRSET potentiometer, for 10kΩ
resistance between TP2 (REF) and pin 1 (MD) of
JU2.
6) Adjust R14, the RPEAKSET potentiometer, for 20kΩ
resistance between TP10 (PEAKSET) and ground,
to disable peaking.
7) Adjust R16, the RTC potentiometer, for 0Ω resistance
between TP7 (TC1) and TP8 (TC2), to disable
temperature compensation.
8) Adjust R2, the RMODSET potentiometer, for 10kΩ
resistance between TP9 (MODSET) and ground.
9) Apply a differential input signal (250mVP-P to
2200mVP-P) between SMA connectors J5 and J7
(IN+ and IN-).
10) Attach a high-speed oscilloscope with a 50Ω input to
SMA connector J6 (OUT).
11) Connect a +3.3V supply between TP20 (VCC) and
TP21 (GND). Adjust the power supply until the
voltage between TP11 and ground is +3.3V.
12) Adjust R1 (RPWRSET) until desired laser bias current is
achieved.
Ω
=
9
.
49
V
I
5
JU
_
1
PIN
BIAS
13) The MD and BIAS currents can be monitored at TP1
(VPWRMON) and TP3 (VBIASMON) using the equations
below:
PWRSET
PWRMON
MD
R
2
V
I
×
=
Ω
×
=
350
V
9
I
BIASMON
BIAS
Note: If the voltage at TP1 exceeds VPMTH (0.8V typ)
or TP3 exceeds VBMTH (0.8V typ), the FAULT signal
will be asserted and latched.
14) Adjust R2 until the desired laser modulation current
is achieved.
Ω
=
50
)
V
(
Amplitude
Signal
I
MOD
15) Adjust R14 (RPEAKSET) until the desired amount of
peaking is achieved.
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For optical evaluation of the MAX3740A, configure the
evaluation kit as follows:
1) Place shunts on JU2, JU6, JU7, JU8 and JU10 (See
the Adjustment and Control Description section for
details).
2) Remove components L2 and C9. Remove the shunts
from JU1, JU4 and JU5.
3) Install a 0Ω resistor at R7 to connect the anode of
the VCSEL to the output.
4) To enable the output connect TX_DISABLE to GND
by placing a shunt on JU3.
5) Connect a common cathode VCSEL as shown in
Figure 1. Keep leads short to reduce reflection.
Note: When performing the following resistance
checks, autoranging DMMs may forward bias the on-
chip ESD protection and cause inaccurate
measurements. To avoid this, manually set the DMM
to a high range.
6) Adjust R15, the RBIASSET potentiometer, for 1.7kΩ
resistance between TP4 (BIASSET) and ground.
7) Adjust R1, the RPWRSET potentiometer, for 10kΩ
resistance between TP2 (REF) and pin 1 (MD) of
JU2.
8) Adjust R14, the RPEAKSET potentiometer, for 20kΩ
resistance between TP10 (PEAKSET) and ground,
to disable peaking.
9) Adjust R16, the RTC potentiometer, for 0Ω resistance
between TP7 (TC1) and TP8 (TC2), to disable
temperature compensation.
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_________________________________________________________________________________________ 3
+,
- .
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12
3
45
6
7 8
9
:
5
10) Adjust R2, the RMODSET potentiometer, for 10kΩ
resistance between TP9 (MODSET) and ground.
11) Apply a differential input signal (250mVP-P to
2200mVP-P) between SMA connectors J5 and J7
(IN+ and IN-).
12) Attach the VCSEL fiber connector to an
optical/electrical converter.
13) Connect a +3.3V supply between TP20 (VCC) and
TP21 (GND). Adjust the power supply until the
voltage between TP11 and ground is +3.3V.
14) Adjust R1 (RPWRSET) until desired average optical
power is achieved.
15) The MD and BIAS currents can be monitored at TP1
(VPWRMON) and TP3 (VBIASMON) using the equations
below:
PWRSET
PWRMON
MD
R
2
V
I
×
=
Ω
×
=
350
V
9
I
BIASMON
BIAS
Note: If the voltage at TP1 exceeds VPMTH (typical
0.8V) or TP3 exceeds VBMTH (typical 0.8V), the
FAULT signal will be asserted and latched.
16) Adjust R2 (RMODSET) until the desired optical
amplitude is achieved. Optical amplitude can be
observed on an oscilloscope connected to an
optical/electrical converter. VCSEL overshoot and
ringing can be improved by appropriate selection of
R10 and C10, as described in the Design Procedure
section of the MAX3740 data sheet.
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COMPONENT
NAME
FUNCTION
D2
Fault Indicator
The LED is illuminated when a fault condition has occurred (refer to the Detailed
Description section of the MAX3740 data sheet).
JU1
COMP
Enables/disables the APC circuit. Remove the shunt to enable the APC circuit.
JU2
PHOTODIODE
Installing a shunt connects the photodiode of the VCSEL to the MD pin. Used
when a VCSEL is installed.
JU3
TX_DISABLE
Enable/disable the output currents. Install a shunt to enable output currents.
JU4
IPD
Determines the gain of the photodiode emulator. When JU4 is open, the gain is
0.02A/A. When JU4 is shunted, the gain is 0.12A/A.
JU5
APCOPEN
Installing a shunt connects the electrical output of the part to the emulation circuit.
JU6
FAULT
Installing a shunt enables the external fault-indicator circuit.
JU7
SQUELCH
Installing a shunt enables the squelch function.
JU8
POWER
Installing a shunt provides power to the part.
JU10
VCCEXT
Installing a shunt provides power to the emulation and fault-indicator circuits.
R1
RPWRSET
Adjusts transmit optical power to be maintained by the APC loop.
R2
RMODSET
Adjusts the laser modulation current.
R14
RPEAKSET
Adjusts the peaking for the falling edge of the VCSEL.
R15
RBIASSET
In a closed-loop configuration: adjusts the maximum bias current available to the
APC. In an open-loop configuration: adjusts the bias level of the output.
R16
RTC
Adjusts the temperature compensation of the modulation current.
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4 ________________________________________________________________________________________



JU6
FAULT
GND
TX_DISABLE
IN+
IN-
FAULT
SQUELCH
VCC
TC1
TC2
GND
MODSET
PEAKSET
GND
OUT-
OUT+
VCC
BIASSET
BIAS
PWRMON
REF
MD
COMP
VCC
BIASMON
1
2
3
4
5
6
7 8 9 10 11 12
14
15
16
17
18
192021222324
13
JU1
COMP
R1 10kΩ
PWRSET
R15 50k
Ω
BIASSET
R14 20k
Ω
PEAKSET
R2 10k
Ω
MOD
SET
R16 500kΩ
TC
JU5
APCOPEN
JU2
PHOTODIODE
JU4
IPD
JU7
SQUELCH
JU3
TX_DISABLE
TP2
REF
TP1
PWRMON
TP3
BIASMON
TP4
BIASSET
TP10
PEAKSET
TP9
MODSET
TP8
TC2
TP7
TC1
TP5
FAULT
C3
0.047
µ
F
C8
0.01µF
C11
0.01µF
C10
OPEN
C9
0.1µF
C12
0.01µF
C4
0.01µF
C13
0.1µF
C5
0.1µF
C6
0.01µF
R3
350Ω
R7
OPEN
R10
OPEN
R9
49.9Ω
R11
49.9Ω
R6
10kΩ
R4
2.49kΩ
R5
499Ω
2
37
4
6
R8
4.7kΩ
R12
499Ω
R13
10kΩ
L1
BLM18HD102SN1
L2
BLM18HD102SN1
Q1
FMMT491A
Q2
FMMT491A
U2
MAX495
J5
IN+
J7
IN-
J6
OUT
1
2 4
3
D1
VCSEL
PHOTODIODE
VCC1
VCC1
VCC1
VCCEXT
VCCEXT
VCC1
C15
0.1µF
C14
10µFC16
0.1µFC18
10µFC17
0.1µFC7
0.01µF
L3
BLM18HD102SN1
L4
1µHJU10
VCCEXT
VCCEXT
JU8
POWER
TP6
PORTEST
TP11
NOISEGEN
TP20
VCC
TP21
GND
C1
0.1µF
C2
0.1µF
J3
CALIN-
J1
CALIN+
J4
CALOUT-
J2
CALOUT+
D2
FAULT
U1
MAX3740A
R36
OPEN
R35
OPEN
R26
OPEN
R27
OPEN
R34
OPEN
VCC1
Q3
Figure 1. MAX3740A EV Kit Schematic Diagram
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_________________________________________________________________________________________ 5
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Figure 2. MAX3740A EV Kit Component Placement
Guide - Component Side
Figure 3. MAX3740A EV Kit PC Board Layout -
Solder Side
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Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
6 ___________________ Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
2003 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.
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Figure 4. MAX3740A EV Kit PC Board Layout -
Ground Plane
Figure 5. MAX3740A EV Kit PC Board Layout -
Power Plane