SLRS022A − DECEMBER 1976 − REVISED OCTOBER 1995
Copyright 1995, Texas Instruments Incorporated
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443
PERIPHERAL DRIVERS FOR
HIGH-VOLTAGE, HIGH-CURRENT DRIVER
APPLICATIONS
•Characterized for Use to 300 mA
•High-Voltage Outputs
•No Output Latch-Up at 30 V (After
Conducting 300 mA)
•Medium-Speed Switching
•Circuit Flexibility for Varied Applications
and Choice of Logic Function
•TTL-Compatible Diode-Clamped Inputs
•Standard Supply Voltages
•Plastic DIP (P) With Copper Lead Frame for
Cooler Operation and Improved Reliability
•Package Options Include Plastic Small
Outline Packages, Ceramic Chip Carriers,
and Standard Plastic and Ceramic 300-mil
DIPs
SUMMARY OF SERIES 55461/75461
DEVICE LOGIC PACKAGES
SN55461 AND FK, JG
SN55462 NAND FK, JG
SN55463 OR FK, JG
SN75461 AND D, P
SN75462 NAND D, P
SN75463 OR D, P
description
These dual peripheral drivers are functionally interchangeable with SN55451B through SN55453B and
SN75451B through SN75453B peripheral drivers, but are designed for use in systems that require higher
breakdown voltages than those devices can provide at the expense of slightly slower switching speeds. Typical
applications include logic buffers, power drivers, relay drivers, lamp drivers, MOS drivers, line drivers, and
memory drivers.
The SN55461/SN75461, SN55462/SN75462, and SN55463/SN75463 are dual peripheral AND, NAND, and
OR drivers respectively (assuming positive logic), with the output of the gates internally connected to the bases
of the npn output transistors.
Series SN55461 drivers are characterized for operation over the full military temperature range of − 55°C
to 125°C. Series SN75461 drivers are characterized for operation from 0°C to 70°C.
1
2
3
4
8
7
6
5
1A
1B
1Y
GND
VCC
2B
2A
2Y
SN55461, SN55462, SN55463 . . . JG PACKAGE
SN75461, SN75462, SN75463 ...D OR P PACKAGE
(TOP VIEW)
3 2 1 20 19
910111213
4
5
6
7
8
18
17
16
15
14
NC
2B
NC
2A
NC
NC
1B
NC
1Y
NC
SN55461, SN55462, SN55463 . . . FK PACKAGE
(TOP VIEW)
NC
1A
NC
NC NC
NC
GND
NC
NC − No internal connection
CC
V
2Y
! "#$ ! %#&'" ($)
(#"! " !%$""! %$ *$ $! $+! !#$!
!(( ,-) (#" %"$!!. ($! $"$!!'- "'#($
$!. '' %$$!)
SLRS022A − DECEMBER 1976 − REVISED OCTOBER 1995
2POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
SN55’ SN75’ UNIT
Supply voltage, VCC (see Note 1) 7 7 V
Input voltage, VI5.5 5.5 V
Intermitter voltage (see Note 2) 5.5 5.5 V
Off-state output voltage, VO35 35 V
Continuous collector or output current (see Note 3) 400 400 mA
Peak collector or output current (tw ≤ 10 ms, duty cycle ≤ 50%, see Note 4)
500
500
mA
Peak collector or output current (t
w
≤ 10 ms, duty cycle ≤ 50%, see Note 4) 500 500 mA
Continuous total power dissipation See Dissipation Rating Table
Operating free-air temperature range, TA−55 to 125 0 to 70 °C
Storage temperature range, Tstg −65 to 150 −65 to 150 °C
Case temperature for 60 seconds, TCFK package 260 °C
Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds JG package 300 °C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds D or P package 260 °C
†Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. Voltage values are with respect to network GND unless otherwise specified.
2. This is the voltage between two emitters A and B.
3. This value applies when the base-emitter resistance (RBE) is equal to or less than 500 Ω.
4. Both halves of these dual circuits may conduct rated current simultaneously; however, power dissipation averaged over a short time
interval must fall within the continuous dissipation rating.
DISSIPATION RATING TABLE
PACKAGE
TA
≤
25
°
C
DERATING FACTOR
TA = 70
°
C
TA = 125
°
C
PACKAGE
TA ≤ 25 C
POWER RATING
DERATING FACTOR
ABOVE TA = 25°C
TA = 70 C
POWER RATING
TA = 125 C
POWER RATING
D725 mW 5.8 mW/°C464 mW −
FK 1375 mW 11.0 mW/°C 880 mW 275 mW
JG 1050 mW 8.4 mW/°C 672 mW 210 mW
P1000 mW 8.0 mW/°C640 mW −
recommended operating conditions
SN55’ SN75’
UNIT
MIN NOM MAX MIN NOM MAX
UNIT
Supply voltage, VCC 4.5 5 5.5 4.75 5 5.25 V
High-level input voltage, VIH 2 2 V
Low-level input voltage, VIL 0.8 0.8 V
Operating free-air temperature, TA−55 125 0 70 °C
VCC
A
GND
Y
500 Ω
1 kΩ
B
4 kΩ1.6 kΩ130 Ω
schematic (each driver)
Resistor values shown are nominal.
SLRS022A − DECEMBER 1976 − REVISED OCTOBER 1995
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443
logic symbol†logic diagram (positive logic)
2B
2A
1B
1A
4
5
3
2Y
1Y
7
6
2
1
&
5
3
2B
2A
1B
1A
2Y
1Y
7
6
2
1
†This symbol is in accordance with ANSI/IEEE Std 91-1984
and IEC Publication 617-12.
P
in numbers shown are for D, JG, and P packages. GND
FUNCTION TABLE
(each driver)
ABY
L L L (on state)
LH L (on state)
HL L (on state)
H H H (off state)
positive logic:
Y = AB or A + B
electrical characteristics over recommended operating free-air temperature range
PARAMETER
TEST CONDITIONS†
SN55461 SN75461
UNIT
PARAMETER
TEST CONDITIONS†
MIN TYP‡MAX MIN TYP‡MAX
UNIT
VIK Input clamp voltage VCC = MIN, II = −12 mA −1.2 −1.5 −1.2 −1.5 V
IOH
High-level output current
VCC = MIN,
VIH = MIN,
300
100
A
IOH High-level output current
VCC = MIN,
VOH = 35 V
VIH = MIN,
300 100 µA
VCC = MIN, VIL = 0.8 V,
0.25
0.5
0.25
0.4
VOL
Low-level output voltage
VCC = MIN, VIL = 0.8 V,
IOL = 100 mA 0.25 0.5 0.25 0.4
V
VOL Low-level output voltage
VCC = MIN, VIL = 0.8 V,
0.5
0.8
0.5
0.7
V
VCC = MIN, VIL = 0.8 V,
IOL = 300 mA 0.5 0.8 0.5 0.7
IIInput current at maximum input voltage VCC = MAX, VI = 5.5 V 1 1 mA
IIH High-level input current VCC = MAX, VI = 2.4 V 40 40 µA
IIL Low-level input current VCC = MAX, VI = 0.4 V −1 −1.6 −1 −1.6 mA
ICCH Supply current, outputs high VCC = MAX, VI = 5 V 811 811 mA
ICCL Supply current, outputs low VCC = MAX, VI = 0 56 76 56 76 mA
†For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
‡All typical values are at VCC = 5 V, TA = 25°C.
switching characteristics, VCC = 5 V, TA = 25°C
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
tPLH Propagation delay time, low-to-high-level output 30 55
tPHL Propagation delay time, high-to-low-level output
IO
≈
200 mA,
CL = 15 pF,
25 40
ns
tTLH Transition time, low-to-high-level output
IO ≈ 200 mA,
RL = 50 Ω,
CL = 15 pF,
See Figure 1 8 20 ns
tTHL Transition time, high-to-low-level output
RL = 50 ,
See Figure 1
10 20
VOH
High-level output voltage after switching
SN55461
VS = 30 V,
IO
≈
300 mA,
VS−10
mV
V
OH
High-level output voltage after switching
SN75461
VS = 30 V,
See Figure 2
IO ≈ 300 mA,
VS−10
mV
VCC
A
GND
Y
500 Ω
1 kΩ
B
4 kΩ1.6 kΩ130 Ω
schematic (each driver)
Resistor values shown are nominal.
1 kΩ
1.6 kΩ
SLRS022A − DECEMBER 1976 − REVISED OCTOBER 1995
4POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443
logic symbol†logic diagram (positive logic)
2B
2A
1B
1A
4
5
3
GND
2Y
1Y
7
6
2
1
&
5
3
2B
2A
1B
1A
2Y
1Y
7
6
2
1
†This symbol is in accordance with ANSI/IEEE Std 91-1984
and IEC Publication 617-12.
P
in numbers shown are for D, JG, and P packages.
FUNCTION TABLE
(each driver)
ABY
L L H (off state)
LH H (off state)
HL H (off state)
H H L (on state)
positive logic:
Y = AB or A + B
electrical characteristics over recommended operating free-air temperature range
PARAMETER
TEST CONDITIONS†
SN55462 SN75462
UNIT
PARAMETER
TEST CONDITIONS†
MIN TYP‡MAX MIN TYP‡MAX
UNIT
VIK Input clamp voltage VCC = MIN, II = −12 mA −1.2 −1.5 −1.2 −1.5 V
IOH
High-level output current
VCC = MIN,
VIL = 0.8 V,
300
100
A
IOH High-level output current
VCC = MIN,
V
OH
= 35 V
VIL = 0.8 V,
300 100 µA
VCC = MIN, VIH = MIN,
0.25
0.5
0.25
0.4
VOL
Low-level output voltage
VCC = MIN, VIH = MIN,
I
OL
= 100 mA 0.25 0.5 0.25 0.4
V
VOL Low-level output voltage
VCC = MIN, VIH = MIN,
0.5
0.8
0.5
0.7
V
VCC = MIN, VIH = MIN,
I
OL
= 300 mA 0.5 0.8 0.5 0.7
IIInput current at maximum input voltage VCC = MAX, VI = 5.5 V 1 1 mA
IIH High-level input current VCC = MAX, VI = 2.4 V 40 40 µA
IIL Low-level input current VCC = MAX, VI = 0.4 V −1.1 −1.6 −1.1 −1.6 mA
ICCH Supply current, outputs high VCC = MAX, VI = 0 13 17 13 17 mA
ICCL Supply current, outputs low VCC = MAX, VI = 5 V 61 76 61 76 mA
†For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
‡All typical values are at VCC = 5 V, TA = 25°C.
switching characteristics, VCC = 5 V, TA = 25°C
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
tPLH Propagation delay time, low-to-high-level output 45 65
tPHL Propagation delay time, high-to-low-level output
IO
≈
200 mA,
CL = 15 pF,
30 50
ns
tTLH Transition time, low-to-high-level output
IO ≈ 200 mA,
RL = 50 Ω,
CL = 15 pF,
See Figure 1 13 25 ns
tTHL Transition time, high-to-low-level output
RL = 50 ,
See Figure 1
10 20
VOH
High-level output voltage after switching
SN55462
VS = 30 V,
IO
≈
300 mA,
VS−10
mV
V
OH
High-level output voltage after switching
SN75462
VS = 30 V,
See Figure 2
IO ≈ 300 mA,
VS−10
mV
schematic (each driver)
Resistor values shown are nominal.
VCC
A
GN
D
Y
500 Ω
1 kΩ
B
4 kΩ1.6 kΩ130 Ω4 kΩ
SLRS022A − DECEMBER 1976 − REVISED OCTOBER 1995
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443
logic symbol†logic diagram (positive logic)
2B
2A
1B
1A
4
5
3
GND
2Y
1Y
7
6
2
1
≥1
5
3
2B
2A
1B
1A
2Y
1Y
7
6
2
1
†
This symbol is in accordance with ANSI/IEEE Std 91-1984
and IEC Publication 617-12.
P
in numbers shown are for D, JG, and P packages.
FUNCTION TABLE
(each driver)
ABY
L L L (on state)
LH H (off state)
HL H (off state)
H H H (off state)
positive logic:
Y = A + B or A B
electrical characteristics over recommended operating free-air temperature range
PARAMETER
TEST CONDITIONS†
SN55463 SN75463
UNIT
PARAMETER
TEST CONDITIONS†
MIN TYP‡MAX MIN TYP‡MAX
UNIT
VIK Input clamp voltage VCC = MIN, II = −12 mA −1.2 −1.5 −1.2 −1.5 V
IOH
High-level output current
VCC = MIN,
VIH = MIN,
300
100
A
IOH High-level output current
VCC = MIN,
V
OH
= 35 V
VIH = MIN,
300 100 µA
VCC = MIN, VIL = 0.8 V,
0.25
0.5
0.25
0.4
VOL
Low-level output voltage
VCC = MIN, VIL = 0.8 V,
I
OL
= 100 mA 0.25 0.5 0.25 0.4
V
VOL Low-level output voltage
VCC = MIN, VIL = 0.8 V,
0.5
0.8
0.5
0.7
V
VCC = MIN, VIL = 0.8 V,
I
OL
= 300 mA 0.5 0.8 0.5 0.7
IIInput current at maximum input voltage VCC = MAX, VI = 5.5 V 1 1 mA
IIH High-level input current VCC = MAX, VI = 2.4 V 40 40 µA
IIL Low-level input current VCC = MAX, VI = 0.4 V −1 −1.6 −1 −1.6 mA
ICCH Supply current, outputs high VCC = MAX, VI = 5 V 811 811 mA
ICCL Supply current, outputs low VCC = MAX, VI = 0 58 76 58 76 mA
†For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
‡All typical values are at VCC = 5 V, TA = 25°C.
switching characteristics, VCC = 5 V, TA = 25°C
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
tPLH Propagation delay time, low-to-high-level output 30 55
tPHL Propagation delay time, high-to-low-level output
IO
≈
200 mA,
CL = 15 pF,
25 40
ns
tTLH Transition time, low-to-high-level output
IO ≈ 200 mA,
RL = 50 Ω,
CL = 15 pF,
See Figure 1 8 25 ns
tTHL Transition time, high-to-low-level output
RL = 50 ,
See Figure 1
10 25
VOH
High-level output voltage after switching
SN55463
VS = 30 V,
IO
≈
300 mA,
VS−10
mV
V
OH
High-level output voltage after switching
SN75463
VS = 30 V,
See Figure 2
IO ≈ 300 mA,
VS−10
mV
SLRS022A − DECEMBER 1976 − REVISED OCTOBER 1995
6POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443
PARAMETER MEASUREMENT INFORMATION
Generator
Pulse
GND
(see Note A)
2.4 VInput
SUB
10% 10%
90%90%
1.5 V1.5 V
≤ 5 ns
90% 90%
10%10%
1.5 V1.5 V
0.5 µs
10% 10%
90%90% 50% 50%
tPLH
tTHL
3 V
0 V
3 V
0 V
VOH
VOL
Output
Input
TEST CIRCUIT VOLTAGE WAVEFORMS
’461
’462
’463
0.4 V
CL = 15 pF
(see Note B)
Output
10 V
RL = 50 Ω
≤ 10 ns
≤ 5 ns ≤ 10 ns
tTLH
’461
’463
Input
’462
Circuit
Under
Test
(see Note B) tPHL
NOTES: A. The pulse generator has the following characteristics: PRR ≤ 1 MHz, ZO ≈ 50 Ω.
B. CL includes probe and jig capacitance.
Figure 1. Test Circuit and Voltage Waveforms for Switching Times
Generator
Pulse
GND
(see Note A)
2.4 VInput
SUB
90%90%
1.5 V1.5 V
≤ 5 ns
90% 90%
10%10%
1.5 V1.5 V
40 µs
10% 10%
3 V
0 V
3 V
0 V
VOH
’461
’462
’463
0.4 V
Output
VS = 30 V ≤ 10 ns
≤ 5 ns ≤ 10 ns
65 Ω
2 mH
1N3064
5 V
VOL
Circuit
Under
Test
(see Note B)
TEST CIRCUIT VOLTAGE WAVEFORMS
CL = 15 pF
(see Note B)
Output
Input
’461
’463
Input
’462
NOTES: A. The pulse generator has the following characteristics: PRR ≤ 12.5 kHz, ZO = 50 Ω.
B. CL includes probe and jig capacitance.
Figure 2. Test Circuit and Voltage Waveforms for Latch-Up Test
PACKAGING INFORMATION
Orderable Device Status (1) Package
Type Package
Drawing Pins Package
Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
JM38510/12908BPA ACTIVE CDIP JG 8 1 TBD A42 N / A for Pkg Type
JM38510/12909BPA OBSOLETE CDIP JG 8 TBD Call TI Call TI
SN55461JG OBSOLETE CDIP JG 8 TBD Call TI Call TI
SN55462JG OBSOLETE CDIP JG 8 TBD Call TI Call TI
SN55463JG OBSOLETE CDIP JG 8 TBD Call TI Call TI
SN75461D OBSOLETE SOIC D 8 TBD Call TI Call TI
SN75461P OBSOLETE PDIP P 8 TBD Call TI Call TI
SN75462D ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN75462DE4 ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN75462DG4 ACTIVE SOIC D 8 75 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN75462DR ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN75462DRE4 ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN75462DRG4 ACTIVE SOIC D 8 2500 Green (RoHS &
no Sb/Br) CU NIPDAU Level-1-260C-UNLIM
SN75462P ACTIVE PDIP P 8 50 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type
SN75462PE4 ACTIVE PDIP P 8 50 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type
SN75463D OBSOLETE SOIC D 8 TBD Call TI Call TI
SN75463DR OBSOLETE SOIC D 8 TBD Call TI Call TI
SN75463P ACTIVE PDIP P 8 50 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type
SN75463PE4 ACTIVE PDIP P 8 50 Pb-Free
(RoHS) CU NIPDAU N / A for Pkg Type
SNJ55461FK OBSOLETE LCCC FK 20 TBD Call TI Call TI
SNJ55461JG OBSOLETE CDIP JG 8 TBD Call TI Call TI
SNJ55462FK ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type
SNJ55462JG ACTIVE CDIP JG 8 1 TBD A42 N / A for Pkg Type
SNJ55463JG OBSOLETE CDIP JG 8 TBD Call TI Call TI
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
PACKAGE OPTION ADDENDUM
www.ti.com 15-Oct-2009
Addendum-Page 1
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
PACKAGE OPTION ADDENDUM
www.ti.com 15-Oct-2009
Addendum-Page 2
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0 (mm) B0 (mm) K0 (mm) P1
(mm) W
(mm) Pin1
Quadrant
SN75462DR SOIC D 8 2500 330.0 12.4 6.4 5.2 2.1 8.0 12.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 19-Mar-2008
Pack Materials-Page 1
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
SN75462DR SOIC D 8 2500 340.5 338.1 20.6
PACKAGE MATERIALS INFORMATION
www.ti.com 19-Mar-2008
Pack Materials-Page 2
MECHANICAL DATA
MLCC006B – OCTOBER 1996
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
FK (S-CQCC-N**) LEADLESS CERAMIC CHIP CARRIER
4040140/D 10/96
28 TERMINAL SHOWN
B
0.358
(9,09)
MAX
(11,63)
0.560
(14,22)
0.560
0.458
0.858
(21,8)
1.063
(27,0)
(14,22)
A
NO. OF
MINMAX
0.358
0.660
0.761
0.458
0.342
(8,69)
MIN
(11,23)
(16,26)
0.640
0.739
0.442
(9,09)
(11,63)
(16,76)
0.962
1.165
(23,83)
0.938
(28,99)
1.141
(24,43)
(29,59)
(19,32)(18,78)
**
20
28
52
44
68
84
0.020 (0,51)
TERMINALS
0.080 (2,03)
0.064 (1,63)
(7,80)
0.307
(10,31)
0.406
(12,58)
0.495
(12,58)
0.495
(21,6)
0.850
(26,6)
1.047
0.045 (1,14)
0.045 (1,14)
0.035 (0,89)
0.035 (0,89)
0.010 (0,25)
12
1314151618 17
11
10
8
9
7
5
432
0.020 (0,51)
0.010 (0,25)
6
12826 27
19
21
B SQ
A SQ 22
23
24
25
20
0.055 (1,40)
0.045 (1,14)
0.028 (0,71)
0.022 (0,54)
0.050 (1,27)
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a metal lid.
D. The terminals are gold plated.
E. Falls within JEDEC MS-004
MECHANICAL DATA
MCER001A – JANUARY 1995 – REVISED JANUAR Y 1997
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
JG (R-GDIP-T8) CERAMIC DUAL-IN-LINE
0.310 (7,87)
0.290 (7,37)
0.014 (0,36)
0.008 (0,20)
Seating Plane
4040107/C 08/96
5
4
0.065 (1,65)
0.045 (1,14)
8
1
0.020 (0,51) MIN
0.400 (10,16)
0.355 (9,00)
0.015 (0,38)
0.023 (0,58)
0.063 (1,60)
0.015 (0,38)
0.200 (5,08) MAX
0.130 (3,30) MIN
0.245 (6,22)
0.280 (7,11)
0.100 (2,54)
0°–15°
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a ceramic lid using glass frit.
D. Index point is provided on cap for terminal identification.
E. Falls within MIL STD 1835 GDIP1-T8
MECHANICAL DATA
MPDI001A – JANUARY 1995 – REVISED JUNE 1999
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
P (R-PDIP-T8) PLASTIC DUAL-IN-LINE
8
4
0.015 (0,38)
Gage Plane
0.325 (8,26)
0.300 (7,62)
0.010 (0,25) NOM
MAX
0.430 (10,92)
4040082/D 05/98
0.200 (5,08) MAX
0.125 (3,18) MIN
5
0.355 (9,02)
0.020 (0,51) MIN
0.070 (1,78) MAX
0.240 (6,10)
0.260 (6,60)
0.400 (10,60)
1
0.015 (0,38)
0.021 (0,53)
Seating Plane
M
0.010 (0,25)
0.100 (2,54)
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Falls within JEDEC MS-001
For the latest package information, go to http://www.ti.com/sc/docs/package/pkg_info.htm
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