SAMA5D2 SIP SAMA5D2 System-In-Package (SIP) MPU with up to 1Gbit DDR2 SDRAM Scope This document is an overview of the main features of the SAMA5D2 SIP. The sole reference documents for product information on the SAMA5D2 and the DDR2-SDRAM memories are listed in the table below. Introduction (R) (R) The SAMA5D2 System-In-Package (SIP) integrates the ARM Cortex -A5 processor-based SAMA5D2 MPU with up to 1 Gbit DDR2-SDRAM in a single package. By combining the high-performance, ultra-low-power SAMA5D2 with DDR2-SDRAM in a single package, PCB routing complexity, area and number of layers is reduced in the majority of cases. This makes board design easier and more robust by facilitating design for EMI, ESD and signal integrity. Three DDR2-SDRAM memory sizes are available: 128 Mbit, 512 Mbit and 1 Gbit. While the first option targets applications with a small OS or bare metal, the larger options are suitable for applications using Linux. The SAMA5D2 SIP is available in BGA196 and BGA289 package options. Reference Documents Type Document Title Available Ref. No. Datasheet SAMA5D2 Series www.microchip.com DS60001476 Datasheet 2M x 4 Banks x 16 bit DDR2 SDRAM (128 Mbit) www.winbond.com W9712G6KB Datasheet 8M x 4 Banks x 16 bit DDR2 SDRAM (512 Mbit) www.winbond.com W9751G6KB Datasheet 8M x 8 Banks x 16 bit DDR2 SDRAM (1 Gbit) www.winbond.com W971GG6SB (c) 2017 Microchip Technology Inc. Datasheet Complete DS60001484A-page 1 SAMA5D2 SIP Table of Contents Scope.............................................................................................................................. 1 Introduction......................................................................................................................1 Reference Documents.....................................................................................................1 1. Features.................................................................................................................... 3 2. DDR2-SDRAM Features........................................................................................... 6 3. Configuration Summary.............................................................................................7 4. Chip Identifier............................................................................................................ 8 5. Package and Ballout..................................................................................................9 6. DDR2-SDRAM Memory...........................................................................................27 7. Mechanical Characteristics......................................................................................28 7.1. 7.2. 289-ball TFBGA..........................................................................................................................28 196-ball TFBGA..........................................................................................................................29 8. Ordering Information................................................................................................30 9. Revision History.......................................................................................................31 The Microchip Web Site................................................................................................ 32 Customer Change Notification Service..........................................................................32 Customer Support......................................................................................................... 32 Product Identification System........................................................................................ 33 Microchip Devices Code Protection Feature................................................................. 33 Legal Notice...................................................................................................................34 Trademarks................................................................................................................... 34 Quality Management System Certified by DNV.............................................................35 Worldwide Sales and Service........................................................................................36 (c) 2017 Microchip Technology Inc. Datasheet Complete DS60001484A-page 2 SAMA5D2 SIP 1. Features * * * * * ARM Cortex-A5 core - ARMv7-A architecture - ARM TrustZone TM - NEON Media Processing Engine - Up to 500 MHz - ETM/ETB 8 Kbytes Memory Architecture - Memory Management Unit - 32-Kbyte L1 data cache, 32-Kbyte L1 instruction cache - 128-Kbyte L2 cache configurable to be used as an internal SRAM - DDR2-SDRAM memory up to 1 Gb - One 128-Kbyte scrambled internal SRAM - One 160-Kbyte internal ROM * 64-Kbyte scrambled and maskable ROM embedding boot loader/Secure boot loader * 96-Kbyte unscrambled, unmaskable ROM for NAND Flash BCH ECC table - High-bandwidth scramblable 16-bit Double Data Rate (DDR) multiport dynamic RAM controller supporting Winbond DDR2-SDRAM up to 1 Gb , including "on-the-fly" encryption/ decryption path - 8-bit SLC/MLC NAND controller, with up to 32-bit Error Correcting Code (PMECC) System running up to 166 MHz - Reset controller, shutdown controller, periodic interval timer, independent watchdog timer and secure Real-Time Clock (RTC) with clock calibration - One 600 to 1200 MHz PLL for the system and one 480 MHz PLL optimized for USB high speed - Digital fractional PLL for audio (11.2896 MHz and 12.288 MHz) - Internal low-power 12 MHz RC and 32 KHz typical RC - Selectable 32.768-Hz low-power oscillator and 8 to 24 MHz oscillator - 51 DMA Channels including two 16-channel 64-bit Central DMA Controllers - 64-bit Advanced Interrupt Controller (AIC) - 64-bit Secure Advanced Interrupt Controller (SAIC) - Three programmable external clock signals Low-Power Modes - Ultra Low-power mode with fast wakeup capability - Low-power Backup mode with 5-Kbyte SRAM and SleepWalkingTM features * Wakeup from up to nine wakeup pins, UART reception, analog comparison * Fast wakeup capability * Extended Backup mode with DDR2-SDRAM in Self-Refresh mode Peripherals - LCD TFT controller up to 1024x768, with four overlays, rotation, post-processing and alpha blending, 24-bit parallel RGB (c) 2017 Microchip Technology Inc. Datasheet Complete DS60001484A-page 3 SAMA5D2 SIP - - - - - - - * * ITU-R BT. 601/656/1120 Image Sensor Controller (ISC) supporting up to 5 M-pixel sensors with a parallel 12-bit interface for Raw Bayer, YCbCr, Monochrome and JPEG-compressed sensor interface Two Synchronous Serial Controllers (SSC), two Inter-IC Sound Controllers (I2SC), and one Stereo Class D amplifier One Peripheral Touch Controller (PTC) with up to 8 X-lines and 8 Y-lines (64-channel capacitive touch) One Pulse Density Modulation Interface Controller (PDMIC) One USB high-speed device port (UDPHS) and one USB high-speed host port or two USB high-speed host ports (UHPHS) One USB high-speed host port with a High-Speed Inter-Chip (HSIC) interface One 10/100 Ethernet MAC (GMAC) * Energy efficiency support (IEEE 802.3az standard) * Ethernet AVB support with IEEE802.1AS time stamping * IEEE802.1Qav credit-based traffic-shaping hardware support * IEEE1588 Precision Time Protocol (PTP) - Two high-speed memory card hosts: * SDMMC0: SD 3.0, eMMC 4.51, 8 bits * SDMMC1: SD 2.0, eMMC 4.41, 4 bits only - Two master/slave Serial Peripheral Interfaces (SPI) - Two Quad Serial Peripheral Interfaces (QSPI) - Five FLEXCOMs (USART, SPI and TWI) - Five UARTs - Two master CAN-FD (MCAN) controllers with SRAM-based mailboxes, and time- and eventtriggered transmission - One Rx only UART in backup area (RXLP) - One analog comparator (ACC) in backup area - Two 2-wire interfaces (TWIHS) up to 400 Kbits/s supporting the I2C protocol and SMBUS (TWIHS) - Two 3-channel 32-bit Timer/Counters (TC), supporting basic PWM modes - One full-featured 4-channel 16-bit Pulse Width Modulation (PWM) controller - One 12-channel, 12-bit, Analog-to-Digital Converter (ADC) with Resistive TouchScreen capability Safety - Zero-power Power-On Reset (POR) cells - Main crystal clock failure detector - Write-protected registers - Integrity Check Monitor (ICM) based on SHA256 - Memory Management Unit - Independent watchdog Security - 5 Kbytes of internal scrambled SRAM: * 1 Kbyte non-erasable on tamper detection * 4 Kbytes erasable on tamper detection - 256 bits of scrambled and erasable registers (c) 2017 Microchip Technology Inc. Datasheet Complete DS60001484A-page 4 SAMA5D2 SIP - - * * Up to eight tamper pins for static or dynamic intrusion detections Environmental monitors on specific versions: temperature, voltage, frequency and active die shield(1) - Secure Boot Loader(2) - On-the-fly AES encryption/decryption on DDR2-SDRAM and QSPI memories (AESB) - RTC including time-stamping on security intrusions - Programmable fuse box with 544 fuse bits (including JTAG protection and BMS) Hardware cryptography - SHA (SHA1, SHA224, SHA256, SHA384, SHA512): compliant with FIPS PUB 180-2 - AES: 256-, 192-, 128-bit key algorithm, compliant with FIPS PUB 197 - TDES: two-key or three-key algorithms, compliant with FIPS PUB 46-3 - True Random Number Generator (TRNG) compliant with NIST Special Publication 800-22 Test Suite and FIPS PUBs 140-2 and 140-3 Up to 128 I/Os - Fully programmable through set/clear registers - Multiplexing of up to eight peripheral functions per I/O line - Each I/O line can be assigned to a peripheral or used as a general purpose I/O - PIO controller features a synchronous output providing up to 32 bits of data output in one write operation Note: 1. 2. For environmental monitors, refer to the document SAMA5D23 and SAMA5D28 Environmental Monitors (document no. 44036), available under Non-Disclosure Agreement (NDA). Contact a Microchip sales representative for details. For secure boot strategies, refer to the document SAMA5D2 Series Secure Boot Strategy (document no. 44040), available under Non-Disclosure Agreement (NDA). Contact a Microchip sales representative for details. (c) 2017 Microchip Technology Inc. Datasheet Complete DS60001484A-page 5 SAMA5D2 SIP 2. DDR2-SDRAM Features * * * * * * * * * * * * * * * Power Supply: VDD, VDDQ = 1.8 V 0.1 V Double Data Rate architecture: two data transfers per clock cycle CAS Latency: 3 Burst Length: 8 Bi-directional, differential data strobes (DQS and DQSN) are transmitted/received with data Edge-aligned with Read data and center-aligned with Write data DLL aligns DQ and DQS transitions with clock Differential clock inputs (CLK and CLKN) Data masks (DM) for write data Commands entered on each positive CLK edge, data and data mask are referenced to both edges of DQS Auto-refresh and Self-refresh modes Precharged Powerdown and Active Powerdown Write Data Mask Write Latency = Read Latency - 1 (WL = RL - 1) Interface: SSTL_18 (c) 2017 Microchip Technology Inc. Datasheet Complete DS60001484A-page 6 SAMA5D2 SIP 3. Configuration Summary Table 3-1. Configuration Summary Feature SAMA5D225 Package TFBGA196 DDR2-SDRAM 128 Mb SMC SAMA5D27 SAMA5D28 TFBGA289 512 Mb 1 Gb 1 Gb Up to 16-bit Internal Memory Bus Width 16-bit PIOs 90 128 SRAM 128 Kbytes QSPI 2 LCD 24-bit RGB Camera Interface (ISC) 1 EMAC 1 PTC 4 X-lines x 8 Ylines 8 X-lines x 8 Y-lines CAN 1 2 USB 2 (2 Hosts or 1 Host/1 Device) 3 (2 Hosts/1 HSIC or 1 Host/1 Device/1 HSIC) 9/7/7 10 / 7 / 7 UART/SPI/I2C SDIO/SD/MMC 2 I2S/SSC/Class D/PDM 2/2/1/1 ADC Inputs 5 12 Timers 5 6 PWM 4 (PWM) + 5 (TC) 4 (PWM) + 6 (TC) 6 8 Tamper Pins AESB Environmental Monitors, Die Shield (c) 2017 Microchip Technology Inc. Yes - - Datasheet Complete Yes DS60001484A-page 7 SAMA5D2 SIP 4. Chip Identifier Table 4-1. SAMA5D2 SIP Chip ID Registers Chip Name CHIPID_CIDR CHIPID_EXID SAMA5D225C-D1M 0x8A5C08C2 0x00000053 SAMA5D27C-D5M 0x00000032 SAMA5D27C-D1G 0x00000033 SAMA5D28C-D1G 0x00000013 (c) 2017 Microchip Technology Inc. Datasheet Complete DS60001484A-page 8 SAMA5D2 SIP 5. Package and Ballout The SAMA5D2 SIP is available in the packages listed below. Important: SAMA5D2 SIP devices are not pin-to-pin compatible with SAMA5D2 devices. For mechanical characteristics of the TFBGA196, refer to the SAMA5D2 Series Datasheet, ref. no. DS60001476, available via www.microchip.com. For mechanical characteristics of the TFBGA289, see Mechanical Characteristics. Table 5-1. Packages Package Name Ball Count Ball Pitch Package Size TFBGA196 196 0.75 mm 11 x 11 (mm) TFBGA289 289 0.8 mm 14 x 14 (mm) Table 5-2. Ball Description 289-ball BGA 196-ball BGA Power Rail I/O Type Primary Signal Alternate Dir Signal PIO Peripheral Dir Func Signal Reset State Dir IO Set (Signal, Dir, PU, PD, HiZ, ST)(1) U13 N7 U14 T13 U15 U16 U17 M8 F7 L8 G8 K8 P9 P10 VDDSDMMC VDDSDMMC VDDSDMMC VDDSDMMC VDDSDMMC VDDSDMMC VDDSDMMC GPIO_EMMC GPIO_EMMC GPIO_EMMC GPIO_EMMC GPIO_EMMC GGPIO_EMMC GPIO_EMMC (c) 2017 Microchip Technology Inc. PA0 PA1 PA2 PA3 PA4 PA5 PA6 I/O I/O I/O I/O I/O I/O I/O - - - - - - - - - - - - - - A SDMMC0_CK I/O 1 B QSPI0_SCK O 1 F D0 I/O 2 A SDMMC0_CMD I/O 1 B QSPI0_CS O 1 F D1 I/O 2 A SDMMC0_DAT0 I/O 1 B QSPI0_IO0 I/O 1 F D2 I/O 2 A SDMMC0_DAT1 I/O 1 B QSPI0_IO1 I/O 1 F D3 I/O 2 A SDMMC0_DAT2 I/O 1 B QSPI0_IO2 I/O 1 F D4 I/O 2 A SDMMC0_DAT3 I/O 1 B QSPI0_IO3 I/O 1 F D5 I/O 2 A SDMMC0_DAT4 I/O 1 B QSPI1_SCK O 1 D TIOA5 I/O 1 E FLEXCOM2_IO0 I/O 1 Datasheet Complete PIO, I, PU, ST PIO, I, PU, ST PIO, I, PU, ST PIO, I, PU, ST PIO, I, PU, ST PIO, I, PU, ST PIO, I, PU, ST DS60001484A-page 9 SAMA5D2 SIP 289-ball BGA 196-ball BGA Power Rail I/O Type Primary Signal Alternate Dir Signal PIO Peripheral Dir Func Signal Reset State Dir IO Set (Signal, Dir, PU, PD, HiZ, ST)(1) R11 R9 P8 R10 P15 N17 P16 M17 N16 P11 K9 J9 N14 N13 L12 M14 J10 L14 VDDSDMMC VDDSDMMC VDDSDMMC VDDSDMMC VDDIOP1 VDDIOP1 VDDIOP1 VDDIOP1 VDDIOP1 GPIO_EMMC GPIO_EMMC GPIO_EMMC GPIO_EMMC GPIO GPIO GPIO GPIO_QSPI GPIO (c) 2017 Microchip Technology Inc. PA7 PA8 PA9 PA10 PA11 PA12 PA13 PA14 PA15 I/O I/O I/O I/O I/O I/O I/O I/O I/O - - - - - - - - - - - - - - - - - - F D6 I/O 2 A SDMMC0_DAT5 I/O 1 B QSPI1_IO0 I/O 1 D TIOB5 I/O 1 E FLEXCOM2_IO1 I/O 1 F D7 I/O 2 A SDMMC0_DAT6 I/O 1 B QSPI1_IO1 I/O 1 D TCLK5 I 1 E FLEXCOM2_IO2 I/O 1 F NWE/NANDWE O 2 A SDMMC0_DAT7 I/O 1 B QSPI1_IO2 I/O 1 D TIOA4 I/O 1 E FLEXCOM2_IO3 O 1 F NCS3 O 2 A SDMMC0_RSTN O 1 B QSPI1_IO3 I/O 1 D TIOB4 I/O 1 E FLEXCOM2_IO4 O 1 F A21/NANDALE O 2 A SDMMC0_1V8SEL O 1 B QSPI1_CS O 1 D TCLK4 I 1 F A22/NANDCLE O 2 A SDMMC0_WP I 1 B IRQ I 1 F NRD/NANDOE O 2 A SDMMC0_CD I 1 E FLEXCOM3_IO1 I/O 1 F D8 I/O 2 A SPI0_SPCK I/O 1 B TK1 I/O 1 C QSPI0_SCK O 2 D I2SC1_MCK O 2 E FLEXCOM3_IO2 I/O 1 F D9 I/O 2 A SPI0_MOSI I/O 1 B TF1 I/O 1 C QSPI0_CS O 2 D I2SC1_CK I/O 2 Datasheet Complete PIO, I, PU, ST PIO, I, PU, ST PIO, I, PU, ST PIO, I, PU, ST PIO, I, PU, ST PIO, I, PU, ST PIO, I, PU, ST PIO, I, PU, ST PIO, I, PU, ST DS60001484A-page 10 SAMA5D2 SIP 289-ball BGA 196-ball BGA Power Rail I/O Type Primary Signal Alternate Dir Signal PIO Peripheral Dir Func Signal Reset State Dir IO Set (Signal, Dir, PU, PD, HiZ, ST)(1) M11 N14 T16 T15 P9 P10 T17 H14 K14 L9 P12 H9 G9 K10 VDDIOP1 VDDIOP1 VDDIOP1 VDDIOP1 VDDIOP1 VDDIOP1 VDDIOP1 GPIO_IO GPIO_IO GPIO_IO GPIO_IO GPIO_IO GPIO_IO GPIO_QSPI (c) 2017 Microchip Technology Inc. PA16 PA17 PA18 PA19 PA20 PA21 PA22 I/O I/O I/O I/O I/O I/O I/O - - - - - - - - - - - - - - E FLEXCOM3_IO0 I/O 1 F D10 I/O 2 A SPI0_MISO I/O 1 B TD1 O 1 C QSPI0_IO0 I/O 2 D I2SC1_WS I/O 2 E FLEXCOM3_IO3 O 1 F D11 I/O 2 A SPI0_NPCS0 I/O 1 B RD1 I 1 C QSPI0_IO1 I/O 2 D I2SC1_DI0 I 2 E FLEXCOM3_IO4 O 1 F D12 I/O 2 A SPI0_NPCS1 O 1 B RK1 I/O 1 C QSPI0_IO2 I/O 2 D I2SC1_DO0 O 2 E SDMMC1_DAT0 I/O 1 F D13 I/O 2 A SPI0_NPCS2 O 1 B RF1 I/O 1 C QSPI0_IO3 I/O 2 D TIOA0 I/O 1 E SDMMC1_DAT1 I/O 1 F D14 I/O 2 A SPI0_NPCS3 O 1 D TIOB0 I/O 1 E SDMMC1_DAT2 I/O 1 F D15 I/O 2 A IRQ I 2 B PCK2 O 3 D TCLK0 I 1 E SDMMC1_DAT3 I/O 1 F NANDRDY I 2 A FLEXCOM1_IO2 I/O 1 B D0 I/O 1 C TCK I 4 D SPI1_SPCK I/O 2 E SDMMC1_CK I/O 1 F QSPI0_SCK O 3 Datasheet Complete PIO, I, PU, ST PIO, I, PU, ST PIO, I, PU, ST PIO, I, PU, ST PIO, I, PU, ST PIO, I, PU, ST PIO, I, PU, ST DS60001484A-page 11 SAMA5D2 SIP 289-ball BGA 196-ball BGA Power Rail I/O Type Primary Signal Alternate Dir Signal PIO Peripheral Dir Func Signal Reset State Dir IO Set (Signal, Dir, PU, PD, HiZ, ST)(1) T14 R17 R16 P17 R15 R14 P14 R13 G10 P13 H10 L10 P14 N12 M12 N11 VDDIOP1 VDDIOP1 VDDIOP1 VDDIOP1 VDDIOP1 VDDIOP1 VDDIOP1 VDDIOP1 GPIO GPIO_IO GPIO_IO GPIO_IO GPIO_IO GPIO GPIO GPIO (c) 2017 Microchip Technology Inc. PA23 PA24 PA25 PA26 PA27 PA28 PA29 PA30 I/O I/O I/O I/O I/O I/O I/O I/O - - - - - - - - - - - - - - - - A FLEXCOM1_IO1 I/O 1 B D1 I/O 1 C TDI I 4 D SPI1_MOSI I/O 2 F QSPI0_CS O 3 A FLEXCOM1_IO0 I/O 1 B D2 I/O 1 C TDO O 4 D SPI1_MISO I/O 2 F QSPI0_IO0 I/O 3 A FLEXCOM1_IO3 O 1 B D3 I/O 1 C TMS I 4 D SPI1_NPCS0 I/O 2 F QSPI0_IO1 I/O 3 A FLEXCOM1_IO4 O 1 B D4 I/O 1 C NTRST I 4 D SPI1_NPCS1 O 2 F QSPI0_IO2 I/O 3 A TIOA1 I/O 2 B D5 I/O 1 C SPI0_NPCS2 O 2 D SPI1_NPCS2 O 2 E SDMMC1_RSTN O 1 F QSPI0_IO3 I/O 3 A TIOB1 I/O 2 B D6 I/O 1 C SPI0_NPCS3 O 2 D SPI1_NPCS3 O 2 E SDMMC1_CMD I/O 1 F CLASSD_L0 O 1 A TCLK1 I 2 B D7 I/O 1 C SPI0_NPCS1 O 2 E SDMMC1_WP I 1 F CLASSD_L1 O 1 B NWE/NANDWE O 1 C SPI0_NPCS0 I/O 2 D PWMH0 O 1 E SDMMC1_CD I 1 Datasheet Complete PIO, I, PU, ST PIO, I, PU, ST PIO, I, PU, ST PIO, I, PU, ST PIO, I, PU, ST PIO, I, PU, ST PIO, I, PU, ST PIO, I, PU, ST DS60001484A-page 12 SAMA5D2 SIP 289-ball BGA 196-ball BGA Power Rail I/O Type Primary Signal Alternate Dir Signal PIO Peripheral Dir Func Signal Reset State Dir IO Set (Signal, Dir, PU, PD, HiZ, ST)(1) P13 F5 C8 C7 B8 B7 A10 A9 D5 E5 M11 E6 D6 C6 C5 D5 D7 C8 D9 C7 VDDIOP1 VDDIOP0 VDDIOP0 VDDIOP0 VDDIOP0 VDDIOP0 VDDIOP0 VDDIOP0 VDDIOP0 VDDIOP0 GPIO GPIO GPIO GPIO GPIO GPIO GPIO_QSPI GPIO GPIO_IO GPIO_IO (c) 2017 Microchip Technology Inc. PA31 PB0 PB1 PB2 PB3 PB4 PB5 PB6 PB7 PB8 I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O - - - - - - - - - - - - - - - - - - - - F CLASSD_L2 O 1 B NCS3 O 1 C SPI0_MISO I/O 2 D PWML0 O 1 F CLASSD_L3 O 1 B A21/NANDALE O 1 C SPI0_MOSI I/O 2 D PWMH1 O 1 B A22/NANDCLE O 1 C SPI0_SPCK I/O 2 D PWML1 O 1 F CLASSD_R0 O 1 B NRD/NANDOE O 1 D PWMFI0 I 1 F CLASSD_R1 O 1 A URXD4 I 1 B D8 I/O 1 C IRQ I 3 D PWMEXTRG1 I 1 F CLASSD_R2 O 1 A UTXD4 O 1 B D9 I/O 1 C FIQ I 4 F CLASSD_R3 O 1 A TCLK2 I 1 B D10 I/O 1 C PWMH2 O 1 D QSPI1_SCK O 2 F GTSUCOMP O 3 A TIOA2 I/O 1 B D11 I/O 1 C PWML2 O 1 D QSPI1_CS O 2 F GTXER O 3 A TIOB2 I/O 1 B D12 I/O 1 C PWMH3 O 1 D QSPI1_IO0 I/O 2 F GRXCK I 3 A TCLK3 I 1 B D13 I/O 1 Datasheet Complete PIO, I, PU, ST PIO, I, PU, ST PIO, I, PU, ST PIO, I, PU, ST PIO, I, PU, ST PIO, I, PU, ST PIO, I, PU, ST PIO, I, PU, ST PIO, I, PU, ST PIO, I, PU, ST DS60001484A-page 13 SAMA5D2 SIP 289-ball BGA 196-ball BGA Power Rail I/O Type Primary Signal Alternate Dir Signal PIO Peripheral Dir Func Signal Reset State Dir IO Set (Signal, Dir, PU, PD, HiZ, ST)(1) C6 A8 A7 B6 C5 A6 E4 B5 C9 F6 B9 B8 B7 G6 B5 C4 VDDIOP0 VDDIOP0 VDDIOP0 VDDIOP0 VDDIOP0 VDDIOP0 VDDIOP0 VDDIOP0 GPIO_IO GPIO_IO GPIO GPIO GPIO GPIO_QSPI GPIO GPIO_IO (c) 2017 Microchip Technology Inc. PB9 PB10 PB11 PB12 PB13 PB14 PB15 PB16 I/O I/O I/O I/O I/O I/O I/O I/O - - - - - - - - - - - - - - - - C PWML3 O 1 D QSPI1_IO1 I/O 2 F GCRS I 3 A TIOA3 I/O 1 B D14 I/O 1 C PWMFI1 I 1 D QSPI1_IO2 I/O 2 F GCOL I 3 A TIOB3 I/O 1 B D15 I/O 1 C PWMEXTRG2 I 1 D QSPI1_IO3 I/O 2 F GRX2 I 3 A LCDDAT0 O 1 B A0/NBS0 O 1 C URXD3 I 3 D PDMIC_DAT F GRX3 I 3 A LCDDAT1 O 1 B A1 O 1 C UTXD3 O 3 D PDMIC_CLK F GTX2 O 3 A LCDDAT2 O 1 B A2 O 1 C PCK1 O 3 F GTX3 O 3 A LCDDAT3 O 1 B A3 O 1 C TK1 I/O 2 D I2SC1_MCK O 1 E QSPI1_SCK O 3 F GTXCK I/O 3 A LCDDAT4 O 1 B A4 O 1 C TF1 I/O 2 D I2SC1_CK I/O 1 E QSPI1_CS O 3 F GTXEN O 3 A LCDDAT5 O 1 B A5 O 1 Datasheet Complete PIO, I, PU, ST PIO, I, PU, ST PIO, I, PU, ST 2 PIO, I, PU, ST 2 PIO, I, PU, ST PIO, I, PU, ST PIO, I, PU, ST PIO, I, PU, ST DS60001484A-page 14 SAMA5D2 SIP 289-ball BGA 196-ball BGA Power Rail I/O Type Primary Signal Alternate Dir Signal PIO Peripheral Dir Func Signal Reset State Dir IO Set (Signal, Dir, PU, PD, HiZ, ST)(1) C4 A5 B4 A4 D3 C3 B3 A5 B4 A6 A4 A3 D3 B2 VDDIOP0 VDDIOP0 VDDIOP0 VDDIOP0 VDDIOP0 VDDIOP0 VDDIOP0 GPIO_IO GPIO_IO GPIO_IO GPIO GPIO GPIO GPIO (c) 2017 Microchip Technology Inc. PB17 PB18 PB19 PB20 PB21 PB22 PB23 I/O I/O I/O I/O I/O I/O I/O - - - - - - - - - - - - - - C TD1 O 2 D I2SC1_WS I/O 1 E QSPI1_IO0 I/O 3 F GRXDV I 3 A LCDDAT6 O 1 B A6 O 1 C RD1 I 2 D I2SC1_DI0 I 1 E QSPI1_IO1 I/O 3 F GRXER I 3 A LCDDAT7 O 1 B A7 O 1 C RK1 I/O 2 D I2SC1_DO0 O 1 E QSPI1_IO2 I/O 3 F GRX0 I 3 A LCDDAT8 O 1 B A8 O 1 C RF1 I/O 2 D TIOA3 I/O 2 E QSPI1_IO3 I/O 3 F GRX1 I 3 A LCDDAT9 O 1 B A9 O 1 C TK0 I/O 1 D TIOB3 I/O 2 E PCK1 O 4 F GTX0 O 3 A LCDDAT10 O 1 B A10 O 1 C TF0 I/O 1 D TCLK3 I 2 E FLEXCOM3_IO2 I/O 3 F GTX1 O 3 A LCDDAT11 O 1 B A11 O 1 C TD0 O 1 D TIOA2 I/O 2 E FLEXCOM3_IO1 I/O 3 F GMDC O 3 A LCDDAT12 O 1 Datasheet Complete PIO, I, PU, ST PIO, I, PU, ST PIO, I, PU, ST PIO, I, PU, ST PIO, I, PU, ST PIO, I, PU, ST PIO, I, PU, ST DS60001484A-page 15 SAMA5D2 SIP 289-ball BGA 196-ball BGA Power Rail I/O Type Primary Signal Alternate Dir Signal PIO Peripheral Dir Func Signal Reset State Dir IO Set (Signal, Dir, PU, PD, HiZ, ST)(1) E2 A3 G3 F4 D2 G8 C2 E3 E2 D4 C3 D2 B3 F3 VDDIOP0 VDDIOP0 VDDIOP0 VDDIOP0 VDDIOP0 VDDIOP0 VDDIOP0 GPIO GPIO GPIO GPIO GPIO GPIO GPIO (c) 2017 Microchip Technology Inc. PB24 PB25 PB26 PB27 PB28 PB29 PB30 I/O I/O I/O I/O I/O I/O I/O - - - - - - - - - - - - - - B A12 O 1 C RD0 I 1 D TIOB2 I/O 2 E FLEXCOM3_IO0 I/O 3 F GMDIO I/O 3 A LCDDAT13 O 1 B A13 O 1 C RK0 I/O 1 D TCLK2 I 2 E FLEXCOM3_IO3 O 3 F ISC_D10 I 3 A LCDDAT14 O 1 B A14 O 1 C RF0 I/O 1 E FLEXCOM3_IO4 O 3 F ISC_D11 I 3 A LCDDAT15 O 1 B A15 O 1 C URXD0 I 1 D PDMIC_DAT F ISC_D0 I 3 A LCDDAT16 O 1 B A16 O 1 C UTXD0 O 1 D PDMIC_CLK F ISC_D1 I 3 A LCDDAT17 O 1 B A17 O 1 C FLEXCOM0_IO0 I/O 1 D TIOA5 I/O 2 F ISC_D2 I 3 A LCDDAT18 O 1 B A18 O 1 C FLEXCOM0_IO1 I/O 1 D TIOB5 I/O 2 F ISC_D3 I 3 A LCDDAT19 O 1 B A19 O 1 C FLEXCOM0_IO2 I/O 1 D TCLK5 I 2 F ISC_D4 I 3 Datasheet Complete PIO, I, PU, ST PIO, I, PU, ST PIO, I, PU, ST 1 PIO, I, PU, ST 1 PIO, I, PU, ST PIO, I, PU, ST PIO, I, PU, ST DS60001484A-page 16 SAMA5D2 SIP 289-ball BGA 196-ball BGA Power Rail I/O Type Primary Signal Alternate Dir Signal PIO Peripheral Dir Func Signal Reset State Dir IO Set (Signal, Dir, PU, PD, HiZ, ST)(1) G7 N10 N11 N9 M10 N15 M16 L11 A2 L13 H11 L11 F13 G14 J14 J13 VDDIOP0 VDDIOP1 VDDIOP1 VDDIOP1 VDDIOP1 VDDIOP1 VDDIOP1 VDDIOP1 GPIO GPIO GPIO GPIO GPIO GPIO GPIO GPIO (c) 2017 Microchip Technology Inc. PB31 PC0 PC1 PC2 PC3 PC4 PC5 PC6 I/O I/O I/O I/O I/O I/O I/O I/O - - - - - - - - - - - - - - - - A LCDDAT20 O 1 B A20 O 1 C FLEXCOM0_IO3 O 1 D TWD0 I/O 1 F ISC_D5 I 3 A LCDDAT21 O 1 B A23 O 1 C FLEXCOM0_IO4 O 1 D TWCK0 I/O 1 F ISC_D6 I 3 A LCDDAT22 O 1 B A24 O 1 C CANTX0 O 1 D SPI1_SPCK I/O 1 E I2SC0_CK I/O 1 F ISC_D7 I 3 A LCDDAT23 O 1 B A25 O 1 C CANRX0 I 1 D SPI1_MOSI I/O 1 E I2SC0_MCK O 1 F ISC_D8 I 3 A LCDPWM O 1 B NWAIT I 1 C TIOA1 I/O 1 D SPI1_MISO I/O 1 E I2SC0_WS I/O 1 F ISC_D9 I 3 A LCDDISP O 1 B NWR1/NBS1 O 1 C TIOB1 I/O 1 D SPI1_NPCS0 I/O 1 E I2SC0_DI0 I 1 F ISC_PCK I 3 A LCDVSYNC O 1 B NCS0 O 1 C TCLK1 I 1 D SPI1_NPCS1 O 1 E I2SC0_DO0 O 1 F ISC_VSYNC I 3 A LCDHSYNC O 1 Datasheet Complete PIO, I, PU, ST PIO, I, PU, ST PIO, I, PU, ST PIO, I, PU, ST PIO, I, PU, ST PIO, I, PU, ST PIO, I, PU, ST PIO, I, PU, ST DS60001484A-page 17 SAMA5D2 SIP 289-ball BGA 196-ball BGA Power Rail I/O Type Primary Signal Alternate Dir Signal PIO Peripheral Dir Func Signal Reset State Dir IO Set (Signal, Dir, PU, PD, HiZ, ST)(1) M15 M13 B2 G4 A2 A1 B1 F14 K13 - - - - - VDDIOP1 VDDIOP1 VDDISC VDDISC VDDISC VDDISC VDDISC GPIO_CLK GPIO GPIO GPIO GPIO GPIO GPIO (c) 2017 Microchip Technology Inc. PC7 PC8 PC9 PC10 PC11 PC12 PC13 I/O I/O I/O I/O I/O I/O I/O - - - - - - - - - - - - - - B NCS1 O 1 C TWD1 I/O 1 D SPI1_NPCS2 O 1 F ISC_HSYNC I 3 A LCDPCK O 1 B NCS2 O 1 C TWCK1 I/O 1 D SPI1_NPCS3 O 1 E URXD1 I 2 F ISC_MCK O 3 A LCDDEN O 1 B NANDRDY I 1 C FIQ I 1 D PCK0 O 3 E UTXD1 O 2 F ISC_FIELD I 3 A FIQ I 3 B GTSUCOMP O 1 C ISC_D0 I 1 D TIOA4 I/O 2 A LCDDAT2 O 2 B GTXCK I/O 1 C ISC_D1 I 1 D TIOB4 I/O 2 E CANTX0 O 2 A LCDDAT3 O 2 B GTXEN O 1 C ISC_D2 I 1 D TCLK4 I 2 E CANRX0 I 2 F A0/NBS0 O 2 A LCDDAT4 O 2 B GRXDV I 1 C ISC_D3 I 1 D URXD3 I 1 E TK0 I/O 2 F A1 O 2 A LCDDAT5 O 2 B GRXER I 1 C ISC_D4 I 1 D UTXD3 O 1 Datasheet Complete PIO, I, PU, ST PIO, I, PU, ST PIO, I, PU, ST PIO, I, PU, ST PIO, I, PU, ST PIO, I, PU, ST PIO, I, PU, ST DS60001484A-page 18 SAMA5D2 SIP 289-ball BGA 196-ball BGA Power Rail I/O Type Primary Signal Alternate Dir Signal PIO Peripheral Dir Func Signal Reset State Dir IO Set (Signal, Dir, PU, PD, HiZ, ST)(1) G5 G2 G6 C1 G9 D1 H4 E1 - - - - - - - - VDDISC VDDISC VDDISC VDDISC VDDISC VDDISC VDDISC VDDISC GPIO GPIO GPIO GPIO GPIO GPIO GPIO GPIO (c) 2017 Microchip Technology Inc. PC14 PC15 PC16 PC17 PC18 PC19 PC20 PC21 I/O I/O I/O I/O I/O I/O I/O I/O - - - - - - - - - - - - - - - - E TF0 I/O 2 F A2 O 2 A LCDDAT6 O 2 B GRX0 I 1 C ISC_D5 I 1 E TD0 O 2 F A3 O 2 A LCDDAT7 O 2 B GRX1 I 1 C ISC_D6 I 1 E RD0 I 2 F A4 O 2 A LCDDAT10 O 2 B GTX0 O 1 C ISC_D7 I 1 E RK0 I/O 2 F A5 O 2 A LCDDAT11 O 2 B GTX1 O 1 C ISC_D8 I 1 E RF0 I/O 2 F A6 O 2 A LCDDAT12 O 2 B GMDC O 1 C ISC_D9 I 1 E FLEXCOM3_IO2 I/O 2 F A7 O 2 A LCDDAT13 O 2 B GMDIO I/O 1 C ISC_D10 I 1 E FLEXCOM3_IO1 I/O 2 F A8 O 2 A LCDDAT14 O 2 B GRXCK I 1 C ISC_D11 I 1 E FLEXCOM3_IO0 I/O 2 F A9 O 2 A LCDDAT15 O 2 B GTXER O 1 C ISC_PCK I 1 E FLEXCOM3_IO3 O 2 Datasheet Complete PIO, I, PU, ST PIO, I, PU, ST PIO, I, PU, ST PIO, I, PU, ST PIO, I, PU, ST PIO, I, PU, ST PIO, I, PU, ST PIO, I, PU, ST DS60001484A-page 19 SAMA5D2 SIP 289-ball BGA 196-ball BGA Power Rail I/O Type Primary Signal Alternate Dir Signal PIO Peripheral Dir Func Signal Reset State Dir IO Set (Signal, Dir, PU, PD, HiZ, ST)(1) F1 H9 G1 H8 F7 B10 F6 B9 E6 A11 - - - - - - - - - - VDDISC VDDISC VDDISC VDDISC VDDIOP2 VDDIOP2 VDDIOP2 VDDIOP2 VDDIOP2 VDDIOP2 GPIO GPIO GPIO_CLK GPIO GPIO GPIO GPIO GPIO GPIO GPIO (c) 2017 Microchip Technology Inc. PC22 PC23 PC24 PC25 PC26 PC27 PC28 PC29 PC30 PC31 I/O I/O I/O I/O I/O I/O I/O I/O I/O I/O - - - - - - - - - - - - - - - - - - - - F A10 O 2 A LCDDAT18 O 2 B GCRS I 1 C ISC_VSYNC I 1 E FLEXCOM3_IO4 O 2 F A11 O 2 A LCDDAT19 O 2 B GCOL I 1 C ISC_HSYNC I 1 F A12 O 2 A LCDDAT20 O 2 B GRX2 I 1 C ISC_MCK O 1 F A13 O 2 A LCDDAT21 O 2 B GRX3 I 1 C ISC_FIELD I 1 F A14 O 2 A LCDDAT22 O 2 B GTX2 O 1 D CANTX1 O 1 F A15 O 2 A LCDDAT23 O 2 B GTX3 O 1 C PCK1 O 2 D CANRX1 I 1 E TWD0 I/O 2 F A16 O 2 A LCDPWM O 2 B FLEXCOM4_IO0 I/O 1 C PCK2 O 1 E TWCK0 I/O 2 F A17 O 2 A LCDDISP O 2 B FLEXCOM4_IO1 I/O 1 F A18 O 2 A LCDVSYNC O 2 B FLEXCOM4_IO2 I/O 1 F A19 O 2 A LCDHSYNC O 2 B FLEXCOM4_IO3 O 1 Datasheet Complete PIO, I, PU, ST PIO, I, PU, ST PIO, I, PU, ST PIO, I, PU, ST PIO, I, PU, ST PIO, I, PU, ST PIO, I, PU, ST PIO, I, PU, ST PIO, I, PU, ST PIO, I, PU, ST DS60001484A-page 20 SAMA5D2 SIP 289-ball BGA 196-ball BGA Power Rail I/O Type Primary Signal Alternate Dir Signal PIO Peripheral Dir Func Signal Reset State Dir IO Set (Signal, Dir, PU, PD, HiZ, ST)(1) E7 C9 D8 J1 H7 H1 J2 H6 K3 - - - - - - - H5 J2 VDDIOP2 VDDIOP2 VDDIOP2 VDDANA VDDANA VDDANA VDDANA VDDANA VDDANA GPIO_CLK GPIO GPIO_CLK GPIO_AD GPIO_AD GPIO_AD GPIO_AD GPIO_AD GPIO_AD (c) 2017 Microchip Technology Inc. PD0 PD1 PD2 PD3 PD4 PD5 PD6 PD7 PD8 I/O I/O I/O I/O I/O I/O I/O I/O I/O - - - - - - - - - - - - - - - - - - C URXD3 I 2 F A20 O 2 A LCDPCK O 2 B FLEXCOM4_IO4 O 1 C UTXD3 O 2 D GTSUCOMP O 2 F A23 O 2 A LCDDEN O 2 D GRXCK I 2 F A24 O 2 A URXD1 I 1 D GTXER O 2 E ISC_MCK O 2 F A25 O 2 A UTXD1 O 1 B FIQ I 2 D GCRS I 2 E ISC_D11 I 2 F NWAIT I 2 A TWD1 I/O 2 B URXD2 I 1 D GCOL I 2 E ISC_D10 I 2 F NCS0 O 2 A TWCK1 I/O 2 B UTXD2 O 1 D GRX2 I 2 E ISC_D9 I 2 F NCS1 O 2 A TCK I 2 B PCK1 O 1 D GRX3 I 2 E ISC_D8 I 2 F NCS2 O 2 A TDI I 2 C UTMI_RXVAL O 1 D GTX2 O 2 E ISC_D0 I 2 F NWR1/NBS1 O 2 A TDO O 2 C UTMI_RXERR O 1 Datasheet Complete PIO, I, PU, ST PIO, I, PU, ST PIO, I, PU, ST PIO, I, PU, ST PIO, I, PU, ST PIO, I, PU, ST PIO, I, PU, ST PIO, I, PU, ST PIO, I, PU, ST DS60001484A-page 21 SAMA5D2 SIP 289-ball BGA 196-ball BGA Power Rail I/O Type Primary Signal Alternate Dir Signal PIO Peripheral Dir Func Signal Reset State Dir IO Set (Signal, Dir, PU, PD, HiZ, ST)(1) J4 J3 K2 K9 N1 K5 K8 G4 C2 F2 K4 C1 H2 G2 VDDANA VDDANA VDDANA VDDANA VDDANA VDDANA VDDANA GPIO_AD GPIO_AD GPIO_AD GPIO_AD GPIO_AD GPIO_AD GPIO_AD (c) 2017 Microchip Technology Inc. PD9 PD10 PD11 PD12 PD13 PD14 PD15 I/O I/O I/O I/O I/O I/O I/O - - - - - - - - - - - - - - D GTX3 O 2 E ISC_D1 I 2 F NANDRDY I 2 A TMS I 2 C UTMI_RXACT O 1 D GTXCK I/O 2 E ISC_D2 I 2 A NTRST I 2 C UTMI_HDIS O 1 D GTXEN O 2 E ISC_D3 I 2 A TIOA1 I/O 3 B PCK2 O 2 C UTMI_LS0 O 1 D GRXDV I 2 E ISC_D4 I 2 F ISC_MCK O 4 A TIOB1 I/O 3 B FLEXCOM4_IO0 I/O 2 C UTMI_LS1 O 1 D GRXER I 2 E ISC_D5 I 2 F ISC_D4 I 4 A TCLK1 I 3 B FLEXCOM4_IO1 I/O 2 C UTMI_CDRCPSEL0 I 1 D GRX0 I 2 E ISC_D6 I 2 F ISC_D5 I 4 A TCK I 1 B FLEXCOM4_IO2 I/O 2 C UTMI_CDRCPSEL1 I 1 D GRX1 I 2 E ISC_D7 I 2 F ISC_D6 I 4 A TDI I 1 B FLEXCOM4_IO3 O 2 C UTMI_CDRCPDIVEN I 1 D GTX0 O 2 E ISC_PCK I 2 F ISC_D7 I 4 Datasheet Complete PIO, I, PU, ST PIO, I, PU, ST PIO, I, PU, ST PIO, I, PU, ST PIO, I, PU, ST A, PU, ST PIO, I, PU, ST DS60001484A-page 22 SAMA5D2 SIP 289-ball BGA 196-ball BGA Power Rail I/O Type Primary Signal Alternate Dir Signal PIO Peripheral Dir Func Signal Reset State Dir IO Set (Signal, Dir, PU, PD, HiZ, ST)(1) L1 K1 J7 L8 L2 P1 L6 T1 L4 J1 A1 G3 K2 H1 G1 F1 E1 - VDDANA VDDANA VDDANA VDDANA VDDANA VDDANA VDDANA VDDANA VDDANA GPIO_AD GPIO_AD GPIO_AD GPIO_AD GPIO_AD GPIO_AD GPIO_AD GPIO_AD GPIO_AD (c) 2017 Microchip Technology Inc. PD16 PD17 PD18 PD19 PD20 PD21 PD22 PD23 PD24 I/O I/O I/O I/O I/O I/O I/O I/O I/O - - - AD0 AD1 AD2 AD3 AD4 AD5 - - - - - - - - - A TDO O 1 B FLEXCOM4_IO4 O 2 C UTMI_CDRBISTEN I 1 D GTX1 O 2 E ISC_VSYNC I 2 F ISC_D8 I 4 A TMS I 1 C UTMI_CDRCPSELDIV O 1 D GMDC O 2 E ISC_HSYNC I 2 F ISC_D9 I 4 A NTRST I 1 D GMDIO I/O 2 E ISC_FIELD I 2 F ISC_D10 I 4 A PCK0 O 1 B TWD1 I/O 3 C URXD2 I 3 E I2SC0_CK I/O 2 F ISC_D11 I 4 A TIOA2 I/O 3 B TWCK1 I/O 3 C UTXD2 O 3 E I2SC0_MCK O 2 F ISC_PCK I 4 A TIOB2 I/O 3 B TWD0 I/O 4 C FLEXCOM4_IO0 I/O 3 E I2SC0_WS I/O 2 F ISC_VSYNC I 4 A TCLK2 I 3 B TWCK0 I/O 4 C FLEXCOM4_IO1 I/O 3 E I2SC0_DI0 I 2 F ISC_HSYNC I 4 A URXD2 I 2 C FLEXCOM4_IO2 I/O 3 E I2SC0_DO0 O 2 F ISC_FIELD I 4 A UTXD2 O 2 C FLEXCOM4_IO3 O 3 Datasheet Complete PIO, I, PU, ST A, PU, ST PIO, I, PU, ST PIO, I, PU, ST PIO, I, PU, ST PIO, I, PU, ST PIO, I, PU, ST PIO, I, PU, ST PIO, I, PU, ST DS60001484A-page 23 SAMA5D2 SIP 289-ball BGA 196-ball BGA Power Rail I/O Type Primary Alternate Signal Dir Signal PIO Peripheral Dir Func Signal Reset State Dir IO Set (Signal, Dir, PU, PD, HiZ, ST)(1) L5 - VDDANA GPIO_AD PD25 I/O AD6 - R1 - VDDANA GPIO_AD PD26 I/O AD7 - L7 - VDDANA GPIO_AD PD27 I/O AD8 - L3 - M2 - M9 - M8 - VDDANA VDDANA VDDANA VDDANA GPIO_AD GPIO_AD GPIO_AD GPIO PD28 I/O PD29 I/O PD30 I/O PD31 I/O AD9 AD10 AD11 - - - - - A SPI1_SPCK I/O 3 C FLEXCOM4_IO4 O 3 A SPI1_MOSI I/O 3 C FLEXCOM2_IO0 I/O 2 A SPI1_MISO I/O 3 B TCK I 3 C FLEXCOM2_IO1 I/O 2 A SPI1_NPCS0 I/O 3 B TDI I 3 C FLEXCOM2_IO2 I/O 2 A SPI1_NPCS1 O 3 B TDO O 3 C FLEXCOM2_IO3 O 2 D TIOA3 I/O 3 E TWD0 I/O 3 A SPI1_NPCS2 O 3 B TMS I 3 C FLEXCOM2_IO4 O 2 D TIOB3 I/O 3 E TWCK0 I/O 3 A ADTRG I 1 B NTRST I 3 C IRQ I 4 D TCLK3 I 3 E PCK0 O 2 PIO, I, PU, ST PIO, I, PU, ST PIO, I, PU, ST PIO, I, PU, ST PIO, I, PU, ST PIO, I, PU, ST PIO, I, PU, ST L9 L1 VDDANA - ADVREF I - - - - - - - K4, J5 K3, L2 VDDANA power VDDANA I - - - - - - - J6, M1 L3, K1 GNDANA ground GNDANA I - - - - - - - J10, F11 K12, F12 VDDIODDR DDR DDR_VREF - - - - - - - - L10, L14, J8, H10, G12, E11, E8 F10, E8, E9, E10, G12, H12, J12 VDDIODDR power VDDIODDR I - - - - - - - K10, M14, J9, G10, H12, E10, F8 K11, J11, F9, C10, E11, F8, F11, G13, H13 GNDIODDR ground GNDIODDR I - - - - - - - H2, U3, P7, L12, E9, D7 G7, H4, D14, E14, L5 VDDCORE power VDDCORE I - - - - - - - E12, F12, J11, K11, K6, K7 G11, E12, E13, H3, H7, H8, J3 GNDCORE ground GNDCORE I - - - - - - - D4, F3 F4, E4 VDDIOP0 power VDDIOP0 I - - - - - - - E3, F2 E5, F5 GNDIOP0 ground GNDIOP0 I - - - - - - - N12, P12 N9, N10 VDDIOP1 power VDDIOP1 I - - - - - - - M12, P11 M9, M10 GNDIOP1 ground GNDIOP1 I - - - - - - - D9 - VDDIOP2 power VDDIOP2 I - - - - - - - (c) 2017 Microchip Technology Inc. Datasheet Complete DS60001484A-page 24 SAMA5D2 SIP 289-ball BGA 196-ball BGA Power Rail I/O Type Primary Alternate Signal Dir Signal PIO Peripheral Dir Func Signal Reset State Dir IO Set (Signal, Dir, PU, PD, HiZ, ST)(1) D6 - GNDIOP2 ground GNDIOP2 I - - - - - - - N8 J7 VDDSDMMC power VDDSDMMC I - - - - - - - R8 J8 GNDSDMMC ground GNDSDMMC I - - - - - - - H3 - VDDISC power VDDISC I - - - - - - - H5 - GNDISC ground GNDISC I - - - - - - - N13 M13 VDDFUSE power VDDFUSE I - - - - - - - R5 P4 VDDPLLA power VDDPLLA I - - - - - - - T5 L6 GNDPLLA ground GNDPLLA I - - - - - - - M4 K6 VDDAUDIOPLL power VDDAUDIOPLL I - - - - - - - T3 J6 GNDDPLL ground GNDDPLL I - - - - - - - T4 H6 GNDAUDIOPL L ground GNDAUDIOPLL I - - - - - - - T8 P1 VDDAUDIOPLL - CLK_AUDIO - - - - - - - - U9 N5 VDDOSC - XIN - - - - - - - - U8 P5 VDDOSC - XOUT - - - - - - - - N6 M7 VDDOSC - VDDOSC - - - - - - - - P5 N6 GNDOSC power GNDOSC I - - - - - - - P6 M6 VDDUTMII power VDDUTMII I - - - - - - - R7 - VDDHSIC power VDDHSIC I - - - - - - - M6 L7 GNDUTMII power GNDUTMII I - - - - - - - U10 N7 VDDUTMII - HHSDPA I - - - - - - - T10 P7 VDDUTMII - HHSDMA - - - - - - - - U11 N8 VDDUTMII - HHSDPB - - - - - - - - T11 P8 VDDUTMII - HHSDMB - - - - - - - - T12 - VDDHSIC - HHSDPDATC - - - - - - - - U12 - VDDHSIC - HHSDMSTRC - - - - - - - M7 K7 VDDUTMIC power VDDUTMIC I - - - - - - - R6 G5 GNDUTMIC power GNDUTMIC I - - - - - - - T6 P6 VDDUTMIC - VBG - - - - - - - - R4 D1 VDDBU - TST - - - - - - - - T7 J5 VDDBU - NRST - - - - - - - - R3 N3 VDDBU - JTAGSEL - - - - - - - - R2 N1 VDDBU - WKUP - - - - - - - - N2 - VDDBU - RXD - - - - - - - - T2 B1 VDDBU - SHDN - - - - - - - - P3 N4 VDDBU - PIOBU0 - - - - - - - - M3 L4 VDDBU - PIOBU1 - - - - - - - - P2 M3 VDDBU - PIOBU2 - - - - - - - - P4 M4 VDDBU - PIOBU3 - - - - - - - - N4 J4 VDDBU - PIOBU4 - - - - - - - - M5 M5 VDDBU - PIOBU5 - - - - - - - - N5 - VDDBU - PIOBU6 - - - - - - - - (c) 2017 Microchip Technology Inc. Datasheet Complete DS60001484A-page 25 SAMA5D2 SIP 289-ball BGA 196-ball BGA Power Rail I/O Type Primary Alternate Signal Dir Signal PIO Peripheral Dir Func Signal Reset State Dir IO Set (Signal, Dir, PU, PD, HiZ, ST)(1) N3 - VDDBU - PIOBU7 - - - - - - - - U5 K5 VDDBU power VDDBU I - - - - - - - U4 N2 GNDBU ground GNDBU I - - - - - - - U2 M1 VDDBU - XIN32 - - - - - - - - U1 M2 VDDBU - XOUT32 - - - - - - - - U6 P2 VDDBU - COMPP I - - - - - - - U7 P3 VDDBU - COMPN I - - - - - - - D17 D12 DDRM_VDDQ( 2) - ODT I - - - - - - - A16, B16, C16, D16, E15, G17, J17, L16 B10, A12, D10, D11 DDRM_VDD power DDRM_VDD I - - - - - - - E16 E7 DDRM_VDDL(2 ) power DDRM_VDDL(2) I - - - - - - - F15, G15, H15, J15, K15, L15 A7, A13, A9, A11, B6, C12 DDRM_VDDQ( 2) power DDRM_VDDQ(2) - - - - - - - - A17, B17, C17, D15, E14, F17, H17, L17 B14, A8, C11, C14, D8 DDRM_VSS ground DDRM_VSS - - - - - - - - E17 D13 DDRM_VSSDL ground DDRM_VSSDL I - - - - - - - F16, G16, H16, J16, K16, K17 A10, A14, B11, B12, B13, C13 DDRM_VSSQ ground DDRM_VSSQ I - - - - - - - A12, A13, A14, A15, B11, B12, B13, B14, B15, C10, C11, C12, C13, C14, C15, D10, D11, D12, D13, D14, E13, F9, F10, F13, F14, G11, G13, G14, H11, H13, H14, J12, J13, J14, K12, K13, K14, L13, R12, T9 - - NC - - - - - - - - - Note: 1. Signal = `PIO' if GPIO; Dir = Direction; PU = Pull-up; PD = Pull-down; HiZ = High impedance; ST = Schmitt Trigger 2. Refer to the DDR2-SDRAM datasheet for DDRM_VDDQ and DDRM_VDDL definitions. DDRM_VDDQ/DDRM_VDDL = 1.8V 0.1V. (c) 2017 Microchip Technology Inc. Datasheet Complete DS60001484A-page 26 SAMA5D2 SIP 6. DDR2-SDRAM Memory The SAMA5D2 SIP is available with 128 Mbit, 512 Mbit or 1 Gbit DDR2-SDRAM memory options. For the features of these memories, see DDR2-SDRAM Features. For power consumption, electrical characteristics and timings of these memories, refer to the datasheets referenced below on the manufacturer's website www.winbond.com. Table 6-1. Memory Datasheet References Density Winbond Packaged PN Datasheet Reference Number 128 Mbit W9712G6KB25I W9712G6KB 512 Mbit W9751G6KB25I W9751G6KB 1 Gbit W971GG6SB25I W971GG6SB (c) 2017 Microchip Technology Inc. Datasheet Complete DS60001484A-page 27 SAMA5D2 SIP 7. Mechanical Characteristics 7.1 289-ball TFBGA Table 7-1. 289-ball TFBGA Package Characteristics Moisture Sensitivity Level 3 Table 7-2. Device and 289-ball TFBGA Package Weight 445 (c) 2017 Microchip Technology Inc. mg Datasheet Complete DS60001484A-page 28 SAMA5D2 SIP Table 7-3. Package Reference JEDEC Drawing Reference NA J-STD-609 Classification e8 Table 7-4. 289-ball TFBGA Package Information 7.2 Ball Land 0.450 mm 0.05 Nominal Ball Diameter 0.4 mm Solder Mask Opening 0.350 mm 0.05 Solder Mask Definition SMD Solder OSP 196-ball TFBGA For mechanical characteristics of the 196-ball TFBGA package, refer to the SAMA5D2 Series Datasheet, ref. no. DS60001476, available via www.microchip.com. (c) 2017 Microchip Technology Inc. Datasheet Complete DS60001484A-page 29 SAMA5D2 SIP 8. Ordering Information Table 8-1. Ordering Information Ordering Code MRL Package Carrier Type Operating Temperature Range ATSAMA5D225C-D1M-CU C BGA196 Tray -40C to +85C ATSAMA5D225C-D1M-CUR ATSAMA5D27C-D5M-CU Tape & Reel BGA289 Tray ATSAMA5D27C-D5M-CUR Tape & Reel ATSAMA5D27C-D1G-CU Tray ATSAMA5D27C-D1G-CUR Tape & Reel ATSAMA5D28C-D1G-CU Tray ATSAMA5D28C-D1G-CUR Tape & Reel (c) 2017 Microchip Technology Inc. Datasheet Complete DS60001484A-page 30 SAMA5D2 SIP 9. Revision History Table 9-1. SAMA5D2 SIP Datasheet, DS60001484A, September-2017 Revision History Changes First issue. (c) 2017 Microchip Technology Inc. Datasheet Complete DS60001484A-page 31 SAMA5D2 SIP The Microchip Web Site Microchip provides online support via our web site at http://www.microchip.com/. This web site is used as a means to make files and information easily available to customers. Accessible by using your favorite Internet browser, the web site contains the following information: * * * Product Support - Data sheets and errata, application notes and sample programs, design resources, user's guides and hardware support documents, latest software releases and archived software General Technical Support - Frequently Asked Questions (FAQ), technical support requests, online discussion groups, Microchip consultant program member listing Business of Microchip - Product selector and ordering guides, latest Microchip press releases, listing of seminars and events, listings of Microchip sales offices, distributors and factory representatives Customer Change Notification Service Microchip's customer notification service helps keep customers current on Microchip products. Subscribers will receive e-mail notification whenever there are changes, updates, revisions or errata related to a specified product family or development tool of interest. To register, access the Microchip web site at http://www.microchip.com/. Under "Support", click on "Customer Change Notification" and follow the registration instructions. Customer Support Users of Microchip products can receive assistance through several channels: * * * * Distributor or Representative Local Sales Office Field Application Engineer (FAE) Technical Support Customers should contact their distributor, representative or Field Application Engineer (FAE) for support. Local sales offices are also available to help customers. A listing of sales offices and locations is included in the back of this document. Technical support is available through the web site at: http://www.microchip.com/support (c) 2017 Microchip Technology Inc. Datasheet Complete DS60001484A-page 32 SAMA5D2 SIP Product Identification System To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. ATSAMA5 D225 C - D1M - C U R Architecture Product Group Mask Revision Memory Type and Size Package Temperature Range Carrier Type Architecture: ATSAMA5 = ARM Cortex-A5 CPU Product Group: D225 = 196-ball general-purpose microprocessor family D27 = 289-ball general-purpose microprocessor family D28 Memory Type and Size: D1M = 128-Mbit DDR2 SDRAM D5M = 512-Mbit DDR2 SDRAM D1G = 1-Gigabit DDR2 SDRAM Mask Revision: C Package: C = BGA Temperature Range: U = -40C to +85C (Industrial) Carrier Type: Blank = Standard packaging (tray) R = Tape and Reel Examples: * ATSAMA5D225C-D1M-CU = ARM Cortex-A5 general-purpose microprocessor, 128-Mbit DDR2 SDRAM, 196-ball, Industrial temperature, BGA Package. Note: Tape and Reel identifier only appears in the catalog part number description. This identifier is used for ordering purposes and is not printed on the device package Microchip Devices Code Protection Feature Note the following details of the code protection feature on Microchip devices: * * * Microchip products meet the specification contained in their particular Microchip Data Sheet. Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the (c) 2017 Microchip Technology Inc. Datasheet Complete DS60001484A-page 33 SAMA5D2 SIP * * operating specifications contained in Microchip's Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. Microchip is willing to work with the customer who is concerned about the integrity of their code. Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as "unbreakable." Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip's code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Legal Notice Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE. Microchip disclaims all liability arising from this information and its use. Use of Microchip devices in life support and/or safety applications is entirely at the buyer's risk, and the buyer agrees to defend, indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting from such use. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights unless otherwise stated. Trademarks The Microchip name and logo, the Microchip logo, AnyRate, AVR, AVR logo, AVR Freaks, BeaconThings, BitCloud, CryptoMemory, CryptoRF, dsPIC, FlashFlex, flexPWR, Heldo, JukeBlox, KeeLoq, KeeLoq logo, Kleer, LANCheck, LINK MD, maXStylus, maXTouch, MediaLB, megaAVR, MOST, MOST logo, MPLAB, OptoLyzer, PIC, picoPower, PICSTART, PIC32 logo, Prochip Designer, QTouch, RightTouch, SAM-BA, SpyNIC, SST, SST Logo, SuperFlash, tinyAVR, UNI/O, and XMEGA are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. ClockWorks, The Embedded Control Solutions Company, EtherSynch, Hyper Speed Control, HyperLight Load, IntelliMOS, mTouch, Precision Edge, and Quiet-Wire are registered trademarks of Microchip Technology Incorporated in the U.S.A. Adjacent Key Suppression, AKS, Analog-for-the-Digital Age, Any Capacitor, AnyIn, AnyOut, BodyCom, chipKIT, chipKIT logo, CodeGuard, CryptoAuthentication, CryptoCompanion, CryptoController, dsPICDEM, dsPICDEM.net, Dynamic Average Matching, DAM, ECAN, EtherGREEN, In-Circuit Serial Programming, ICSP, Inter-Chip Connectivity, JitterBlocker, KleerNet, KleerNet logo, Mindi, MiWi, motorBench, MPASM, MPF, MPLAB Certified logo, MPLIB, MPLINK, MultiTRAK, NetDetach, Omniscient Code Generation, PICDEM, PICDEM.net, PICkit, PICtail, PureSilicon, QMatrix, RightTouch logo, REAL ICE, Ripple Blocker, SAM-ICE, Serial Quad I/O, SMART-I.S., SQI, SuperSwitcher, SuperSwitcher II, Total Endurance, TSHARC, USBCheck, VariSense, ViewSpan, WiperLock, Wireless DNA, and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. Silicon Storage Technology is a registered trademark of Microchip Technology Inc. in other countries. (c) 2017 Microchip Technology Inc. Datasheet Complete DS60001484A-page 34 SAMA5D2 SIP GestIC is a registered trademark of Microchip Technology Germany II GmbH & Co. KG, a subsidiary of Microchip Technology Inc., in other countries. All other trademarks mentioned herein are property of their respective companies. (c) 2017, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. ISBN: 978-1-5224-1587-9 Quality Management System Certified by DNV ISO/TS 16949 Microchip received ISO/TS-16949:2009 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona; Gresham, Oregon and design centers in California (R) (R) and India. The Company's quality system processes and procedures are for its PIC MCUs and dsPIC (R) DSCs, KEELOQ code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip's quality system for the design and manufacture of development systems is ISO 9001:2000 certified. (c) 2017 Microchip Technology Inc. Datasheet Complete DS60001484A-page 35 Worldwide Sales and Service AMERICAS ASIA/PACIFIC ASIA/PACIFIC EUROPE Corporate Office 2355 West Chandler Blvd. Chandler, AZ 85224-6199 Tel: 480-792-7200 Fax: 480-792-7277 Technical Support: http://www.microchip.com/ support Web Address: www.microchip.com Atlanta Duluth, GA Tel: 678-957-9614 Fax: 678-957-1455 Austin, TX Tel: 512-257-3370 Boston Westborough, MA Tel: 774-760-0087 Fax: 774-760-0088 Chicago Itasca, IL Tel: 630-285-0071 Fax: 630-285-0075 Dallas Addison, TX Tel: 972-818-7423 Fax: 972-818-2924 Detroit Novi, MI Tel: 248-848-4000 Houston, TX Tel: 281-894-5983 Indianapolis Noblesville, IN Tel: 317-773-8323 Fax: 317-773-5453 Tel: 317-536-2380 Los Angeles Mission Viejo, CA Tel: 949-462-9523 Fax: 949-462-9608 Tel: 951-273-7800 Raleigh, NC Tel: 919-844-7510 New York, NY Tel: 631-435-6000 San Jose, CA Tel: 408-735-9110 Tel: 408-436-4270 Canada - Toronto Tel: 905-695-1980 Fax: 905-695-2078 Asia Pacific Office Suites 3707-14, 37th Floor Tower 6, The Gateway Harbour City, Kowloon Hong Kong Tel: 852-2943-5100 Fax: 852-2401-3431 Australia - Sydney Tel: 61-2-9868-6733 Fax: 61-2-9868-6755 China - Beijing Tel: 86-10-8569-7000 Fax: 86-10-8528-2104 China - Chengdu Tel: 86-28-8665-5511 Fax: 86-28-8665-7889 China - Chongqing Tel: 86-23-8980-9588 Fax: 86-23-8980-9500 China - Dongguan Tel: 86-769-8702-9880 China - Guangzhou Tel: 86-20-8755-8029 China - Hangzhou Tel: 86-571-8792-8115 Fax: 86-571-8792-8116 China - Hong Kong SAR Tel: 852-2943-5100 Fax: 852-2401-3431 China - Nanjing Tel: 86-25-8473-2460 Fax: 86-25-8473-2470 China - Qingdao Tel: 86-532-8502-7355 Fax: 86-532-8502-7205 China - Shanghai Tel: 86-21-3326-8000 Fax: 86-21-3326-8021 China - Shenyang Tel: 86-24-2334-2829 Fax: 86-24-2334-2393 China - Shenzhen Tel: 86-755-8864-2200 Fax: 86-755-8203-1760 China - Wuhan Tel: 86-27-5980-5300 Fax: 86-27-5980-5118 China - Xian Tel: 86-29-8833-7252 Fax: 86-29-8833-7256 China - Xiamen Tel: 86-592-2388138 Fax: 86-592-2388130 China - Zhuhai Tel: 86-756-3210040 Fax: 86-756-3210049 India - Bangalore Tel: 91-80-3090-4444 Fax: 91-80-3090-4123 India - New Delhi Tel: 91-11-4160-8631 Fax: 91-11-4160-8632 India - Pune Tel: 91-20-3019-1500 Japan - Osaka Tel: 81-6-6152-7160 Fax: 81-6-6152-9310 Japan - Tokyo Tel: 81-3-6880- 3770 Fax: 81-3-6880-3771 Korea - Daegu Tel: 82-53-744-4301 Fax: 82-53-744-4302 Korea - Seoul Tel: 82-2-554-7200 Fax: 82-2-558-5932 or 82-2-558-5934 Malaysia - Kuala Lumpur Tel: 60-3-6201-9857 Fax: 60-3-6201-9859 Malaysia - Penang Tel: 60-4-227-8870 Fax: 60-4-227-4068 Philippines - Manila Tel: 63-2-634-9065 Fax: 63-2-634-9069 Singapore Tel: 65-6334-8870 Fax: 65-6334-8850 Taiwan - Hsin Chu Tel: 886-3-5778-366 Fax: 886-3-5770-955 Taiwan - Kaohsiung Tel: 886-7-213-7830 Taiwan - Taipei Tel: 886-2-2508-8600 Fax: 886-2-2508-0102 Thailand - Bangkok Tel: 66-2-694-1351 Fax: 66-2-694-1350 Austria - Wels Tel: 43-7242-2244-39 Fax: 43-7242-2244-393 Denmark - Copenhagen Tel: 45-4450-2828 Fax: 45-4485-2829 Finland - Espoo Tel: 358-9-4520-820 France - Paris Tel: 33-1-69-53-63-20 Fax: 33-1-69-30-90-79 France - Saint Cloud Tel: 33-1-30-60-70-00 Germany - Garching Tel: 49-8931-9700 Germany - Haan Tel: 49-2129-3766400 Germany - Heilbronn Tel: 49-7131-67-3636 Germany - Karlsruhe Tel: 49-721-625370 Germany - Munich Tel: 49-89-627-144-0 Fax: 49-89-627-144-44 Germany - Rosenheim Tel: 49-8031-354-560 Israel - Ra'anana Tel: 972-9-744-7705 Italy - Milan Tel: 39-0331-742611 Fax: 39-0331-466781 Italy - Padova Tel: 39-049-7625286 Netherlands - Drunen Tel: 31-416-690399 Fax: 31-416-690340 Norway - Trondheim Tel: 47-7289-7561 Poland - Warsaw Tel: 48-22-3325737 Romania - Bucharest Tel: 40-21-407-87-50 Spain - Madrid Tel: 34-91-708-08-90 Fax: 34-91-708-08-91 Sweden - Gothenberg Tel: 46-31-704-60-40 Sweden - Stockholm Tel: 46-8-5090-4654 UK - Wokingham Tel: 44-118-921-5800 Fax: 44-118-921-5820 (c) 2017 Microchip Technology Inc. Datasheet Complete DS60001484A-page 36