STP33N10
STP33N10FI
N - CHANNEL ENHANCEMENT MODE
POWER MOS TRANSISTOR
■TYPICAL RDS(on) = 0.045 Ω
■AVALANCHE RUGGED TECHNOLOGY
■100% AVALANCHE TESTED
■REPETITIVE AVALANCHE DATA AT 100oC
■LOW GATE CHARGE
■HIGH CURRENT CAPABILITY
■175oC OPERATING TEMPERATURE
■APPLICATION ORIENTED
CHARACTERIZATION
APPLICATIONS
■HIGH CURRENT, HIGH SPEED SWITCHING
■SOLENOID AND RELAY DRIVERS
■REGULATORS
■DC-DC & DC-AC CONVERTERS
■MOTOR CONTROL, AUDIO AMPLIFIERS
■AUTOMOTIVE ENVIRONMENT (INJECTION,
ABS, AIR-BAG, LAMPDRIVERS, Etc.)
INTERNAL SCHEMATIC DIAGRAM
TYPE VDSS RDS(on) ID
STP33N10
STP33N10FI 100 V
100 V <0.06Ω
<0.06Ω33 A
18 A
123
TO-220 ISOWATT220
July 1993
123
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit
STP33N10 STP33N10FI
VDS Drain-source Voltage (VGS =0) 100 V
V
DGR Drain- gate Voltage (RGS =20kΩ)100V
V
GS Gate-source Voltage ±20 V
IDDrain Current (continuous) at Tc=25o
C3318A
I
D
Drain Current (continuous) at Tc=100o
C23 12A
I
DM(•) Drain Current (pulsed) 132 132 A
Ptot Total Dissipation at Tc=25o
C 150 45 W
Derating Factor 1 0.3 W/oC
VISO Insulation Withstand Voltage (DC) 2000 V
Tstg Storage Temperature -65 to 175 oC
TjMax. Operating Junction Temperature 175 oC
(•) Pulsewidth limited by safe operating area
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