List of figures
Figure 1. Block diagram ....................................................................2
Figure 2. Pin connection (top view) .............................................................3
Figure 3. Supply current vs. supply voltage .......................................................9
Figure 4. Supply current vs. input common mode ...................................................9
Figure 5. Supply current vs. temperature .........................................................9
Figure 6. Supply current vs. input common mode with active shutdown mode ...............................9
Figure 7. Input bias current vs. input common mode with shutdown active ................................. 10
Figure 8. Input bias current vs. temperature VCC = 2.7 V .............................................10
Figure 9. Input bias current vs. temperature with VCC = 5 V ........................................... 10
Figure 10. Input offset voltage vs. temperature..................................................... 10
Figure 11. Input offset voltage vs. input common mode with VCC = 2.7 V................................... 11
Figure 12. Input offset voltage vs. input common mode with VCC = 5 V .................................... 11
Figure 13. Input offset voltage vs. supply voltage ................................................... 11
Figure 14. Output current vs. output voltage ...................................................... 11
Figure 15. Voh and Vol vs. input common mode voltage with VCC = 5 V .................................... 12
Figure 16. (Output voltage - Vref) vs. Vsense unidirectionnal with VCC = 5 V ................................. 12
Figure 17. (Output voltage - Vref) vs. Vsense bidirectionnal with VCC = 5 V .................................. 12
Figure 18. Output rail linearity vs. load with VCC = 5 V................................................ 12
Figure 19. Linearity vs. Vsense with VCC = 5 V ..................................................... 13
Figure 20. Linearity vs. Vsense and temperature .................................................... 13
Figure 21. Gain error vs. input common mode ..................................................... 13
Figure 22. Gain error vs. input common mode and temperature ......................................... 13
Figure 23. Load regulation with VCC = 5 V ........................................................ 14
Figure 24. Gain vs. frequency ................................................................14
Figure 25. Gain vs. frequency (VCC = 5 V)........................................................ 14
Figure 26. Gain vs. frequency for different load ....................................................14
Figure 27. Gain vs. different capacitive load (TSC2012) ..............................................15
Figure 28. Bandwidth vs. input common mode .....................................................15
Figure 29. Bandwidth vs. input common mode (TSC2012).............................................15
Figure 30. Overshoot vs. capacitive load ......................................................... 15
Figure 31. Small signal response with VCC = 5 V ................................................... 16
Figure 32. Small signal response with VCC = 5 V (TSC2012) ........................................... 16
Figure 33. Small signal response with VCC = 2.7 V .................................................. 16
Figure 34. Large signal response with VCC = 5 V ................................................... 16
Figure 35. Large signal response with VCC = 2.7 V .................................................. 17
Figure 36. 12 V common mode step response recovery ..............................................17
Figure 37. 50 V common mode step response recovery ..............................................17
Figure 38. PSRR vs. frequency ...............................................................17
Figure 39. CMRR vs. frequency ............................................................... 18
Figure 40. Positive overvoltage recovery VCC = 2.7 V ................................................18
Figure 41. Negative overvoltage recovery VCC = 2.7 V ............................................... 18
Figure 42. Overvoltage recovery vs. Vicm, VCC = 5 V................................................. 18
Figure 43. Noise vs. frequency................................................................ 19
Figure 44. ON/OFF delay for shutdown mode .....................................................19
Figure 45. Output voltage vs. Vsense beyond the sense operating ........................................ 19
Figure 46. Power up time delay ............................................................... 19
Figure 47. Power supply when Vicm > Vcc ........................................................ 20
Figure 48. Input bias current vs. common mode voltage Vcc = 5 V ....................................... 21
Figure 49. Power supply when Vicm < Gnd .......................................................22
TSC2011, TSC2012
List of figures
DS13057 - Rev 2 page 47/49