ISL28191FRUZ - Intersil Corporation

FN6156.5

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

1-888-INTERSIL or 1-888-468-3774 |Intersil (and design) is a registered trademark of Intersil Americas Inc.

All other trademarks mentioned are the property of their respective owners.

ISL28191, ISL28291

Single and Dual Single Supply Ultra-Low

Noise, Low Distortion Rail-to-Rail Output,

Op Amp

The ISL28191 and ISL28291 are tiny single and dual

ultra-low noise, ultra-low distortion operational amplifiers.

They are fully specified to operate down to +3V single

supply. These amplifiers have outputs that swing rail-to-rail

and an input common mode voltage that extends to ground

(ground sensing).

The ISL28191 and ISL28291 are un ity gain stable with an

input referred voltage noise of 1.7nV/√Hz. Both parts featur e

0.00018% THD+N at 1kHz.

The ISL28191 is availa ble in the space-saving 6 Ld µTDFN

(1.6mmx1.6mm) and 6 Ld SOT-23 packages. The ISL28291

is available in the 8 Ld SOIC , 10 Ld 1.8mmx1.4mm µTQFN

and 10 Ld MSOP packages. All devices are guaranteed over

-40°C to +125°C.

Features

• 1.7nV/√Hz input voltage noise at 1kHz

• 1kHz THD+N typical 0.00018% at 2VP-P VOUT

• Harmonic Distortion -76dBc, -70dBc, fo = 1MHz

• 61MHz -3dB bandwidth

• 630µV maximum offset voltage

• 3µA input bias current

• 100dB typical CMRR

• 3V to 5.5V single supply voltage range

• Rail-to-rail output

• Ground Sensing

• Enable pin (not available in the 8 Ld SOIC package

option)

• Pb-free (RoHS compliant)

Applications

• Low noise signal processing

• Low noise microphones/preamplifiers

• ADC buffers

• DAC output amplifiers

• Digital scales

• Strain gau ges/sensor amplifiers

• Radio systems

• Portable equipment

• Infrared detectors

Ordering Information

PART

NUMBER PART

MARKING PACKAGE

(Pb-free) PKG.

DWG. #

ISL28191FHZ-T7* (Note 1) GABJ 6 Ld SOT-23 MDP0038

Coming Soon

ISL28191FRUZ (Note 2) M8 6 Ld µTDFN L6.1.6x1.6A

Coming Soon

ISL28191FRUZ-T7* (Note 2) M8 6 Ld µTDFN L6.1.6x1.6A

ISL28291FUZ (Note 1) 8291Z 10 Ld MSOP MDP0043

ISL28291FUZ-T7* (Note 1) 8291Z 10 Ld MSOP MDP0043

Coming Soon

ISL28291FBZ (Note 1) 28291 FBZ 8 Ld SOIC MDP0027

Coming Soon

ISL28291FBZ-T7 (Note 1) 28291 FBZ 8 Ld SOIC MDP0027

Coming Soon

ISL28291FRUZ-T7* (Note 2) F 10 Ld µTQFN L10.1.8x1.4A

*Please refer to TB347 for details on reel specifications.

NOTES:

1. These Intersil Pb-free plastic packaged products employ special

Pb-free material sets; molding compounds/die attach materials

and 100% matte tin plate PLUS ANNEAL - e3 termination finish,

which is RoHS compliant and compatible with both SnPb and Pb-

free soldering operations. Intersil Pb-free products are MSL

classified at Pb-free peak reflow temperatures that meet or exceed

the Pb-free requirements of IPC/JEDEC J STD-020.

2. These Intersil Pb-free plastic packaged products employ special

Pb-free material sets; molding compounds/die attach materials

and NiPdAu plate - e4 termination finish, which is RoHS compliant

and compatible with both SnPb and Pb-free soldering operations.

Intersil Pb-free products are MSL classified at Pb-free peak reflow

temperatures that meet or exceed the Pb-free requirements of

IPC/JEDEC J STD-020.

Data Sheet February 20, 2008

2FN6156.5

February 20, 2008

Pinouts ISL28191

(6 LD SOT-23)

TOP VIEW

ISL28191

(6 LD 1.6X1.6X0.5 µTDFN)

TOP VIEW

ISL28291

(8 LD SOIC)

TOP VIEW

ISL28291

(10 LD MSOP)

TOP VIEW

ISL28291

(10 LD µTQFN)

TOP VIEW

OUT

V-

IN+

V +

IN-

OUT

IN-

IN+

V+

V-

OUT_A

IN-_A

IN+_A

V-

V+

OUT_B

IN-_B

IN+_B

5 6

OUT_A

IN-_A

IN+_A

V-

V+

OUT_B

IN-_B

IN+_B

EN_A EN_B

IN+_B

IN-_B

OUT_B

V+

OUT_A

V-

EN_A

EN_B

IN+_A

IN-_A

543

ISL28191, ISL28291

3FN6156.5

February 20, 2008

Absolute Maximum Ratings (TA = +25°C) Thermal Information

Supply Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5V

Supply Turn On Voltage Slew Rate . . . . . . . . . . . . . . . . . . . . . 1V/µs

Differential Input Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5mA

Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5V

Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . V- - 0.5V to V+ + 0.5V

ESD Tolerance

Human Body Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3kV

Machine Model. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .300V

Thermal Resistance θJA (°C/W)

6 Ld SOT- 23 Package . . . . . . . . . . . . . . . . . . . . . . . 230

6 Ld µTDFN Package . . . . . . . . . . . . . . . . . . . . . . . 120

8 Ld SO Package. . . . . . . . . . . . . . . . . . . . . . . . . . . 110

10 Ld MSOP Package . . . . . . . . . . . . . . . . . . . . . . . 115

6 Ld µTQFN Package . . . . . . . . . . . . . . . . . . . . . . . 143

Ambient Operating Temperature Range . . . . . . . . .-40°C to +125°C

Storage Temperature Range . . . . . . . . . . . . . . . . . .-65°C to +150°C

Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . .+125°C

Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below

http://www.intersil.com/pbfree/Pb-FreeReflow.asp

CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and

result in failures not covered by warranty.

IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests

are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA

Electrical Specifications V+ = 5.0V, V- = GND, RL = Open, RF = 1kΩ, AV = -1 unless otherwise specified. Parameters are per amplifier.

Typical values are at V+= 5V, TA = +25°C. Boldface limits apply over the operating temperature range,

-40°C to +125°C, temperature data guaranteed by characterization.

PARAMETER DESCRIPTION CONDITIONS MIN

(Note 3) TYP MAX

(Note 3) UNIT

DC SPECIFICATIONS

VOS Input Offset Voltage 270 630

840 µV

Input Offset Drift vs Temperature Figure 21 3.1 µV/°C

IIO Input Offset Current 35 500

900 nA

IBInput Bias Current 36

7µA

CMIR Common-Mode Input Range 0 3.8 V

CMRR Common-Mode Rejection Ratio VCM = 0V to 3.8V 78 100 dB

PSRR Power Supply Rejection Ratio VS = 3V to 5V 74 80 dB

AVOL Large Signal Voltage Gain VO = 0.5V to 4V, RL = 1kΩ90

86 98 dB

VOUT Maximum Output Voltage Swing Output low, RL = 1kΩ20 50

80 mV

Output high, RL = 1kΩ, V+ = 5V 4.95

4.92 4.97 V

IS,ON Supply Current, Enabled 2.6 3.5

3.9 mA

IS,OFF Supply Current, Disabled 26 35

48 µA

IO+ Short-Circuit Output Current RL = 10Ω95

90 130 mA

IO- Short-Circuit Output Current RL = 10Ω95

90 130 mA

VSUPPLY Supply Operating Range V+ to V- 3 5.5 V

VENHEN High Level Referred to V- 2 V

VENLEN Low Level Referred to V- 0.8 V

ΔVOS

ΔT

----------------

ISL28191, ISL28291

4FN6156.5

February 20, 2008

IENHEN Pin Input High Current VEN = V+ 0.8 1.1

1.3 µA

IENLEN Pin Input Low Current VEN = V- 20 80

100 nA

AC SPECIFICATIONS

GBW -3dB Unity Gain Bandwidth RF = 0Ω, CL = 20pF, AV = 1, RL = 10kΩ61 MHz

THD+N Total Harmonic Distortion + Noise f = 1kHz. VOUT + 2VP-P, AV = +1, RL = 10kΩ0.00018 %

(1MHz) 2nd Harmonic Distortion 2VP-P output voltage, AV = 1 -76 dBc

3rd Harmonic Distortion -70 dBc

ISO Off-state Isolation

fO = 100kHz AV = +1, VIN = 100mVP-P, RF = 0Ω

CL = 20pF, AV = 1, RL = 10kΩ-38 dB

X-TALK

ISL28291 Channel to Channel Crosstalk

fO = 100kHz VS = ±2.5V, AV = +1, VIN = 1VP-P,

RF = 0Ω, CL = 20pF, AV = 1, RL = 1 0kΩ-105 dB

PSRR Power Supply Rejection Ratio

fO = 100kHz VS = ±2.5V, AV = +1, VSOURCE = 1VP-P,

RF = 0Ω, CL = 20pF, AV = 1, RL = 1 0kΩ-70 dB

CMRR Common Mode Rejection Ratio

fO = 100kHz VS = ±2.5V, AV = +1, VCM = 1VP-P,

RF = 0Ω, CL = 20pF, AV = 1, RL = 1 0kΩ-65 dB

enInput Referred Voltage Noise fO = 1kHz 1.7 nV/√Hz

inInput Referred Current Noise fO = 1kHz 1.8 pA/√Hz

TRANSIENT RESPONSE

SR Slew Rate 12

12 17 V/µs

tr, tf, Small

Signal Rise Time, tr 10% to 90% AV = 1, VOUT = 0.1VP-P, RL = 10kΩ, CL = 1.2pF 7 ns

Fall Time, tf 90% to 10% 12 ns

tr, tf Large

Signal Rise Time, tr 10% to 90% AV = 2, VOUT = 1VP-P; RL = 10kΩ,

RF /RG = 499Ω/499Ω, CL = 1.2pF 44 ns

Fall Time, tf 90% to 10% 50 ns

Rise Time, tr 10% to 90% AV = 2, VOUT =4.7VP-P; RL = 10kΩ,

RF /RG = 499Ω/499Ω, CL = 1.2pF 190 ns

Fall Time, tf 90% to 10% 190 ns

tEN ENABLE to Output Turn-on Delay

Time; 10% EN - 10% VOUT AV = 1, VOUT = 1VDC, RL = 10kΩ, CL = 1.2pF 330 ns

ENABLE to Output Turn-off Delay

Time; 10% EN - 10% VOUT AV = 1, VOUT = 0VDC, RL = 10kΩ, CL = 1.2pF 50 ns

NOTE:

3. Parts are 100% tested at +25°C. Temperature limits established by characterization and are not production tested.

Electrical Specifications V+ = 5.0V, V- = GND, RL = Open, RF = 1kΩ, AV = -1 unless otherwise specified. Parameters are per amplifier.

Typical values are at V+= 5V, TA = +25°C. Boldface limits apply over the operating temperature range,

-40°C to +125°C, temperature data guaranteed by characterization. (Continued)

PARAMETER DESCRIPTION CONDITIONS MIN

(Note 3) TYP MAX

(Note 3) UNIT

ISL28191, ISL28291

5FN6156.5

February 20, 2008

Typical Performance Curves

FIGURE 1. GAIN vs FREQUENCY FOR V ARIOUS RLOAD FIGURE 2. GAIN vs FREQUENCY FOR V ARIOUS CLOAD

FIGURE 3. -3dB BANDWIDTH vs VOUT FIGURE 4. FREQUENCY RESPONSE vs CLOSED LOOP

GAIN

FIGURE 5. INPUT IMPEDANCE vs FREQUENCY FIGURE 6. DISABLED OUTPUT IMPEDANCE vs FREQUENCY

-7

-6

-5

-4

-3

-2

-1

10k 100k 1M 10M 100M

FREQUENCY (Hz)

CLOSED LOOP GAIN (dB)

RL = 100k

V+ = 5V

AV = +1

CL = 10pF

VOUT = 10mVP-P

RL = 10k

RL = 1k

RL = 100

-10

-8

-6

-4

-2

10k 100k 1M 10M 100M

CL = 20pF

CL = 10pF

CL = 32pF

CL = 57pF

CL = 110pF

CLOSED LOOP GAIN (dB)

V+ = 5V

AV = +1

RL = 10kΩ

VOUT = 10mVP-P

FREQUENCY (Hz)

-7

-6

-5

-4

-3

-2

-1

10k 100k 1M 10M 100M

FREQUENCY (Hz)

CLOSED LOOP GAIN (dB)

V+ = 5V

AV = +1

RL = 10kΩ

CL = 10pF

-8

VOUT = 10mVP-P

VOUT = 100mVP-P

OUT

= 1V

P-P

VOUT = 1mVP-P

-10

10k 100k 1M 10M 100M

FREQUENCY (Hz)

GAIN (dB)

V+ = 5V

RL = 10k

VOUT = 100mVP-P

AV = 10, RF = 4.42k, RG = 499

AV = 100, RF = 49.9k,

AV = 1, RF = 0, RG = INF

AV = 1000, RF = 499k, RG = 499

RG = 499

100

10k

100k

10k 100k 1M 10M 100M

V+ = 5V, 3V

INPUT IMPEDANCE (Ω)

FREQUENCY (Hz)

ENABLED AND

DISABLED

VSOURCE = 1VP-P

100

10k

100k

10k 100k 1M 10M 100M

FREQUENCY (Hz)

OUTPUT IMPEDANCE (Ω)

V+ = 5V, 3V

VSOURCE = 1VP-P

ISL28191, ISL28291

6FN6156.5

February 20, 2008

FIGURE 7. ENABLED OUTPUT IMPEDANCE vs FREQUENCY FIGURE 8. CMRR vs FREQUENCY

FIGURE 9. PSRR vs FREQUENCY FIGURE 10. OFF ISOLATION vs FREQUENCY

FIGURE 1 1. CHANNEL TO CHANNEL CROSST ALK vs

FREQUENCY FIGURE 12. THD+N vs FREQUENCY

Typical Performance Curves (Continued)

FREQUENCY (Hz)

0.10

100

10k 100k 1M 10M 100M

OUTPUT IMPEDANCE (Ω)

V+ = 5V, 3V

VSOURCE = 1V

VSOURCE = 0.1V

CMRR (dB)

-20

-40

-60

-80

-100

-10

-30

-50

-70

-90

1k 10k 1M

FREQUENCY (Hz)

100k 100M10M

V+ = 5V

AV = +1

RL = 10kΩ

CL = 10pF

VOUT = 100mVP-P

PSRR (dB)

FREQUENCY (Hz)

-20

-40

-60

-80

-100

-10

-30

-50

-70

-90

1k 10k 1M100k 100M10M

PSRR+

PSRR-

V+ = 5V

AV = +1

RL = 10kΩ

CL = 10pF

VOUT = 100mVP-P

-80

-70

-60

-50

-40

-30

-20

-10

10k 100k 1M 10M 100M 1G

VP-P = 10mV

VP-P = 1V

VP-P = 100mV

OFF ISOLATION (dB)

V+ = 5V

AV = +1

RL = 10kΩ

CL = 10pF

FREQUENCY (Hz)

-120

-110

-100

-90

-80

-70

-60

-50

-40

-30

10k 100k 1M 10M 100M 1G

VP-P = 1V

CROSSTALK (dB)

FREQUENCY (Hz)

0.0001

0.001

0.01

0.1

0 2k 4k 6k 8k 10k 12k 14k 16k 18k 20k

FREQUENCY (Hz)

THD + NOISE (%)

V+ = 5V

RL = 10k

RF = 0, AV = 1

400Hz TO 22kHz FILTER

VOUT = 2VP-P

ISL28191, ISL28291

7FN6156.5

February 20, 2008

FIGURE 13. THD+N @ 1kHz vs VOUT FIGURE 14. INPUT REFERRED NOISE VOL TAGE vs

FREQUENCY

FIGURE 15. INPUT REFERRED NOISE CURRENT vs

FREQUENCY FIGURE 16. ENABLE/DISABLE TIMING

FIGURE 17. SMALL SIGNAL STEP RESPONSE FIGURE 18. LARGE SIGNAL (1V) STEP RESPONSE

Typical Performance Curves (Continued)

0.0001

0.001

0.01

0.1

0 0.5 1.0 1.5 2.0 2.5 3.0 3.5

VOUT (VP-P)

THD +NOISE (%)

V+ = 5V

AV = +1

RL = 10kΩ

FREQUENCY = 1kHz

FILTER = 400Hz TO 22kHz

1 10 100 1k 10k

FREQUENCY (Hz)

INPUT VOLTAGE NOISE (nV/

√

Hz)

100k

0.1

CURRENT NOISE (pA/√Hz)

1 10 100 1k 10k

FREQUENCY (Hz)

100k0.1

100

-1 0 1 2 3 4

EN INPUT

OUTPUT

VOLTS (V)

TIME (µs)

V+ = 5V

AV = +1

RL = 10kΩ

CL = 10pF

VIN = 1VDC

ENABLEDISABLEENABLE

SMALL SIGNAL (V)

TIME (ns)

-0.08

-0.06

-0.04

-0.02

0.02

0.04

0.06

0.08

0 20 40 60 80 100 120 140 160 180 200

VIN

VOUT

V+ = ±2.5V

AV = +1

RL = 10kΩ

VOUT = 100mVP-P

LARGE SIGNAL (V)

-0.8

-0.6

-0.4

-0.2

0.2

0.4

0.6

0.8

TIME (ns)

0 100 200 300 400 500 600 700 800

VIN

VOUT

V+ = ±2.5V

AV = +2

RF = RG = 499Ω

RL = 10kΩ

VOUT = 1VP-P

ISL28191, ISL28291

8FN6156.5

February 20, 2008

FIGURE 19. LARGE SIGNAL (4.7V) STEP RESPONSE FIGURE 20. SUPPLY CURRENT vs TEMPERATURE,

VS = ±2.5V ENABLED, RL = INF

FIGURE 21. VOS vs TEMPERATURE, VS = ±2.5V FIGURE 22. IBIAS+ vs TEMPERATURE, VS = ±2.5V

FIGURE 23. IBIAS- vs TEMPERATURE, VS = ±2.5V FIGURE 24. IIO vs TEMPERATURE, VS = ±2.5V

Typical Performance Curves (Continued)

LARGE SIGNAL (V)

-3

-2

-1

0 400 800 1200 1600 2000

VIN

VOUT

V+ = ±2.5V

AV = +2

RF = RG = 499Ω

RL = 10kΩ

VOUT = 4.7VP-P

TIME (ns)

1.5

1.7

1.9

2.1

2.3

2.5

2.7

2.9

3.1

3.3

3.5

-40 -20 0 20 40 60 80 100 120

TEMPERATURE (°C)

CURRENT (mA)

n = 100

MEDIAN

MIN

MAX

-200

-100

100

200

300

400

500

600

700

800

-40-200 20406080100120

TEMPERATURE (°C)

VOS (µV)

n = 100

MEDIAN

MIN

MAX

-4.6

-4.4

-4.2

-4.0

-3.8

-3.6

-3.4

-3.2

-3.0

-40 -20 0 20 40 60 80 100 120

TEMPERATURE (°C)

IBIAS+ (µA)

n = 100

MEDIAN

MIN

MAX

-5.0

-4.8

-4.6

-4.4

-4.2

-4.0

-3.8

-3.6

-3.4

-3.2

-3.0

-40 -20 0 20 40 60 80 100 120

TEMPERATURE (°C)

IBIAS- (µA)

n = 100

MEDIAN

MIN

MAX

-400

-200

200

400

600

800

-40 -20 0 20 40 60 80 100 120

TEMPERATURE (°C)

IIO (nA)

n = 100

MEDIAN

MIN

MAX

ISL28191, ISL28291

9FN6156.5

February 20, 2008

FIGURE 25. CMRR vs TEMPERA TURE, VCM = 3.8V,

VS = ±2.5V FIGURE 26. PSRR vs TEMPERATURE ±1.5V TO ±2.5V

FIGURE 27. POSITIVE VOUT vs TEMPERATURE, RL = 1k

VS= ±2.5V FIGURE 28. NEGA TIVE VOUT vs TEMPERATURE, RL = 1k

VS= ±2.5V

Typical Performance Curves (Continued)

100

110

120

130

140

150

160

-40 -20 0 20 40 60 80 100 120

TEMPERATURE (°C)

CMRR (dB)

n = 100

MEDIAN

MIN

MAX

-40-200 20406080100120

TEMPERATURE (°C)

PSRR (dB)

n = 100

MEDIAN

MIN

MAX

4.960

4.965

4.970

4.975

4.980

4.985

4.990

-40 -20 0 20 40 60 80 100 120

TEMPERATURE (°C)

VOUT (V)

n = 100

MEDIAN

MIN

MAX

-40-200 20406080100120

TEMPERATURE (°C)

VOUT (mV)

n = 100

MEDIAN

MIN

MAX

Pin Descriptions

ISL28191

(6 Ld SOT-23) ISL28191

(6 Ld µTDFN) ISL28291

(8 Ld SOIC) ISL28291

(10 Ld MSOP) ISL28291

(10 Ld µTQFN) PIN

NAME FUNCTION EQUIVALENT CIRCUIT

2 (A)

6 (B) 2 (A)

8 (B) 1 (A)

7 (B)

IN-

IN-_A

IN-_B

Inverting input

Circuit 1

3 (A)

5 (B) 3 (A)

7 (B) 2 (A)

6 (B)

IN+

IN+_B

Non-inverting

input (See circuit 1)

2 4 4 4 3 V- Negative supply

IN+IN-

V+

V-

ISL28191, ISL28291

10 FN6156.5

February 20, 2008

Applications Information

Product Descr iption

The ISL28191 and ISL28291 are voltage feedback operational

amplifiers designed for communication and imaging

applications requiring low distortion, very low voltage and

current noise. Both parts feature high bandwidth while drawing

moderately low supply current. They use a classical

voltage-feedback topology, which allows them to be used in a

variety of applications where current-feedback amplifiers are

not appropriate because of restrictions placed upon the

feedback element used with the amplifier .

Enable/Power-Down

The ISL28191 and ISL28291 amplifiers are disabled by

applying a voltage greater than 2V to the EN pin, with

respect to the V- pin. In this condition, the output(s) will be in

a high impedance state and the amplifier(s) current will be

reduced to 13µA/Amp. By disabling the part, multiple parts

can be connected together as a MUX. The outputs are tied

together in parallel and a channel can be selected by the EN

pin. The EN pin also has an internal pull-down. If left open,

the EN pin will pull to the negative rail and the device will be

enabled by default.

Input Protection

All input terminals have internal ESD protection diod es to both

positive and negati ve supply rails, limitin g the input vol t age to

within one diode beyond the supply rail s. Both p arts have

additional back-to-back diodes across th e input terminal s (as

shown in Figure 29). In pulse a pplications w here the input

Slew Rate exceeds th e Slew Rate of the amplifier, the

possibility exist s for the input protectio n diodes to be come

forward biased. This can cause excessive input curre nt and

distortion at the outputs. If over driving the inputs is n ecessary,

the external input current must never exceed 5mA. An

external series resistor may be used to limit the current, as

shown in Figure 29.

Using Only One Channel

The ISL28291 is a dual channel op amp. If the application

only requires one chann el when using the ISL28291, the

user must configure the unused channel to prevent it from

oscillating. Oscillation can occur if the input and output pins

are floating. This will result in higher than expected supply

currents and possible noise injection into the channel being

used. The proper way to prevent this oscillation is to short

the output to the negative input and ground the positive input

(as shown in Figure 30).

Power Supply Bypassing and Printed Circuit

Board Layout

As with any high frequency device, good printed circuit

board layout is necessary for optimum performance. Low

impedance ground plane construction is essential. Surface

mount components are recommended, but if leaded

components are used, lead lengths should be as short as

possible. The power supply pins must be well bypassed to

1 (A)

7 (B) 1 (A)

9 (B) 10 (A)

8 (B)

OUT

OUT_A

OUT_B

Output

Circuit 2

6 6 8 10 9 V+ Positive supply

55N/A

5 (A)

6 (B) 4 (A)

5 (B)

EN_A

EN_B

Enable BAR pin

internal pull-

down; Logic “1”

selects the

disabled state;

Logic “0” selects

the enabled

state. Circuit 3

Pin Descriptions (Continued)

ISL28191

(6 Ld SOT-23) ISL28191

(6 Ld µTDFN) ISL28291

(8 Ld SOIC) ISL28291

(10 Ld MSOP) ISL28291

(10 Ld µTQFN) PIN

NAME FUNCTION EQUIVALENT CIRCUIT

V+

V-

OUT

V+

V-

FIGURE 29. LIMITING THE INPUT CURRENT TO LESS THAN

5mA

FIGURE 30. PREVENTING OSCILLA TIONS IN UNUSED

CHANNELS

ISL28191, ISL28291

11 FN6156.5

February 20, 2008

reduce the risk of oscillation. The combination of a 4.7µF

tantalum cap acitor in parallel with a 0.01µF capacitor has

been shown to work well when placed at each supply pin.

For good AC performance, parasitic capacitance should be

kept to a minimum, especially at the inverting input. When

ground plane construction is used, it should be removed

from the area near the inverting input to minimize any stray

capacitance at that node. Carbon or Metal-Film resistors are

acceptable with the Metal-Film resistors giving slightly less

peaking and bandwidth because of additional series

inductance. Use of sockets, particularly for the SOIC

package, should be avoided if possible. Sockets add

parasitic inductance and capacitance, which will result in

additional peaking and overshoot.

Current Limiting

The ISL28191 and ISL28291 have no internal curren t-limi ting

circuitry. If the output is shorted, it is possible to exceed the

Absolute Maximum Rating for output current or power

dissipati on, potenti ally resul ting in the destruction of the

device. This is why the ou tput s hort circuit current is specified

and tested with RL = 10Ω.

Power Dissipation

It is possible to exceed the +125°C maximum junction

temperatures under certain load and power-supply

conditions. It is therefore important to calculate the

maximum junction temperature (TJMAX) for all applications

to determine if power supply voltages, load conditions, or

package type need to be modified to remain in the safe

operating area. These paramete rs are related in Equation 1:

where:

•P

DMAXTOTAL is the sum of the maximum power

dissipation of each amplifier in the package (PDMAX)

•PD

MAX for each amplifier can be calculated in Equation 2:

where:

•T

MAX = Maximum ambient temperature

•θJA = Thermal resistance of the package

•PD

MAX = Maximum power dissipation of 1 amplifier

•V

S = Supply voltage

•I

MAX = Maximum supply current of 1 amplifier

•V

OUTMAX = Maximum output voltage swing of the

application

•R

L = Load resistance

TJMAX TMAX θJAxPDMAXTOTAL

()+= (EQ. 1)

PDMAX 2*VSISMAX VS

( - VOUTMAX)VOUTMAX

----------------------------

×+×=

(EQ. 2)

ISL28191, ISL28291

12 FN6156.5

February 20, 2008

ISL28191, ISL28291

SOT-23 Package Family

321

0.15 DC

2X 0.20 C

B0.20 MDC A-B

2 3

SEATING

PLANE

0.10 C

1 3

0.15 A-BC

(L1)

0.25

0° +3°

-0°

GAUGE

PLANE

MDP0038

SOT-23 PACKAGE FAMILY

SYMBOL

MILLIMETERS

TOLERANCESOT23-5 SOT23-6

A 1.45 1.45 MAX

A1 0.10 0.10 ±0.05

A2 1.14 1.14 ±0.15

b 0.40 0.40 ±0.05

c 0.14 0.14 ±0.06

D 2.90 2.90 Basic

E 2.80 2.80 Basic

E1 1.60 1.60 Basic

e 0.95 0.95 Basic

e1 1.90 1.90 Basic

L 0.45 0.45 ±0.10

L1 0.60 0.60 Reference

N 5 6 Reference

Rev. F 2/07

NOTES:

1. Plastic or metal protrusions of 0.25mm maximum per side are not

included.

2. Plastic interlead protrusions of 0.25mm maximum per side are not

included.

3. This dimension is measured at Datum Plane “H”.

4. Dimensioning and tolerancing per ASME Y14.5M-1994.

5. Index area - Pin #1 I.D. will be located within the indicated zone

(SOT23-6 only).

6. SOT23-5 version has no center lead (shown as a dashed line).

13 FN6156.5

February 20, 2008

ISL28191, ISL28291

Ultra Thin Dual Flat No-Lead Plastic Package (UTDFN)

0.15 C

PIN 1

TOP VIEW

0.15 C

REFERENCE

DETAIL A

0.10 C

0.08 C

A3 C

SEATING

PLANE

BOTTOM VIEW

SIDE VIEW

0.10 CAB

b6X

DETAIL A

0.127 +0.058

0.127±0.008

CO.2

1.00 REF

DAP SIZE 1.30 x 0.76

-0.008

TERMINAL THICKNESS

0.30

1.00 0.45

0.50

0.25

1.25

2.00

1.00

LAND PATTERN 6

L6.1.6x1.6A

6 LEAD ULTRA THIN DUAL FLAT NO-LEAD PLASTIC PACKAGE

SYMBOL

MILLIMETERS

NOTESMIN NOMINAL MAX

A0.45 0.50 0.55 -

A1 - - 0.05 -

A3 0.127 REF -

b0.15 0.20 0.25 -

D1.55 1.60 1.65 4

D2 0.40 0.45 0.50 -

E1.55 1.60 1.65 4

E2 0.95 1.00 1.05 -

e0.50 BSC -

L0.25 0.30 0.35 -

Rev. 1 6/06

NOTES:

1. Dimensions are in mm. Angles in degrees.

2. Coplanarity applies to the exposed pad as well as the terminals.

Coplanarity shall not exceed 0.08mm.

3. Warpage shall not exceed 0.10mm.

4. Package length/package width are considered as special

characteristics.

5. JEDEC Reference MO-229.

6. For additional information, to assist with the PCB Land Pattern

Design effort, see Intersil Technical Brief TB389.

14 FN6156.5

February 20, 2008

ISL28191, ISL28291

Small Outline Package Family (SO)

GAUGE

PLANE

A1 L

DETAIL X 4° ±4°

SEATING

PLANE

0.010 BMCA

0.004 C

0.010 BMCA

(N/2)

NN (N/2)+1

PIN #1

I.D. MARK

h X 45°

SEE DETAIL “X”

0.010

MDP0027

SMALL OUTLINE PACKAGE FAMILY (SO)

SYMBOL

INCHES

TOLERANCE NOTESSO-8 SO-14

SO16

(0.150”)

SO16 (0.300”)

(SOL-16)

SO20

(SOL-20)

SO24

(SOL-24)

SO28

(SOL-28)

A 0.068 0.068 0.068 0.104 0.104 0.104 0.104 MAX -

A1 0.006 0.006 0.006 0.007 0.007 0.007 0.007 ±0.003 -

A2 0.057 0.057 0.057 0.092 0.092 0.092 0.092 ±0.002 -

b 0.017 0.017 0.017 0.017 0.017 0.017 0.017 ±0.003 -

c 0.009 0.009 0.009 0.011 0.011 0.011 0.011 ±0.001 -

D 0.193 0.341 0.390 0.406 0.504 0.606 0.704 ±0.004 1, 3

E 0.236 0.236 0.236 0.406 0.406 0.406 0.406 ±0.008 -

E1 0.154 0.154 0.154 0.295 0.295 0.295 0.295 ±0.004 2, 3

e 0.050 0.050 0.050 0.050 0.050 0.050 0.050 Basic -

L 0.025 0.025 0.025 0.030 0.030 0.030 0.030 ±0.009 -

L1 0.041 0.041 0.041 0.056 0.056 0.056 0.056 Basic -

h 0.013 0.013 0.013 0.020 0.020 0.020 0.020 Reference -

N 8 14 16 16 20 24 28 Reference -

Rev. M 2/07

NOTES:

1. Plastic or metal protrusions of 0.006” maximum per side are not included.

2. Plastic interlead protrusions of 0.010” maximum per side are not included.

3. Dimensions “D” and “E1” are measured at Datum Plane “H”.

4. Dimensioning and tolerancing per ASME Y14.5M-1994

15 FN6156.5

February 20, 2008

ISL28191, ISL28291

Ultra Thin Quad Flat No-Lead Plastic Package (UTQFN)

0.10 C

0.05 CA

0.10 C

SEATING PLANE

INDEX AREA

TOP VIEW

SIDE VIEW

NX (b)

SECTION "C-C" e

TERMINAL TIP

(A1)

0.10 C

NX L

BOTTOM VIEW

PIN #1 ID

(DATUM A)

(DATUM B)

0.10 M CAB

0.05 M C

NX b

10X

0.50

0.20

0.40

1.80

0.40

0.20

2.20

1.00

0.60

1.00

LAND PATTERN

L10.1.8x1.4A

10 LEAD ULTRA THIN QUAD FLAT NO-LEAD PLASTIC

PACKAGE

SYMBOL

MILLIMETERS

NOTESMIN NOMINAL MAX

A 0.45 0.50 0.55 -

A1 - - 0.05 -

A3 0.127 REF -

b 0.15 0.20 0.25 5

D 1.75 1.80 1.85 -

E 1.35 1.40 1.45 -

e 0.40 BSC -

L 0.35 0.40 0.45 -

L1 0.45 0.50 0.55 -

N102

Nd 2 3

Ne 3 3

θ0-12 4

Rev. 3 6/06

NOTES:

1. Dimensioning and tolerancing conform to ASME Y14.5-1994.

2. N is the number of terminals.

3. Nd and Ne refer to the number of terminals on D and E side,

respectively.

4. All dimensions are in millimeters. Angles are in degrees.

5. Dimension b applies to the metallized terminal and is measured

between 0.15mm and 0.30mm from the terminal tip.

6. The configuration of the pin #1 identifier is optional, but must be

located within the zone indicated. The pin #1 identifier may be

either a mold or mark feature.

7. Maximum package warpage is 0.05mm.

8. Maximum allowable burrs is 0.076mm in all directions.

9. JEDEC Reference MO-255.

10. For additional information, to assist with the PCB Land Pattern

Design effort, see Intersil Technical Brief TB389.

All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.

Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality

Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without

notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and

reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result

from its use. No lice nse is gran t ed by i mpli catio n or other wise u nder an y p a tent or patent rights of Intersil or its subsidiari es.

For information regarding Intersil Corporation and its products, see www.intersil.com

FN6156.5

February 20, 2008

ISL28191, ISL28291

Mini SO Package Family (MSOP)

1(N/2)

(N/2)+1

PLANE

SEATING

N LEADS

0.10 C

PIN #1

I.D.

E1E

DETAIL X

3° ±3°

GAUGE

PLANE

SEE DETAIL "X"

0.25

A1 L

0.25 C A B

0.08 C A B

MDP0043

MINI SO PACKAGE FAMILY

SYMBOL

MILLIMETERS

TOLERANCE NOTESMSOP8 MSOP10

A 1.10 1.10 Max. -

A1 0.10 0.10 ±0.05 -

A2 0.86 0.86 ±0.09 -

b 0.33 0.23 +0.07/-0.08 -

c 0.18 0.18 ±0.05 -

D 3.00 3.00 ±0.10 1, 3

E 4.90 4.90 ±0.15 -

E1 3.00 3.00 ±0.10 2, 3

e 0.65 0.50 Basic -

L 0.55 0.55 ±0.15 -

L1 0.95 0.95 Basic -

N 8 10 Reference -

Rev. D 2/07

NOTES:

1. Plastic or metal protrusions of 0.15mm maximum per side are not

included.

2. Plastic interlead protrusions of 0.25mm maximum per side are

not included.

3. Dimensions “D” and “E1” are measured at Datum Plane “H”.

4. Dimensioning and tolerancing per ASME Y14.5M-1994.