TC74VHC374F/FT/FK
2007-10-01
1
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
TC74VHC374F,TC74VHC374FT,TC74VHC374FK
Octal D-Type Flip Flop with 3-State Output
The TC74VHC374 is an advanced high speed CMOS OCTAL
FLIP-FLOP with 3-STATE OUTPUT fabricated with silicon gate
C2MOS technology.
It achieves the high speed operation similar to equivalent
Bipolar Schottky TTL while maintaining the CMOS low power
dissipation.
This 8-bit D-type flip-flop is controlled by a clock input (CK)
and an output enable input ( OE ).
When the OE input is high, the eight outputs are in a high
impedance state.
An input protection circuit ensures that 0 to 5.5 V can be
applied to the input pins without regard to the supply voltage.
This device can be used to interface 5 V to 3 V systems and two
supply systems such as battery back up. This circuit prevents
device destruction due to mismatched supply and input voltages.
Features
• High speed: fmax = 185 MHz (typ.) at VCC = 5 V
• Low power dissipation: ICC = 4 μA (max) at Ta = 25°C
• High noise immunity: VNIH = VNIL = 28% VCC (min)
• Power down protection is provided on all inputs.
• Balanced propagation delays: tpLH ∼
−
tpHL
• Wide operating voltage range: VCC (opr) = 2 to 5.5 V
• Low noise: VOLP = 0.9 V (max)
• Pin and function compatible with 74ALS374
Weight
SOP20-P-300-1.27A : 0.22 g (typ.)
TSSOP20-P-0044-0.65A : 0.08 g (typ.)
VSSOP20-P-0030-0.50 : 0.03 g (typ.)
TC74VHC374F
TC74VHC374FT
TC74VHC374FK
TC74VHC374F/FT/FK
2007-10-01
2
Pin Assignment IEC Logic Symbol
Truth Table
Inputs
OE CK D
Output
H X X Z
L X Qn
L L L
L H H
X: Don’t care
Z: High impedance
Qn: No change
System Diagram
OE
CK
11
3
2
CK Q
D
Q1
D1
5
CK Q
D
Q2
D2
6
CK Q
D
Q3
D3
9
CK Q
D
Q4
D4
12
CK Q
D
Q5
D5
15
CK Q
D
Q6
D6
16
CK Q
D
Q7
D7
19
CK Q
D
Q0
D0
4 7 8 13 14 17 18
1
D
(11)
(1)
(3)
(7)
(4)
D1
1D
D3
D2
(13)
(8)
(14)
D5
D4
(2)
(6)
(12)
Q1
Q3
Q5
(5)
(9)
(15)
Q2
Q4
Q6
EN
C1
CK
OE
D6 (17)
(18)
D7
(16)
Q7
(19)
Q0
D0
VCC
16
D6
Q6
Q5 15
14
13
12
11
20
OE 1
2
3
4
5
6
7
Q2
D2
D3
Q3
Q0
D5
8
D7
19
D4
Q7
D1
Q1
18
9
D0
GND 10 CK
17
Q4
(top view)
TC74VHC374F/FT/FK
2007-10-01
3
Absolute Maximum Ratings (Note)
Characteristics Symbol Rating Unit
Supply voltage range VCC −0.5 to 7.0 V
DC input voltage VIN −0.5 to 7.0 V
DC output voltage VOUT −0.5 to VCC + 0.5 V
Input diode current IIK −20 mA
Output diode current IOK ±20 mA
DC output current IOUT ±25 mA
DC VCC/ground current ICC ±75 mA
Power dissipation PD 180 mW
Storage temperature Tstg −65 to 150 °C
Note: Exceeding any of the absolute maximum ratings, even briefly, lead to deterioration in IC performance or
even destruction.
Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly
even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute
maximum ratings and the operating ranges.
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook
(“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test
report and estimated failure rate, etc).
Operating Ranges (Note)
Characteristics Symbol Rating Unit
Supply voltage VCC 2.0 to 5.5 V
Input voltage VIN 0 to 5.5 V
Output voltage VOUT 0 to VCC V
Operating temperature Topr −40 to 85 °C
Input rise and fall time dt/dv 0 to 100 (VCC = 3.3 ± 0.3 V)
0 to 20 (VCC = 5 ± 0.5 V) ns/V
Note: The operating ranges must be maintained to ensure the normal operation of the device.
Unused inputs must be tied to either VCC or GND.
TC74VHC374F/FT/FK
2007-10-01
4
Electrical Characteristics
DC Characteristics
Test Condition Ta = 25°C Ta =
−40 to 85°C
Characteristics Symbol
VCC (V) Min Typ. Max Min Max
Unit
High-level input
voltage VIH ―
2.0
3.0 to
5.5
1.50
VCC ×
0.7
―
―
―
―
1.50
VCC ×
0.7
―
― V
Low-level input
voltage VIL ―
2.0
3.0 to
5.5
―
―
―
―
0.50
VCC ×
0.3
―
―
0.50
VCC ×
0.3
V
IOH = −50 μA
2.0
3.0
4.5
1.9
2.9
4.4
2.0
3.0
4.5
―
―
―
1.9
2.9
4.4
―
―
―
High-level output
voltage VOH VIN
= VIH or VIL
IOH = −4 mA
IOH = −8 mA
3.0
4.5
2.58
3.94
―
―
―
―
2.48
3.80
―
―
V
IOL = 50 μA
2.0
3.0
4.5
―
―
―
0.0
0.0
0.0
0.1
0.1
0.1
―
―
―
0.1
0.1
0.1
Low-level output
voltage VOL VIN
= VIH or VIL
IOL = 4 mA
IOL = 8 mA
3.0
4.5
―
―
―
―
0.36
0.36
―
―
0.44
0.44
V
3-state output
off-state current IOZ VIN = VIH or VIL
VOUT = VCC or GND 5.5 ― ― ±0.25 ― ±2.50 μA
Input leakage
current IIN VIN = 5.5 V or GND 0 to 5.5 ― ― ±0.1 ― ±1.0 μA
Quiescent supply
current ICC VIN = VCC or GND 5.5 ― ― 4.0 ― 40.0 μA
Timing Requirements (input: tr = tf = 3 ns)
Test Condition Ta = 25°C
Ta =
−40 to
85°C
Characteristics Symbol
VCC (V) Typ. Limit Limit
Unit
Minimum pulse width
(CK)
tw (H)
tw (L)
― 3.3 ± 0.3
5.0 ± 0.5
―
―
5.0
5.0
5.5
5.0 ns
Minimum set-up time ts ― 3.3 ± 0.3
5.0 ± 0.5
―
―
4.5
3.0
4.5
3.0 ns
Minimum hold time th ― 3.3 ± 0.3
5.0 ± 0.5
―
―
2.0
2.0
2.0
2.0 ns
TC74VHC374F/FT/FK
2007-10-01
5
AC Characteristics (input: tr = tf = 3 ns)
Test Condition Ta = 25°C Ta =
−40 to 85°C
Characteristics Symbol
VCC (V) CL (pF) Min Typ. Max Min Max
Unit
15 ― 8.1 12.7 1.0 15.0
3.3 ± 0.3
50 ― 10.6 16.2 1.0 18.5
15 ― 5.4 8.1 1.0 9.5
Propagation delay
time
(CK-Q)
tpLH
tpHL
―
5.0 ± 0.5
50 ― 6.9 10.1 1.0 11.5
ns
15 ― 7.1 11.0 1.0 13.0
3.3 ± 0.3
50 ― 9.6 14.5 1.0 16.5
15 ― 5.1 7.6 1.0 9.0
3-state output enable
time
tpZL
tpZH
RL = 1 kΩ
5.0 ± 0.5
50 ― 6.6 9.6 1.0 11.0
ns
3.3 ± 0.3 50 ― 10.2 14.0 1.0 16.0
3-state output disable
time
tpLZ
tpHZ
RL = 1 kΩ
5.0 ± 0.5 50 ― 6.1 8.8 1.0 10.0
ns
15 80 130 ― 70 ―
3.3 ± 0.3
50 55 85 ― 50 ―
15 130 185 ― 110 ―
Maximum clock
frequency fmax ―
5.0 ± 0.5
50 85 120 ― 75 ―
MHz
3.3 ± 0.3 50 ― ― 1.5 ― 1.5
Output to output skew tosLH
tosHL (Note 1)
5.0 ± 0.5 50 ― ― 1.0 ― 1.0
ns
Input capacitance CIN ― ― 4 10 ― 10 pF
Output capacitance COUT ― ― 6 ― ― ― pF
Power dissipation
capacitance CPD (Note 2) ― 32 ― ― ― pF
Note 1: Parameter guaranteed by design.
tosLH = |tpLHm − tpLHn|, tosHL = |tpHLm − tpHLn|
Note 2: CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating
current consumption without load.
Average operating current can be obtained by the equation:
ICC (opr) = CPD·VCC·fIN + ICC/8 (per F/F)
And the total CPD when n pcs. of latch operate can be gained by the following equation:
CPD (total) = 20 + 12·n
TC74VHC374F/FT/FK
2007-10-01
6
Noise Characteristics (input: tr = tf = 3 ns)
Test Condition Ta = 25°C
Characteristics Symbol
VCC (V) Typ. Max
Unit
Quiet output maximum dynamic VOL V
OLP CL = 50 pF 5.0 0.5 0.8 V
Quiet output minimum dynamic VOL V
OLV CL = 50 pF 5.0 −0.5 −0.8 V
Minimum high level dynamic input voltage VIHD CL = 50 pF 5.0 ― 3.5 V
Maximum low level dynamic input voltage VILD CL = 50 pF 5.0 ― 1.5 V
Input Equivalent Circuit
INPUT
TC74VHC374F/FT/FK
2007-10-01
7
Package Dimensions
Weight: 0.22 g (typ.)
TC74VHC374F/FT/FK
2007-10-01
8
Package Dimensions
Weight: 0.08 g (typ.)
TC74VHC374F/FT/FK
2007-10-01
9
Package Dimensions
Weight: 0.03 g (typ.)
TC74VHC374F/FT/FK
2007-10-01
10
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