HFBR-7934WZ/EWZ/HWZ/EHWZ
Four-Channel Pluggable Parallel Fiber Optic Transceiver
Data Sheet
Description
The HFBR-7934WZ transceiver is a high performance ber
optic module for parallel optical data communication
applications. It incorporates 8 independent data chan-
nels (4 for transmit and 4 for receive) operating from 1
to 3.125 Gb/s 8B/10B encoded per channel providing a
cost eective solution for very short reach applications
requiring 12.5 Gb/s aggregate bandwidth. The module
is designed to operate on multimode ber systems at
a nominal wavelength of 850 nm. It incorporates high
performance, highly reliable, short wavelength optical
devices coupled with proven circuit technology to pro-
vide long life and consistent service.
The HFBR-7934WZ transceiver module incorporates a 4
channel VCSEL (Vertical Cavity Surface Emitting Laser)
array together with a custom 4 channel laser driver
integrated circuit providing IEC-825 and CDRH Class
1M laser eye safety. It also contains a 4 channel PIN
photodiode array coupled with a custom preamplier
/ post amplier integrated circuit.
Operating on 3.3 V power supply this module provides
LVTTL/LVCMOS control interfaces and CML compatible
high speed data lines which simplify external circuitry.
The transceiver is housed in MTP®/MPO receptacled pack-
age with integral nned heatsink. Electrical connections
to the device are achieved by means of a pluggable
10x10 connector array.
Features
• RoHS Compliant
• Four Transmit and Four Receive Channels; 1 to 3.125
Gb/s 8B/10B encoded per channel
• Compatible with SONET scrambled and 8B10B en-
coded data formats
• 850 nm VCSEL array source
• Conforms to “POP4” Four-Channel Pluggable Optical
Transceiver Multisource Agreement
• 50/125 µm multimode ber operation
• Distance up to 150 m with
500 MHz.km ber at 3.125 Gb/s
• Distance up to 350 m with
2000 MHz.km ber at 3.125 Gb/s
• Pluggable package
• Outputs (Tx & Rx) are squelched for loss of signal
• Control I/O is compatible with LVTTL and LVCMOS
• Standard MTP® MPO ribbon ber connector interface
• Integrated heat sink
• Manufactured in an ISO 9002 certied facility
• Rx Signal Detect
Applications
• Telecom and Datacom Switch/Router Rack-to-Rack
Connections
• Computer Cluster Interconnects
2
Figure 1. Block Diagram (dimensions in mm)
Figure 2. Case temperature measurement
VCSEL
Array
Input
Stage
DIN Ch 0 - 3 +
Driver
4 Channels
Driver
PIN Array
Input
Stage
Control
Vcc_TX
GND_TX
Vcc_RX
GND_RX
DIN Ch 0 - 3 -
DOUT Ch 0 - 3 +
DOUT Ch 0 - 3 -
4 Channels
TX_DIS
TX_EN
TX_FAULT*
TX_RESET*
SD
POINT FOR TAKING
MODULE TEMPERATURE
Bar Code
Part Number
Agilent
0
5
10
15
20
25
0 0.5 1 1.5 2
Air Velocity (m/s)
Module Case Temperature Rise Above Ambient ( C)
Figure 3. Ambient air temperature and air ow for TC = +80 °C
3
Package Dimensions
Figure 4B - HFBR-7934EWZ Package dimensions (dimensions in mm)
Notes:
1. Module mass approximately 20 grams.
Figure 4A - HFBR-7934WZ Package dimensions (dimensions in mm)
4
Figure 5B - HFBR-7934EHWZ Package Dimensions (dimensions in mm)
Figure 5A - HFBR-7934HWZ Package Dimensions (dimensions in mm)
5
Figure 6 - Package Board Footprint (dimensions in mm)
2 x ∅ 2.54 MIN. PAD KEEP-OUT
18.42 MIN.
13.72
50
KEEP-OUT AREA
FOR MPO CONNECTOR
6.73
30.23
1.89 REF.
6.73
9 x 1.27 TOT = 11.43
8.95 REF.
FRONT
SYM.
9 x 1.27 TOT = 11.43
18 REF.
SYM.
END OF
MODULE
2 x ∅ 1.7 ± 0.05 HOLES
3 x ∅ 4.17 MIN. PAD KEEP-OUT
3 x ∅ 2.69 ± 0.05 HOLES
FOR #2 SCREW
(10 x 10 =) 100 x ∅ 0.58 ± 0.05 PADS
PCB TOP VIEW
100 PIN FCI
MEG-Array® RECEPTACLE
CONNECTORS
∅ 0.1 A B-C
∅ 0.1 A B-C
∅ 0.1 A B-C
∅ 0.1 A B-C
B
A
C
∅ 0.05 A B-C
19.02 min 0.50 max
13.40 ± 0.2
3.60 ± 0.2
15.70 ± 0.25 35.31+/- 0.20
PCB
PCB
Front Panel
NOTE: The host electrical connector attached to the PCB must be a 100-position FCI Meg-Array® plug (FCI PN: 84512-102) or equivalent.
Figure 7 - Host Frontplate Layout (dimensions in mm)
6
Absolute Maximum Ratings
Stresses in excess of the absolute maximum ratings can cause catastrophic damage to the device. Limits apply to each parame-
ter in isolation, all other parameters having values within the recommended operating conditions. It should not be assumed that
limiting values of more than one parameter can be applied to the product at the same time. Exposure to the absolute maximum
ratings for extended periods can adversely aect device reliability.
Parameter Symbol Minimum Typical Maximum Unit Reference
Storage Temperature TS-40 +100 ºC
Supply Voltage VCC -0.5 4.6 V
Data/Control Signal Input Voltage VI-0.5 VCC + 0.5 V
Transmitter Dierential Input Voltage | VD | 2 V 1
Output Current (dc) ID25 mA
Relative Humidity (Non Condensing) RH 5 95 %
Parameter Symbol Minimum Typical Maximum Unit Reference
Case Temperature TC0 +80 ºC 2, Figures 2,
Supply Voltage VCC 3.135 3.3 3.465 V Figure 8
Signaling Rate/Channel 1 3.125 GBd 6
Data Input Dierential
Peak-to-PeakVoltage Swing
DVDINP-P 175 1600 mVP-P 3, Figures 11,12
Data Input Rise & Fall Time (20-80%) tr, tf160 ps
Control Input Voltage High VIH 2.0 VCC V
Control Input Voltage Low VIL VEE 0.8 V
Power Supply Noise NP200 mVP-P 4, Figure 8
Data I/O Coupling Capacitors CAC 0.1 µF 5, Figure 9
Receiver Dierential Data Output Load RDL 100 WFigure 9
Transmitter Input Electrical
Deterministic Jitter
DJ 0.15
48
UI
ps
Transmitter Input Electrical Total Jitter TJ 0.33
106
UI
ps
Notes:
1. This is the maximum voltage that can be applied across the Transmitter Dierential Data Inputs without damaging the input circuit.
2. Case Temperature is measured as indicated in Figure 2.
3. Data inputs are CML compatible. Coupling capacitors are required to block dc. DVDIN p-p = DVDINH - DVDINL, where DVDINH = High State Dif-
ferential Data Input Voltage and DVDINL = Low State Dierential Data Input Voltage.
4. Power Supply Noise is dened at the supply side of the recommended lter for all VCC supplies over the frequency range from 500 Hz to 2700
MHz with the recommended power supply lter in place.
5. For data patterns with restricted run lengths, e.g. 8B10B encoded data, smaller value capacitors may provide acceptable results.
6. 8B/10B encoded
Recommended Operating Conditions
Recommended Operating Conditions specify conditions for which the optical and electrical characteristics hold. Optical and
electrical characteristics are not specied for operation beyond the Recommended Operating Conditions, reliability is not im-
plied and damage to the device may occur for such operation over an extended time period.
7
Transmitter Electrical Characteristics
(Over recommended operating conditions: Tc= 0ºC to +80ºC, Vcc=3.3V + 5%)
Parameter Symbol Minimum Typical Maximum Unit Reference
Dierential Input Impedance Zin 80 100 120 W1, Figure 9
FAULT* Assert time TOFF 100 µs Figure 13
RESET* Assert time TOFF 7.5 µs Figure 14
RESET* De-assert time TON 18 ms Figure 14
Transmit Enable (TX_EN) Assert time TON 18 ms Figure 15
Transmit Enable (TX_EN) De-assert time TOFF 7.5 µs Figure 15
Transmit Disable (TX_DIS) Assert time TOFF 7.5 µs Figure 15
Transmit Disable (TX_DIS) De-assert time TON 18 ms Figure 15
Power-On Initiation Time 21 ms Figure 17
Control I/Os
TX _DIS, TX_EN,TX_
FAULT*,TX_RESET*
Input Current High | IIH | 0.5 mA 2.0 V < VIH < VCC
Input Current Low | IIL | 0.5 mA VEE < VIH < 0.8 V
Output Voltage Low VOL VEE 0.4 V IOL = 4.0 mA
Output Voltage High VOH 2.4 VCC V IOH = -0.5 mA
Parameter Symbol Minimum Typical Maximum Unit Reference
Optical Modulation Amplitude OMA -7.22 dBm
Center Wavelength lC830 850 860 nm
Spectral Width - rms s0.85 nm rms
Rise, Fall Time tr, tf60 100 ps 2
Inter-channel Skew 50 100 ps 3
Relative Intensity Noise OMA RIN12OMA -119.5 dB/Hz
Jitter Contribution Deterministic DJ 60 ps 4
Total TJ 120 ps 5
Output Optical Power, 50/125 um, Fiber NA =0.2 POUT -2.0 dBm Avg. 6
Notes:
1. Dierential impedance is measured between Din+ and Din- over the range 4 MHz to 2 GHz.
2. These are unltered 20% - 80% values measured with a 550 MBd 101010 pattern.
3. Inter-channel Skew is dened for the condition of equal amplitude, zero ps skew input signals.
4. Deterministic Jitter (DJ) is dened as the combination of Duty Cycle Distortion (Pulse-Width Distortion) and Data Dependent Jitter. Determin-
istic Jitter is measured at the 50% signal threshold level using a 3.125 GBd Pseudo Random Bit Sequence of length 27 -1 (PBRS7), or equiva-
lent, test pattern with zero skew between the dierential data input signals.
5. Total Jitter (TJ) includes Deterministic Jitter and Random Jitter (RJ). Total Jitter is specied at a BER of 10-12 for the same 3.125 GBd test pat-
tern as for DJ and is measured with all channels operating.
6. The specied optical output power, measured at the output of a 2meter test cable, will be compliant with IEC 60825-1 Amendment 2, Class
1M Accessible Emission Limits, AEL Regulatory Compliance section.
Transmitter Optical Characteristics
(Over recommended operating conditions: Tc= 0ºC to +80ºC, Vcc=3.3V + 5%)
8
Receiver Electrical Characteristics
(Over recommended operating conditions: Tc= 0ºC to +80ºC, Vcc=3.3V + 5%)
Parameter Symbol Minimum Typical Maximum Unit Reference
Dierential Output Impedance ZOUT 100 W1, Figure 9
Data Output Dierential
Peak-to-Peak Voltage Swing
DVDOUTP-P 500 650 800 mVP-P 2, Figure 10
Inter-channel Skew 50 100 ps 3
Data Output Rise, Fall Time tr, tf120 150 ps 4
Control I/O
Signal Detect
LVTTL & LVCMOS
Compatible
Output Voltage Low VOL VEE 0.4 V IOL = 4.0 mA
Output Voltage High VOH 2.4 VCC V IOH = -0.5 mA
Assert Time (OFF-to-ON) tSDA 50 µs 5
De-assert Time (ON-to-OFF) tSDD 50 µs 6
Optical Link Output Deterministic Jitter DJ 0.4
128
UI
ps
7
Optical Link Output Total Jitter TJ 0.7
225
UI
ps
7
Receiver Electrical Output Eye Opening 0.3
96
UI
ps
7
Parameter Symbol Minimum Typical Maximum Unit Reference
Input OMA - Sensitivity PINMIN -14.22 dBm OMA 8
Input Optical Power - Saturation PIN MAX -2.0 dBm avg.
Operating Center Wavelength lC830 860 nm
Return Loss 12 dB 9
Signal Detect Asserted PA-21 -16 dBm 10
Deasserted PD-30 -26 dBm
Hysteresis PA - PD0.5 1.0 dB
Contributed Deterministic Jitter DJ 0.063
20
UI
ps
Contributed Total Jitter TJ 0.214
68
UI
ps
Notes:
1. Measured over the range 4 MHz to 2 GHz.
2. DVDoutP-P = DVDoutH - DVDoutL, where DVDoutH = High State Dierential Data Output Voltage and DVDoutL = Low State Dierential Data Output
Voltage. DVDoutH and DVDoutL = VDout+ - VDout-, measured with a 100 W dierential load connected with the recommended coupling capaci-
tors and with a 2500 MBd, 101010 pattern.
3. Inter-channel Skew is dened for the condition of equal amplitude, zero ps skew input signals.
4. Rise and Fall Times are measured between the 20% and 80% levels using a 550 MHd square wave signal.
5. The Signal Detect output will change from logic “0” (Low) to “1” (High) within the specied assert time for a step transition in optical input
power from the deasserted condition to the specied asserted optical power level.
6. The Signal Detect output will change from logic “1” (High) to “0” (Low) within the specied de-assert time for a step transition in optical input
power from the specied asserted optical power level to the deasserted condition.
7. Assumes a link where the transmitter is an HFBR-7934WZ or equivalent operating per the recommended operating conditions and with
maximum cable links.
8. Sensitivity is dened as the maximum Input OMA necessary to produce a BER < 10-12 at the center of the signal period. For this parameter,
input OMA is equivalent to that provided by an ideal source, i.e. one with RIN and switching attributes that do not degrade the sensitivity
measurement. All channels not under test are operating receiving data with an average input OMA of up to 6 dB above PIN MIN. Sensitivity
for signal rates from 1 to 3.125 GBd is dened for 8B/10B encoded data.
9. Return loss is dened as the ratio, in dB, of the received optical power to the optical power reected back down the ber.
10. Signal Detect assertion requires all optical inputs to exhibit a minimum OMA of -16dBm. All channels not under test are operating with PRBS7
patterns, asynchronous with the channel under test, and average input power of up to 6 dB above the specied PIN MIN.
Receiver Optical Characteristics
(Over recommended operating conditions: Tc= 0ºC to +80ºC, Vcc=3.3V + 5%)
9
General/Control Electrical Characteristics
(Over recommended operating conditions: Tc= 0ºC to +80ºC, Vcc=3.3V + 5%)
Parameter Symbol Minimum Typical Maximum Unit Reference
Supply Current ICCT 300 420 mA
Power Dissipation PDIST 1.0 1.46 W
Regulatory Compliance
The overall equipment design will determine the certi-
cation level. The module performance is oered as a
gure of merit to assist the designer in considering their
use in equipment designs.
Electrostatic Discharge (ESD)
There are two design cases in which immunity to ESD
damage is important.
The rst case is during handling of the module prior
to mounting it on the circuit board. It is important to
use normal ESD handling precautions for ESD sensitive
devices. These precautions include using grounded wrist
straps, workbenches and oor mats in ESD controlled
areas. The module performance has been shown to
provide adequate performance in typical industry pro-
duction environments.
The second case to consider is static discharges to the
exterior of the equipment chassis containing the mod-
ule parts. To the extent that the MT-based connector
receptacle is exposed to the outside of the equipment
chassis it may be subject to whatever system-level ESD
test criteria that the equipment is intended to meet. The
module performance exceeds typical industry equipment
requirements of today.
Electromagnetic Interference (EMI)
Most equipment designs using these high-speed mod-
ules from Avago Technologies will be required to meet
the requirements of FCC in the United States, CENELEC
EN55022 (CISPR 22) in Europe and VCCI in Japan. These
modules, with their shielded design, perform to the limits
listed in Table 1 to assist the designer in the management
of the overall equipment EMI performance.
Immunity
Equipment utilizing these modules will be subject to
radio frequency electromagnetic elds in some environ-
ments. These modules have good immunity to such
elds due to their shielded design.
Eye Safety
These 850 nm VCSEL-based transceiver modules provide
eye safety by design.
The HFBR-7934WZ has been registered with CDRH and
certied by TUV as a Class 1M device under Amendment
2 of IEC 60825-1. See the Regulatory Compliannce Table
for further detail. If Class 1M exposure is possible, a
safety-warning label should be placed on the product
stating the following:
LASER RADIATION
DO NOT VIEW DIRECTLY WITH OPTICAL INSTRUMENTS.
CLASS 1M LASER PRODUCT
MTP®(MPO) Optics Cleaning Statement
The optical port has recessed optics that are visible
through the nose of the port. The port plug provided
should be installed whenever a ber cable is not con-
nected. This ensures the optics remain clean and no
cleaning should be necessary. In the event of the optics
being contaminated, forced nitrogen or dry clean air at
less than 20 psi is the recommended cleaning agent.
The features of the optical port and guide pins preclude
the use of any solid instrument. Liquids are not advised
due to potential damage.
Application of wave soldering, reow soldering and/or
aqueous wash processes with the HFBR-7934WZ mod-
ules device on board is not recommended as damage
may occur.
Normal handling precautions for electrostatic sensitive
devices should be taken (see ESD section).
10
Table 1 - Regulatory Compliance
Notes:
24. EMI performance only refers to shielded version (HFBR-7934EWZ and HFBR-7934HEWZ).
25. EMI performance could be improved by connecting the following pads to electrical ground : C9, G7 and H9.
Feature Test Method Performance
Electrostatic Discharge
(ESD to the Electrical Pads)
JEDEC Human Body (HBM)
(JESD22-A114-B)
JEDEC Machine Model (MM)
Module > 1000 V
Module > 50 V
Electrostatic Discharge
(ESD to the Connector
Receptacle)
Variation of IEC 61000-4-2 Typically withstand at least 6 kV
(module biased) without damage when the
connector receptacle is contacted by a Human
Body Model probe
Electromagnetic Interfer-
ence (EMI)
FCC Class B
CENELEC EN55022 Class B
(CISPR 22A) VCCI Class 1
Typically pass with 5 dB margin.
(See Notes 24 and 25)
Immunity Variation of IEC 61000-4-3 Typically show no measurable eect from a 10
V/m eld swept from 80 MHz to 1 GHz applied
to the module without a chassis enclosure.
Laser Eye Safety
and Equipment Type
Testing
IEC 60825-1 Amendment 2
CFR 21 Section 1040
IEC AEL & US FDA CDRH Class 1M
CDRH Accession Number: 9720151-22
TUV Bauart License: E2171095.04
Component
Recognition
Underwriters Laboratories and Canadian Stan-
dards Association Joint Component Recogni-
tion for Information Technology Equipment
Including Electrical Business Equipment.
UL File Number: E173874
RoHS Compliance Less than 1000 ppm of cadmium, lead, mercury,
hexavalent chromium,polybrominated biphe-
nyls, and polybrominated biphenyl ethers.
11
4+4 Transceiver Module Pad Assignment - HFBR-7934WZ
DOUT00-
K
VEE RX
J
DOUT03+
H
VEE RX
G
VEE RX
F
VEE TX
E
VEE TX
D
DIN03-
C
VEE TX
B
DIN00+
A
1
DOUT00+ VEE RX DOUT03- VEE RX VEE RX VEE TX VEE TX DIN03+ VEE TX DIN00-2
VEE RX VEE RX VEE RX VEE RX VEE RX VEE TX VEE TX VEE TX VEE TX VEE TX3
DOUT1+ VEE RX DOUT02- DNC DNC DNC DNC DIN02+ VEE TX DIN01-4
DOUT1- VEE RX DOUT02+ DNC DNC DNC DNC DIN02- VEE TX DIN01+5
VEE RX VEE RX VEE RX DNC DNC DNC DNC VEE TX VEE TX VEE TX6
VCCB RX VCCB RX VCCB RX DNC DNC DNC DNC VCC TX VCC TX VCC TX7
DNC
Reserved
TBD MSA
Reserved
TBD MSA
Reserved
TBD MSA
DNC TX_DIS TX_EN DNC DNC DNC8
DNC
Reserved
TBD MSA
Reserved
TBD MSA
SD DNC RESET* FAULT* DNC DNC DNC9
VCCA RX VCCA RX VEE RX DNC DNC DNC DNC VEE TX VCC TX VCC TX10
TOP VIEW (PCB LAYOUT)
(10 x 10 ARRAY)
12
Table 2. Transceiver Module Pad Description
Symbol Functional Description
Din Ch 0 - 3 +/-
through
Din Ch 0 - 3 +/-
Transmitter dierential data inputs for channels 0 through 3: Data inputs are CML compatible.
TX_DIS Transmitter Disable: LVCMOS Input (Internal pull down). Control input used to turn o the
transmitter optical outputs. High Active. VCSEL array is o when High. Normal operation is
enabled when Low.
TX_EN Transmitter Enable: LVCMOS Input (Internal pull up). Control input used to enable the trans-
mitter optical outputs. High Active. VCSEL array is o when Low. Normal operation is enabled
when High.
TX_FAULT* Transmitter Fault: LVCMOS Output. Transmitter status output indicating an eye-safety over-cur-
rent condition for any VCSEL, an out of temperature range condition and/or a calibration data
corruption detection. High output state indicates normal operation. Low output state indicates
the fault condition. An asserted FAULT* condition disables the VCSEL array and is cleared by
TX_RESET*.
TX_RESET* Transmitter Reset: LVCMOS Input (Internal pull up). Control input used to reset the transmitter
logic functions. Active Low. VCSEL array is o when Low. Normal operation is enabled when
High.
VEE_TX Transmitter signal common. All transmitter voltages are referenced to this potential unless oth-
erwise stated. Directly connect these pads to the PC board transmitter ground plane.
VCC_TX Transmitter power supply.
Dout Ch 0 - 3 +/-
through
Dout Ch 0 - 3 +/-
Receiver dierential data outputs for channels 0 through 3: Data outputs are CML compatible.
Data outputs are squelched for de-asserted Signal Detect.
SD Receiver Signal Detect: LVCMOS Output. Receiver status output indicating valid signal in all
channels. High output state (asserted) indicates valid optical inputs to each and every channel.
Low output state (de-asserted) indicates loss of signal at any of the monitored receiver inputs.
All channels are monitored.
DNC Do NOT Connect. Do not connect to any electrical potential.
VEE_RX Receiver signal common. All receiver voltages are referenced to this potential unless otherwise
stated. Directly connect these pads to the PC board receiver ground plane.
VCCA_RX Pin preamplier power supply rail.
VCCB_RX Receiver quantizer power supply rail.
VCCA_RX and VCCB_RX can be connected to the same power supply. However, to insure maximum receiver sensitivity and
minimize the impact of noise from the power supply, it is recommended to keep the power supplies separate and to use the
recommended power supply ltering network on VCCA_RX (see Figure 8).
Module Case Transceiver Case Common. Transceiver Case Common incorporates all exposed conductive sur-
faces and is electrically isolated from Transmitter Signal Common and Receiver Signal Common.
13
Figure 8 - Recommended power supply lter
VccA Rx
VccA Rx
VccB Rx
VccB Rx
VccB Rx
C12
0.1 µF
0603
C11
0.1 µF
0603
C10
10 µF
1210
C9
10 µF
1210
R6 1.0 kW 0603 R5 100 W 0603
L6 6.8 nH 0805 L5 1 µH 2220
VCC
Vcc Tx
Vcc Tx
Vcc Tx
Vcc Tx
HFBR-7934WZ
R4 1.0 kW 0603 R3 100 W0603
L4 6.8 nH 0805 L3 1 µH 2220
C8
0.1 µF
0603
C7
0.1 µF
0603
C6
10 µF
1210
C5
10 µF
1210
R2 1.0 kW 0603 R1 100 W 0603
L2 6.8 nH 0805 L1 1 µH 2220
C4
0.1 µF
0603
C3
0.1 µF
0603
C2
10 µF
1210
C1
10 µF
1210
VCC
VCC
14
Figure 9 - Recommended AC coupling and data signal termination
RECEIVER
DOUT+
DOUT-
DIN+
DIN-
CAC
CAC
ZIN
RDL
AC COUPLING CAPACITORS (DC BLOCKING CAPACITORS) SHOULD BE USED TO
CONNECT DATA OUTPUTS TO THE LOAD. THE DIFFERENTIAL DATA PAIR SHOULD BE
TERMINATED WITH A DIFFERENTIAL LOAD, RDL, OF 100 W USING EITHER AN INTERNAL
LOAD, ZIN, AS SHOWN ABOVE, OR AN EXTERNAL LOAD, IF NECESSARY.
DIN-
DIN+
ZIN
50 W
50 W
VBIAS
(NONIMAL 1.9V)
VCCT
VEE
DOUT+
VEE
50 W
DOUT-
VCC
50 W
Figure 11 - Transmitter data input equivalent circuit Figure 12 - Receiver data output equivalent
circuit.
Figure 10 - Dierential signals
15
Figure 13 - Transmitter FAULT* signal timing diagram
NO FAULT DETECTED FAULT DETECTED
TX OUT Ch 0 - 3
FAULT*
< 100 µs ~ 100 ns
TX_OUT Ch 3
TX_OUT Ch 2
TX_OUT Ch 1
7.5 µs (max)
SHUTDOWN NORMAL
RESET*
FAULT*
18 ms (max)
>100 ns
~4.2 ms
~4.6 ms
(typ)
TX_OUT Ch 0
Figure 14 - Transmitter RESET* timing diagram
16
Figure 15 - Transmitter TX_EN and TX_DIS timing diagram
~ 7.5 µs
TX_EN
TX OUT Ch 0 - 3
Normal Shutdown
(a)
~ 7.5 µs
TX_DIS
Normal Shutdown
TX OUT Ch 0 - 3
(b)
(c)
~4.2 ms ~4.6 ms
~18 ms
TX OUT Ch 0
TX OUT Ch 1
TX_EN [1]
TX OUT Ch 3
NOTE [1]: TX_DIS, WHICH IS
NOT SHOWN, IS THE
FUNCTIONAL COMPLEMENT OF
TX_EN.
TX OUT Ch 2
> 1 ms
~ 200 ns
~18 ms
~4.2 ms
TX_EN [1]
NOTE [1]. TX_DIS, WHICH IS NOT SHOWN, IS THE FUNCTIONAL COMPLEMENT OF TX_EN.
~4.6 ms
Tx OUT Ch 0
Tx OUT Ch 1
FAULT*
Tx OUT Ch 3
Tx OUT Ch 2
Figure 16 - Transmitter fault recovery via TX_EN timing diagram
17
TX_OUT 0
TX_OUT 1
TX_OUT 3
TX_OUT 2
Vcc
Vcc > 2.8V
~21 ms
6.5ms
~4.6ms
~4.6ms
~4.6ms
NORMAL
NORMAL
NORMAL
NORMAL
Figure 17. Typical Transmitter Power-Up Sequence
18
Ordering Information
The HFBR-7934WZ product is available for production orders through the Avago Technologies Component Field
Sales Oce.
HFBR-7934WZ No EMI Nose Shield, with heatsink
HFBR-7934EWZ with EMI Nose Shield, with heatsink
HFBR-7934HWZ No heatsink, No EMI Nose Shield
HFBR-7934EHWZ No heatsink, with EMI Nose Shield
For product information and a complete list of distributors, please go to our web site: www.avagotech.com
Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies Limited in the United States and other countries.
Data subject to change. Copyright © 2005-2008 Avago Technologies Limited. All rights reserved.
AV02-1185EN - April 18, 2008