1PS2033C 11/19/04
Block Diagram
Features
High-speed, low power device with high current drive
VCC = 5V ±10%
Hysteresis on all inputs
Supports Live Insertion
Balanced output drivers: ±24 mA
Reduced system switching noise
Typical VOLP (Output Ground Bounce) < 0.6V
at VCC = 5V, TA = 25°C
Packaging:
- 48-pin 240-mil wide plastic TSSOP (A)
- 48-pin 300-mil wide SSOP (V)
Description
Pericom Semiconductor’s PI74FCT162373T is a 16-bit transparent
latch designed with 3-state outputs and is intended for bus oriented
applications. The Output Enable and Latch Enable controls are
organized to operate as two 8-bit latches or one 16-bit latch. When
Latch Enable (LE) is HIGH, the ip-ops appear transparent to
the data. The data that meets the set-up time when LE is LOW is
latched. When OE is HIGH, the bus output is in the high impedance
state.
The PI74FCT162373T has ±24 mA balanced output drivers. It is
designed with current limiting resistors at its outputs to control the
output edge rate resulting in lower ground bounce and undershoot.
This eliminates the need for external terminating resistors for most
interface applications.
PI74FCT162373T
Fast CMOS 16-Bit Transparent Latch
1OE
1LE
1O0
C
D
1D0
TO 7 OTHER CHANNELS
2OE
2LE
2O
0
C
D
2D0
TO 7 OTHER CHANNELS
PI74FCT162373T
Fast CMOS 16-Bit Transparent Latch
2PS2033C 11/19/04
1
2
3
4
5
6
7
8
9
48
10
47
11
46
12
45
13
44
14
43
15
42
16
41
17
40
18
39
19
38
20
37
21
36
22
35
23
34
24
33
32
31
30
29
28
27
26
25
1OE
1O0
1O1
GND
1O2
1O3
VCC
1O4
1O5
GND
1O6
1O7
2O0
2O1
GND
2O2
2O3
VCC
2O4
2O5
GND
2O6
2O7
2OE
1LE
1D0
1D1
GND
1D2
1D3
VCC
1D4
1D5
GND
1D6
1D7
2D0
2D1
GND
2D2
2D3
VCC
2D4
2D5
GND
2D6
2D7
2LE
Pin Description
Pin Name Description
XOE Output Enable Inputs (Active LOW)
XLE Latch Enable Inputs (Active HIGH)
XDXInputs(1)
XOX3-State Outputs
GND Ground
VCC Power
Truth Table
Inputs(1) Outputs(1)
XDX XOE XLE XOX
H L H H
L L H L
X H X Z
Notes
1. H = High Voltage Level
X = Don’t Care
L = Low Voltage Level
Z = High Impedance
Pin Conguration
Note:
1. For the PI74FCT162H373T, these pins have “Bus Hold.”
All other pins are standard, outputs, or I/Os.
PI74FCT162373T
Fast CMOS 16-Bit Transparent Latch
3PS2033C 11/19/04
DC Electrical Characteristics (Over the Operating Range, TA = –40°C to +85°C, VCC = 5.0V ± 10%)
Parameters Description Test Conditions(1) Min. Typ(2) Max. Units
VIH Input HIGH Voltage Guaranteed Logic HIGH Level 2.0 V
VIL Input LOW Voltage Guaranteed Logic LOW Level 0.8
IIH Input HIGH Current Standard Input , VCC = Max. VIN = VCC 1
µA
IIH Input HIGH Current Standard I/O, VCC = Max. VIN = VCC 1
IIH Input HIGH Current Bus Hold Input(4), VCC = Max. VIN = VCC ±100
IIH Input HIGH Current Bus Hold I/O(4), VCC = Max. VIN = VCC ±100
IIL Input LOW Current Standard Input , VCC = Min. VIN = GND –1
IIL Input LOW Current Standard I/O, VCC = Min. VIN = GND –1
IIL Input LOW Current Bus Hold Input(4), VCC = Min. VIN = GND ±100
IIL Input LOW Current Bus Hold I/O(4), VCC = Min. VIN = GND ±100
IBHH Bus Hold Bus Hold Input(4), VCC = Min. VIN = 2.0V –50
IBHL Sustain Current VIN = 0.8V +50
IOZH(5) High Impedance VCC = Max. VOUT = 2.7V 1 µA
IOZL(5) Output Current VCC = Max. VOUT = 0.5V –1
VIK Clamp Diode Voltage VCC = Min., IIN = –18mA –0.7 –1.2 V
IOS Short Circuit Current VCC = Max.(3), VOUT = GND –80 –140 –200 mA
IOOutput Drive Current VCC = Max.(3), VOUT = 2.5V –50 –180
VHInput Hysteresis 100 mV
Notes:
1. For Max. or Min. conditions, use appropriate value specied under Electrical Characteristics for the applicable device type.
2. Typical values are at VCC = 5.0V, +25°C ambient and maximum loading.
3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second.
4. Pins with Bus Hold are identied in the pin description.
5. This specication does not apply to bi-directional functionalities with Bus Hold.
Storage Temperature .......................................................... –65°C to +150°C
Ambient Temperature with Power Applied ......................... –40°C to +85°C
Supply Voltage to Ground Potential (Inputs & VCC Only)... –0.5V to +7.0V
Supply Voltage to Ground Potential (Outputs & D/O Only) –0.5V to +7.0V
DC Input Voltage .................................................................. –0.5V to +7.0V
DC Output Current............................................................................ 120 mA
Power Dissipation ................................................................................. 1.0W
Note:
Stresses greater than those listed under MAXIMUM RAT-
INGS may cause permanent damage to the device. This is
a stress rating only and functional operation of the device
at these or any other conditions above those indicated in the
operational sections of this specication is not implied. Ex-
posure to absolute maximum rating conditions for extended
periods may affect reliability.
(Above which the useful life may be impaired. For user guidelines, not tested.)
Maximum Ratings
PI74FCT162373T
Fast CMOS 16-Bit Transparent Latch
4PS2033C 11/19/04
Power Supply Characteristics
Parameters Description Test Conditions(1) Min. Typ(2) Max. Units
ICC Quiescent Power
Supply Current VCC = Max. VIN = GND or VCC 0.1 500 µA
ΔICC Supply Current per
Input @ TTL HIGH VCC = Max. VIN = 3.4V(3) 0.5 1.5 mA
ICCD Supply Current per
Input per MHz(4)
VCC = Max.,
Outputs Open
XOE = GND, XLE = VCC
One Bit Toggling
50% Duty Cycle
VIN = VCC
VIN = GND 60 100 µA/
MHz
ICTotal Power Supply
Current(6)
VCC = Max.,
Outputs Open
fI = 10 MHZ
50% Duty Cycle
XOE = GND, XLE = VCC
One Bit Toggling
VIN = VCC
VIN = GND 0.6 1.5(5)
mA
VIN = 3.4V
VIN = GND 0.9 2.3(5)
VCC = Max.,
Outputs Open
fI = 2.5 MHZ
50% Duty Cycle
XOE = GND, XLE = VCC
16 Bits Toggling
VIN = VCC
VIN = GND 2.4 4.5(5)
VIN = 3.4V
VIN = GND 6.4 16.5(5)
Notes:
1. For Max. or Min. conditions, use appropriate value specied under Electrical Characteristics for the applicable device.
2. Typical values are at VCC = 5.0V, +25°C ambient.
3. Per TTL driven input (VIN = 3.4V); all other inputs at VCC or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of the Icc formula. These limits are guaranteed but not tested.
6. IC =IQUIESCENT + IINPUTS + IDYNAMIC
IC = ICC + ΔICC DHNT + ICCD (fCP/2 + fINI)
ICC = Quiescent Current
ΔICC = Power Supply Current for a TTL High Input (VIN = 3.4V)
DH = Duty Cycle for TTL Inputs High
NT = Number of TTL Inputs at DH
ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices)
fI = Input Frequency
NI = Number of Inputs at fI
All currents are in milliamps and all frequencies are in megahertz.
PI74FCT162373T
Fast CMOS 16-Bit Transparent Latch
5PS2033C 11/19/04
Output Drive Characteristics (Over the Operating Range)
Parameters Description Test Conditions(1) Min. Typ(2) Max. Units
VOH Output HIGH Voltage VCC = Min., VIN = VIH or VIL IOH = –24mA 2.4 3.3 V
VOL Output LOW Voltage VCC = Min., VIN = VIH or VIL IOL = 24mA 0.3 0.55
IODL Output LOW Current VCC = 5V, VIN = VIH OR VIL, VOUT = 1.5V(3) 60 115 150 mA
IODH Output HIGH Current VCC = 5V, VIN = VIH OR VIL, VOUT = 1.5V(3) –60 –115 –150
Capacitance (T
A = 25°C, f = 1 MHz)
Parameters(4) Description Test Conditions Typ Max. Units
CIN Input Capacitance VIN = 0V 4.5 6 pF
COUT Output Capacitance VOUT = 0V 5.5 8
Notes:
1. For Max. or Min. conditions, use appropriate value specied under Electrical Characteristics for the applicable device type.
2. Typical values are at Vcc = 5.0V, +25°C ambient and maximum loading.
3. Not more than one output should be shorted at one time. Duration of the test should not exceed one second.
4. This parameter is determined by device characterization but is not production tested.
Switching Characteristics over Operating Range
Parameters Description Conditions(1)
162373T 162373AT 162373CT
Unit
Com. Com. Com. Com. Com.
Min Max Min Max Min Max
tPLH
tPHL
Propagation Delay
xDx to xOx
CL = 50pF
RL = 500Ω
1.5 8.0 1.5 5.2 1.5 4.2
ns
tPLH
tPHL
Propagation Delay
xLE to xOx 2.0 13.0 2.0 8.5 2.0 5.5
tPZH
tPZL
Output Enable Time
xOE to xOx 1.5 12.0 1.5 6.5 1.5 5.5
tPHZ
tPLZ
Output Disable Time(3)
xOE to xOx 1.5 7.5 1.5 5.5 1.5 5.0
tSU Setup Time HIGH
or LOW, XDX to XLE 2.0 2.0 2.0
tHHold Time HIGH
or LOW, XDX to XLE 1.5 1.5 1.5
tWxLE Pulse Width
HIGH(3) 6.0 5.0 5.0
tSK(o) Output Skew(4) 0.5 0.5 0.5
Notes:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. This parameter is guaranteed but not production tested.
4. Skew between any two outputs, of the same package, switching in the same direction. This parameter is guaranteed by design.
PI74FCT162373T
Fast CMOS 16-Bit Transparent Latch
6PS2033C 11/19/04
.236
.244
.488
.496
.002
.006
SEATING PLANE
.007
.010
.0197
BSC
.004
.008
.319
1
48
12.4
12.6
6.0
6.2
0.50 0.17
0.27
8.1
0.05
0.15
0.09
0.20
X.XX
X.XX
DENOTES DIMENSIONS
IN MILLIMETERS
.018
.030
0.45
0.75
.047
1.20 Max
BSC
Packaging Mechanical: 48-pin 240-mil wide plastic TSSOP (A)
Packaging Mechanical: 48-pin 300-mil wide plastic SSOP (V)
0.20
0.51
1.01
0.25
0.381
0.635
.008
.008
.016
0-8˚ 0.20
0.40
.110 2.79
.010
Gauge Plane
.02
.04
.015
.025 x 45˚
.025 BSC
0.635
.291
.299
X.XX
X.XX DENOTES DIMENSIONS
IN MILLIMETERS
7.39
7.59
.395
.420
10.03
10.67
.620
.630
15.75
16.00
.008
.0135
0.20
0.34
1
48
Nom.
Max
PI74FCT162373T
Fast CMOS 16-Bit Transparent Latch
7PS2033C 11/19/04
Ordering Information
Ordering Code Package Code Speed Grade Package Type
PI74FCT162373TA A Blank 48-pin 240-mil wide TSSOP
PI74FCT162373ATA A A 48-pin 240-mil wide TSSOP
PI74FCT162373CTA A C 48-pin 240-mil wide TSSOP
PI74FCT162373ATV V A 48-pin 300-mil wide SSOP
Notes:
1. Thermal characteristics can be found on the company web site at www.pericom.com/packaging/
Pericom Semiconductor Corporation • 1-800-435-2336 www.pericom.com