DATASHEET ISL97656 FN6439 Rev 6.00 July 19, 2012 Step-Up Regulator with 4A Integrated Switch Features The ISL97656 is a high frequency, high efficiency current mode control non-synchronous step-up voltage regulator operated at constant PMW switching frequency. It has an internal 4.0A, 120m Low side MOSFET and can deliver high output current and efficiency over 90%. The selectable 640kHz and 1.22MHz switching frequency allows use of smaller inductor and faster transient response. An external compensation pin gives the user flexibility in setting frequency compensation allowing the use of low ESR ceramic output capacitors. * 4.0A, Low rDS(ON) Integrated Low Side MOSFET * +2.2V to +6.0V Operating Input Voltage Range * +1.1*VIN to +24V Output Voltage Range * 640kHz or 1.22MHz Switching Frequency * Higher Efficiency and Better Thermal Performance * Adjustable Soft-Start * Internal Thermal Protection When in shut down mode, ISL97656 draws current <1A and can operate at as low as 2.2V input. These features along with higher switching frequency allows use of tiny external components and makes it an ideal device for portable equipment and TFT-LCD displays. * 0.8mm Maximum Height 10 Ld TDFN Package * Pb-Free (RoHS Compliant) * Halogen Free Applications The ISL97656 is available in a 10 Ld TDFN package with a maximum height of 1.1mm. The device is specified for operation over the full -40C to +85C temperature range. * Portable Equipment, Digital Cameras * TFT-LCD Displays, DSL Modems Ordering Information PART NUMBER (Notes 1, 2, 3) PART MARKING ISL97656IRTZ 656Z * PCMCIA Cards, GSM/CDMA Phones PACKAGE (Pb-Free) Pin Configuration PKG. DWG. # 10 Ld TDFN ISL97656 (10 LD TDFN) TOP VIEW L10.3x3B NOTES: 1. Add "-T*" suffix for tape and reel. Please refer to TB347 for details on reel specifications. COMP 1 10 SS FB 2 9 FREQ EN 3 8 VIN GND 4 7 LX GND 5 6 LX 2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. 3. For Moisture Sensitivity Level (MSL), please see device information page for ISL97656. For more information on MSL please see techbrief TB363. 1 R3 3.9k C5 4.7nF R1 86.6k R2 10k COMP SS 10 2 FB FREQ 9 3 EN VIN 8 4 GND LX 7 5 GND LX 6 C3 27nF INPUT 2.2V TO 6V C4 0.1F C3 22F 10H OUTPUT 12V D1 C2 22F FIGURE 1. TYPICAL APPLICATION CIRCUIT FN6439 Rev 6.00 July 19, 2012 Page 1 of 9 ISL97656 Absolute Maximum Ratings Thermal Information (TA = +25C) Temperature Under Bias . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40C to +85C Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-65C to +150C Terminal Voltage with Respect to GND: VIN to GND. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6.5V LX to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26V COMP, FB, EN, SS, FREQ to GND. . . . . . . . . . . . . . . . .-0.3V to (VIN +0.3V) Maximum Continuous Junction Temperature . . . . . . . . . . . . . . . . . .+135C ESD Rating (JEDEC) Human Body Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2kV Machine Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 200V Charged Device Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1.2kV Thermal Resistance (Typical) JA (C/W) JC (C/W) 10 Ld TDFN Package (Notes 4, 5) . . . . . . . 53 3 Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty. NOTES: 4. JA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details. 5. For JC, the "case temp" location is the center of the exposed metal pad on the package underside. IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA Electrical Specifications VIN = 3V, VOUT = 12V, IOUT = 0mA, FREQ = GND, TA = -40C to +85C, unless otherwise specified. Boldface limits apply over the operating temperature range, -40C to +85C. PARAMETER DESCRIPTION CONDITIONS MIN (Note 6) TYP MAX (Note 6) UNIT 5 A IDD-SHDN Shutdown Supply Current EN = 0V 0.1 IDD-STDBY Standby Supply Current EN = VIN, FB = 1.3V 0.7 IDD-ACTIVE Active Supply Current EN = VIN, FB = 1.0V 3 5 mA 1.24 1.26 V 0.5 A 6.0 V VFB IDD-FB Feedback Voltage 1.22 Feedback Input Bias Current 0.01 VIN Input Voltage Range DMAX - 640kHz Maximum Duty Cycle FREQ = 0V DMAX - 1.2MHz Maximum Duty Cycle FREQ = VIN ILIM Current Limit - Max Peak Input Current IEN EN pin Input Bias Current 2.2 85 mA 92 % 85 90 3.8 4.0 5.1 A EN = 0V 0.01 0.5 A 3 A rDS(ON) Switch ON Resistance VIN = 2.7V, ILX = 1A 0.12 ILX-LEAK Switch Leakage Current VSW = 26V 0.01 VOUT/VIN Line Regulation 2.2V < VIN < 5.5V, VOUT = 12V 0.2 VOUT/IOUT % % Load Regulation VIN = 3.3V, VOUT = 12V, IO = 30mA to 200mA FOSC1 Switching Frequency Accuracy FREQ = 0V 500 640 0.3 740 kHz % FOSC2 Switching Frequency Accuracy FREQ = VIN 1000 1220 1500 kHz 0.5 V VIL EN, FREQ pin Input Low Level VIH EN, FREQ pin Input High Level 1.5 gM Error Amp Tranconductance 70 130 250 A/V 2.00 2.10 2.20 V 2.5 4.5 VINUVLO VINUVLO-HYST ISS TOTP VIN UVLO Threshold rising VIN UVLO Hysteresis Soft-Start Charge Current Over-Temperature Protection V 50 mV 7.5 150 A C NOTE: 6. Parameters with MIN and/or MAX limits are 100% tested at +25C, unless otherwise specified. Temperature limits established by characterization and are not production tested. FN6439 Rev 6.00 July 19, 2012 Page 2 of 9 ISL97656 Block Diagram EN FREQ VIN REFERENCE GENERATOR OSCILLATOR SS SHUTDOWN AND START-UP CONTROL LX PWM LOGIC CONTROLLER FET DRIVER COMPARATOR CURRENT SENSE GND FB gM AMPLIFIER COMP Pin Descriptions PIN NUMBER PIN NAME 1 COMP 2 FB Voltage feedback pin. Internal reference is 1.24V nominal. Connect a resistor divider from VOUT. VOUT = 1.24V (1 + R1/R2). See "Typical Application Circuit" on page 1. 3 EN Enable control pin. Pull the pin high to turn the device ON. 4, 5 GND 6, 7 LX Power switch pin. Connected to the drain of the internal power MOSFET. 8 VIN Analog power supply input pin. 9 FREQ 10 SS FN6439 Rev 6.00 July 19, 2012 DESCRIPTION Compensation pin. Output of the internal error amplifier. Capacitor and resistor from COMP pin to ground. Power Ground. Frequency select pin. When FREQ pin is set low, switching frequency is set to 640kHz when set high switching frequency is set to 1.22MHz. Soft-start control pin. Connect a capacitor to control the converter output slew rate. Page 3 of 9 ISL97656 Performance Curves 93 VOUT = 5V, fSW = 640kHz 92 92 VIN = 4.0V VIN = 4.5V EFFICIENCY (%) EFFICIENCY (%) 90 VIN = 3.7V 88 VIN = 3.3V 87 VIN = 3.0V 86 85 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 89 VIN = 3.7V 88 87 VIN = 3.3V 0.9 1 85 1.1 VIN = 3.0V 0 0.1 0.2 0.3 0.4 0.5 LOAD (A) 94 0.8 0.9 1 1.1 VIN = 5V, VOUT = 9V fSW = 640kHz 93 EFFICIENCY (%) EFFICIENCY (%) fSW = 640kHz 89 87 85 0.7 FIGURE 3. VOUT = 5V EFFICIENCY VIN = 3.3V, VOUT = 9V 91 0.6 LOAD (A) FIGURE 2. VOUT = 5V EFFICIENCY 93 VIN = 4.0V 90 86 0.8 VIN = 4.5V 91 91 89 VOUT = 5V, fSW = 1220kHz fSW = 1220kHz 83 92 fSW = 1220kHz 91 81 79 0 0.1 0.2 0.3 0.4 0.5 0.6 LOAD (A) 0.7 0.8 0.9 90 1.0 0 0.2 94 90 89 fSW = 1220kHz 87 86 85 EFFICIENCY (%) EFFICIENCY (%) 91 88 86 84 fSW = 1220kHz 82 80 84 83 82 1.2 fSW = 640kHz 90 92 88 1.0 VIN = 3.3V, VOUT = 12.3V 92 fSW = 640kHz 93 0.8 FIGURE 5. VOUT = 9V EFFICIENCY VIN = 5V, VOUT = 12.3V 94 0.6 LOAD (A) FIGURE 4. VOUT = 9V EFFICIENCY 95 0.4 78 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 1.2 1.3 LOAD (A) FIGURE 6. VOUT = 12.3V EFFICIENCY FN6439 Rev 6.00 July 19, 2012 76 0 0.1 0.2 0.3 0.4 LOAD (A) 0.5 0.6 FIGURE 7. VOUT = 12.3V EFFICIENCY Page 4 of 9 0.7 ISL97656 Performance Curves 0.45 0.30 0.25 VIN 5, VO = 9V, fSW = 640kHz 0.20 0.15 0.10 0 0.1 0.2 0.3 0.4 0.5 0.6 LOAD (A) 0.7 VIN 3.3V, VO = 9V, fSW = 1.22MHz 0.20 VIN 3.3V, VO = 5V fSW = 640kHz VIN 3.3V, VO = 12V fSW = 1.22MHz 0.15 0.10 VIN 3.3V, VO = 9V, fSW = 640kHz 0.05 VIN 5, VO = 12V, fSW = 640kHz 0.05 0.8 0.9 1.0 FIGURE 8. VIN = 5V, LOAD REGULATION 0 VIN 3.3V, VO = 12V, fSW = 640kHz 0 0.1 0.2 0.3 0.4 LOAD (A) 0.5 0.6 0.7 FIGURE 9. VIN = 3.3V, LOAD REGULATION IO = 50mA TO 300mA 0.8 VO = 12V fSW = 1.22MHz 0.7 LINE REGULATION (%) VIN 3.3V, VO = 5V, fSW = 1.22MHz 0.25 0.35 0 0.30 VIN 5, VO = 9V, fSW = 1.22MHz LOAD REGULATION (%) LOAD REGULATION (%) 0.40 VIN 5, VO = 12V, fSW = 1.22MHz (Continued) 0.6 VO = 9V fSW = 1.22MHz 0.5 0.4 0.3 VO = 5V fSW = 1.22MHz VO = 12V fSW = 640kHz 0.2 VO = 9V, fSW = 640kHz 0.1 0 2.0 VO = 5V, fSW = 640kHz 2.5 3.0 3.5 4.0 4.5 5.0 VIN (V) 5.5 FIGURE 10. LINE REGULATION 6.0 6.5 7.0 FIGURE 11. VIN = 3.3V, VO = 12V, fSW = 640kHz, TRANSIENT RESPONSE IO = 50mA TO 300mA FIGURE 12. VIN = 3.3V, VO = 12V, fSW = 1.22MHz, TRANSIENT RESPONSE FN6439 Rev 6.00 July 19, 2012 Page 5 of 9 ISL97656 Applications Information . L The ISL97656 is a high frequency, high efficiency boost regulator operated at constant frequency PWM mode. The boost converter stores energy from an input voltage source and delivers higher output voltage. The input voltage range is 2.2V to 6.0V and the output voltage range is 5V to 25V. The switching frequency can be selected between 640kHz and 1.22MHz. The higher switching frequency allows use of smaller inductors and faster transient response. An external compensation pin gives the user greater flexibility in setting output transient response and tighter load regulation. The converter soft-start characteristic can be controlled by the external CSS capacitor. The EN pin allows the user to shut down the device. VOUT CIN FIGURE 13. BOOST CONVERTER L VOUT VIN V IN I L1 = T1 --------L D T1 = ---------f SW IL1 T1 VO FIGURE 14. BOOST CONVERTER - CYCLE 1, POWER SWITCH CLOSED L D VOUT COUT CIN ISL97656 (EQ. 1) During the second cycle, the power FET turns off and the Schottky diode is forward biased, (see Figure 15). The energy stored in the inductor is supplied to the output. This energy is used to charge the output capacitor and supply output current. In this cycle switching node (LX) is held to VOUT + Schottky diode drop. Voltage drop across the inductor is VIN - VOUT (ignoring diode drop across Schottky diode). The change in inductor current during the second cycle is shown in Equation 2: V IN - V OUT I L = T2 -------------------------------L (EQ. 2) In steady state operation, the change in the inductor current must be equal as shown in Equation 3. I1 + I2 = 0 IL IL2 T2 VO FIGURE 15. BOOST CONVERTER - CYCLE 2, POWER SWITCH OPEN Output Voltage An external feedback resistor divider is required to divide the output voltage down to the nominal 1.24V reference voltage. The current drawn by the resistor network should be limited to maintain the overall converter efficiency. The maximum value of the resistor network is limited by the feedback input bias current and the potential for noise being coupled into the feedback pin. A resistor network less than 100k is recommended. The boost converter output voltage is determined by the relationship as shown in Equation 4. The nominal VFB voltage is 1.24V. R 1 V OUT = V FB 1 + ------- R 2 V IN 1 - D V IN - V OUT D ---------- --------+ ------------- -------------------------------- = 0 L f SW L f SW FN6439 Rev 6.00 July 19, 2012 IL VIN D = Duty Cycle V OUT 1 ---------------- = ------------1-D V IN COUT CIN ISL97656 Figure 13 shows a boost converter with all the key components. In steady state and continuous conduction mode, the boost converter operates in two cycles. During the first cycle, as shown in Figure 14, the internal power FET turns on and the Schottky diode is reverse biased and cuts off the current flow to the output. The output current is supplied from the output capacitor. The voltage across the inductor is VIN and the inductor current ramps up with a rate of VIN/L, where L is the inductance. The inductor is magnetized and energy is stored in the inductor. The change in inductor current is shown in Equation 1: 1-D T2 = ------------f SW COUT ISL97656 Boost Converter Operations I OUT V O = ---------------- T 1 C OUT D VIN (EQ. 4) (EQ. 3) Page 6 of 9 ISL97656 Inductor Selection The inductor selection determines the output ripple voltage, transient response, output current capability and efficiency. Its selection depends on the input voltage, output voltage, switching frequency and maximum output current. For most applications, the inductance should be in the range of 2H to 33H. The inductor maximum DC current specification must be greater than the peak inductor current required by the regulator. The peak inductor current can be calculated using Equation 5: I OUT V OUT V IN V OUT - V IN I L PEAK = ------------------------------------ + 1 2 ----------------------------------------------------V IN L V OUT FREQ (EQ. 5) Output Capacitor Low ESR capacitors should be used to minimize the output voltage ripple. Multilayer ceramic capacitors (X5R and X7R) are preferred for the output capacitors because of their lower ESR and small packages. Tantalum capacitors with higher ESR can also be used. The output ripple can be calculated using Equation 6: I OUT D V O = ------------------------- + I OUT ESR f SW C O (EQ. 6) For noise sensitive applications, a 0.1F placed in parallel with the larger output capacitor is recommended to reduce the switching noise coupled from the LX switching node. Schottky Diode In selecting the Schottky diode, the reverse break-down voltage, forward current and forward voltage drop must be considered for optimum converter performance. The diode must be rated to handle 4.0A, the current limit of the ISL97656. The breakdown voltage must exceed the maximum output voltage. Low forward voltage drop, low leakage current, and fast reverse recovery will help the converter to achieve the maximum efficiency. loop stability. For most applications, the compensation resistor in the range of 0k to 2.0k and the compensation capacitor in the range of 3nF to 10nF. Soft-Start The regulator goes through the soft-start sequence after EN is pulled high. The soft-start is provided by an internal 4.5A current source. This internal current source is used to charge the external CSS capacitor. The peak MOSFET current is limited by the voltage on the capacitor. As the voltage at the CSS capacitor increases, this results in ramping up of the current limit from 0A to full scale. This in turn controls the rising rate of the output voltage. Frequency Selection The ISL97656 switching frequency can be user selectable. The ISL97656 operates at either constant 640KHz or 1.22MHz switching frequency. Connecting the FREQ pin to ground sets the PWM switching frequency to 640kHz. When connecting FREQ high or VIN, the switching frequency is set to 1.22MHz. Shutdown Control When the EN pin is pulled low, the ISL97656 is in shutdown mode, reducing the supply current to <1A. Maximum Output Current The MOSFET current limit is nominally 4.0A and guaranteed 3.8A. This restricts the maximum output current, IOMAX, based on Equation 7: I L = I L AVG + 1 2 I L where: IL = MOSFET current limit IL(AVG) = average inductor current Input Capacitor IL = inductor ripple current The value of the input capacitor depends on the input and the output voltages, maximum output current, inductor value and maximum permissible noise fed back in the input line. For most applications, a minimum 10F is required. For applications that run close to the maximum output current limit, an input capacitor in the range of 22F to 47F is recommended. V IN V O + V DIODE - V IN I L = -----------------------------------------------------------------------------L V O + V DIODE f SW The ISL97656 is powered from the VIN. A High frequency 0.1F bypass capacitor is recommended to be close to the VIN pin to reduce supply line noise and ensure stable operation. Loop Compensation The ISL97656 incorporates a transconductance amplifier in its feedback path to allow the user some adjustment on the transient response and better regulation. The ISL97656 uses current mode control architecture, which has a fast current sense loop and a slow voltage feedback loop. The fast current feedback loop does not require any compensation. The slow voltage loop must be compensated for stable operation. The compensation network is a series RC network from the COMP pin to ground. The resistor sets the high frequency integrator gain for fast transient response and the capacitor sets the integrator zero to ensure FN6439 Rev 6.00 July 19, 2012 (EQ. 7) (EQ. 8) VDIODE = Schottky diode forward voltage, typically, 0.6V fSW = switching frequency, 640kHz or 1.22MHz I OUT I L-AVG = ------------1-D (EQ. 9) D = MOSFET turn-on ratio: V IN D = 1 - -------------------------------------------V OUT + V DIODE (EQ. 10) Page 7 of 9 ISL97656 Cascaded MOSFET Application DC PATH BLOCK APPLICATION A 24V N-Channel MOSFET is integrated in the boost regulator. For the applications where the output voltage is greater than 24V, an external cascaded MOSFET is needed as shown in Figure 16. The voltage rating of the external MOSFET should be greater than VIN. There is a DC path in the boost converter from the input to the output through the inductor and diode. In the non-synchronous topology, although the system is still in shutdown mode, the output voltage will be the input voltage minus the forward voltage diode drop of the Schottky diode. If this voltage is not desired, the following circuit (see Figure 17) can be used between input and inductor to disconnect the DC path when the ISL97656 is in shutdown mode. VOUT VIN TO INDUCTOR INPUT LX INTERSIL ISL97656 FB EN FIGURE 17. CIRCUIT TO DISCONNECT THE DC PATH OF BOOST CONVERTER FIGURE 16. CASCADED MOSFET TOPOLOGY FOR HIGH OUTPUT VOLTAGE APPLICATIONS (c) Copyright Intersil Americas LLC 2007-2012. All Rights Reserved. All trademarks and registered trademarks are the property of their respective owners. For additional products, see www.intersil.com/en/products.html Intersil products are manufactured, assembled and tested utilizing ISO9001 quality systems as noted in the quality certifications found at www.intersil.com/en/support/qualandreliability.html Intersil products are sold by description only. Intersil may modify the circuit design and/or specifications of products at any time without notice, provided that such modification does not, in Intersil's sole judgment, affect the form, fit or function of the product. Accordingly, the reader is cautioned to verify that datasheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com FN6439 Rev 6.00 July 19, 2012 Page 8 of 9 ISL97656 Package Outline Drawing L10.3x3B 10 LEAD THIN DUAL FLAT PACKAGE (TDFN) WITH E-PAD Rev 3, 10/11 3.00 5 PIN #1 INDEX AREA A B 1 2 0.50 3.00 2.38 +0.1/ - 0.15 10 5 PIN 1 INDEX AREA 0.25 +0.05/ - 0.07 6 (4X) 0.15 1.64 +0.1/ -0.15 TOP VIEW BOTTOM VIEW 10x 0.40 +/- 0.1 SEE DETAIL "X" (10x0.60) (10X0.25) 0.75 0.10 C SEATING PLANE 0.08 C 2.38 0.05 C SIDE VIEW (8x 0.50) 1.64 2.80 TYP TYPICAL RECOMMENDED LAND PATTERN C 0.20 REF 4 0.05 DETAIL "X" NOTES: 1. Dimensions are in millimeters. Dimensions in ( ) for Reference Only. 2. Dimensioning and tolerancing conform to AMSE Y14.5m-1994. 3. Unless otherwise specified, tolerance : Decimal 0.05 4. Tiebar shown (if present) is a non-functional feature. 5. The configuration of the pin #1 identifier is optional, but must be located within the zone indicated. The pin #1 identifier may be either a mold or mark feature. FN6439 Rev 6.00 July 19, 2012 Page 9 of 9