LM4928SDNOPB - NATIONAL SEMICONDUCTOR

LM4911,LM4911Q

LM4911/LM4911Q Stereo 40mW Low Noise Headphone Amplifier with

Selectable Capacitive Coupled or OCL Output

Literature Number: SNAS152M

LM4911/LM4911Q June 8, 2011

Stereo 40mW Low Noise Headphone Amplifier with

Selectable Capacitive Coupled or OCL Output

General Description

The LM4911/LM4911Q is an stereo audio power amplifier

capable of delivering 40mW per channel of continuous aver-

age power into a 16Ω load or 25mW per channel into a 32Ω

load at 1% THD+N from a 3V power supply.

Boomer audio power amplifiers were designed specifically to

provide high quality output power with a minimal amount of

external components. Since the LM4911/LM4911Q does not

require bootstrap capacitors or snubber networks, it is opti-

mally suited for low-power portable systems. In addition, the

LM4911/LM4911Q may be configured for either single-ended

capacitively coupled outputs or for OCL outputs (patent pend-

ing).

The LM4911/LM4911Q features a low-power consumption

shutdown mode and a power mute mode that allows for faster

turn on time with less than 1mV voltage change at outputs on

release. Additionally, the LM4911/LM4911Q features an in-

ternal thermal shutdown protection mechanism.

The LM4911/LM4911Q is unity gain stable and may be con-

figured with external gain-setting resistors.

A Q-grade version is available for automotive applications. It

is AEC-Q100 grade 2 qualified and packaged in a 10–pin

MSOP package (LM4911QMM).

Key Specifications

■PSRR at 217Hz and 1kHz 65dB (typ)

■Output Power at 1kHz with VDD = 2.4V,

1% THD+N into a 16Ω load

25mW (typ)

■Output Power at 1kHz with VDD = 3V,

1% THD+N into a 16Ω load

40mW (typ)

■Shutdown Current 2.0µA (max)

■Output Voltage change on release from

Shutdown VDD = 2.4V, RL = 16Ω (C-Coupled)

1mV (max)

■Mute Current 100µA (max)

Features

■OCL or capacitively coupled outputs (patent pending)

■External gain-setting capability

■Available in space-saving MSOP and LD packages

■Ultra low current shutdown mode

■Mute mode allows fast turn-on (1ms) with less than 1mV

change on outputs

■2V - 5.5V operation

■Ultra low noise

■LM4911QMM is an Automotive Grade product that is AE-

Q100 grade 2 qualified.

Applications

■Portable CD players

■PDAs

■Portable electronics devices

■Automotive

Block Diagram

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FIGURE 1. Block Diagram

Boomer® is a registered trademark of National Semiconductor Corporation.

LM4911/LM4911Q Stereo 40mW Low Noise Headphone Amplifier with Selectable Capacitive

Coupled or OCL Output

Typical Application

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FIGURE 2. Typical Capacitive Coupled Output Configuration Circuit

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FIGURE 3. Typical OCL Output Configuration Circuit

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LM4911/LM4911Q

Connection Diagrams

MSOP Package

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Top View

Order Number LM4911/LM4911QMM

See NS Package Number MUB10A

MSOP Marking

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Top View

G-Boomer Family

A3 - LM4911MM

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Top View

G-Boomer Family

C9 - LM4911QMM

LD Package

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Top View

Order Number LM4911

See NS Package Number LDA10A

Ordering Information

Order Number Package Package Marking NSC Drawing # Transport Media

LM4911MM 10–Pin MSOP GA3 MUB10A 1k units Tape and Reel

LM4911MM 10–Pin MSOP GA3 MUB10A 3.5k units Tape and Reel

LM4911QMM *10–Pin MSOP GC9 MUB10A 1k units Tape and Reel

LM4911QMMX *10–Pin MSOP GC9 MUB10A 3.5k units Tape and Reel

* Automotive Grade (Q) product incorporates enhanced manufacturing and support processes for the automotive market, including defect detection methodologies.

Reliability qualification is compliant with the requirements and temperature grades defined in the AECQ100 standard. Automotive grade products are identified

with the letter Q. For more information, go to http://wwww.national.com/automotive.

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LM4911/LM4911Q

Absolute Maximum Ratings (Note 2)

If Military/Aerospace specified devices are required,

please contact the National Semiconductor Sales Office/

Distributors for availability and specifications.

Supply Voltage 6.0V

Storage Temperature −65°C to +150°C

Input Voltage -0.3V to VDD + 0.3V

Power Dissipation (Note 3) Internally Limited

ESD Susceptibility (Note 4) 2000V

ESD Susceptibility (Note 5) 200V

Junction Temperature 150°C

Thermal Resistance

θJC (MSOP) 56°C/W

θJA (MSOP) 190°C/W

θJA (LD) (Note 10)63°C/W

θJA (LD) (Note 10)12°C/W

Operating Ratings

Temperature Range

TMIN ≤ TA ≤ TMAX

(LM4911MM) −40°C ≤ T A ≤ 85°C

TMIN ≤ TA ≤ TMAX

(LM4911QMM) −40°C ≤ T A ≤ 105°C

Supply Voltage (VDD) 2V ≤ VCC ≤ 5.5V

Electrical Characteristics VDD = 5.0V (Note 1, Note 2)

The following specifications apply for VDD = 5V, RL = 16Ω, and CB = 4.7µF unless otherwise specified. Limits apply to TA = 25°C.

Symbol Parameter Conditions

LM4911 LM4911Q Units

(Limits)

Typ

(Note 6)

Limit

(Note 7)

Typ

(Note 6)

Limit

(Note 7)

IDD Quiescent Current

VIN = 0V, IO = 0A

TA = +25°C 2 5 2 5 mA (max)

TA = –40°C to +105°C 6 mA (max)

ISD Shutdown Current VSHUTDOWN = GND 0.1 2 0.1 2 µA (max)

IMMute Current

VMUTE = VDD, C-Coupled

TA = +25°C 50 100 50 100 µA (max)

TA = –40°C to +105°C 150 µA (max)

VSDIH

Shutdown Voltage Input

High TA = –40°C to +105°C 1.8 1.8 V

VSDIL

Shutdown Voltage Input

Low TA = –40°C to +105°C 0.4 0.4 V

VMIH Mute Voltage Input High TA = –40°C to +105°C 1.8 1.8 V

VMIL Mute Voltage Input Low TA = –40°C to +105°C 0.4 0.4 V

POOutput Power

THD ≤ 1%, f 1kHz

OCL, RLOAD = 16Ω 80 mW (max)

LM4911/LM4911QLD OCL,

RLOAD = 16Ω (Note 10) 145 mW (max)

OCL, RLOAD = 32Ω 80 mW (max)

C-CUPL, RLOAD = 16Ω

TA = +25°C 145 134 145 mW (min)

TA = –40°C to +105°C 130 mW (min)

C-CUPL, RLOAD = 32Ω 85 mW (max)

THD+N Total Harmonic Distortion +

Noise PO = 15.3mW, f = 1kHz 0.1 0.5 0.1 0.5 % (max)

(Note 11)

PSRR Power Supply Rejection

Ratio

VRIPPLE = 200mV sine p-p

f = 1kHz (Note 9)65 65 dB

VON Output Noise Voltage BW = 20Hz to 20kHz, A-weighted 10 10 µV

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LM4911/LM4911Q

Electrical Characteristics VDD = 3.3V (Note 1, Note 2)

The following specifications apply for VDD = 3.3V, RL = 16Ω, and CB = 4.7µF unless otherwise specified.

Limits apply to TA = 25°C.

Symbol Parameter Conditions

LM4911 LM4911Q Units

(Limits)

Typ

(Note 6)

Limit

(Note 7)

Typ

(Note 6)

Limit

(Note 7)

IDD Quiescent Current

VIN = 0V, IO = 0A

TA = +25°C 1.5 3 1.5 3 mA (max)

TA = –40°C to +105°C 4 mA (max)

ISD Shutdown Current

VSHUTDOWN = GND

TA = +25°C 0.1 2 0.1 2 µA (max)

TA = –40°C to +105°C 4 µA (max)

IMMute Current

VMUTE = VDD, C-Coupled

TA = +25°C 50 100 50 100 µA (max)

TA = –40°C to +105°C 125 µA (max)

VSDIH

Shutdown Voltage Input

High TA = –40°C to +105°C 1.8 1.8 V

VSDIL

Shutdown Voltage Input

Low TA = –40°C to +105°C 0.4 0.4 V

VMIH Mute Voltage Input High TA = –40°C to +105°C 1.8 1.8 V

VMIL Mute Voltage Input Low TA = –40°C to +105°C 0.4 0.4 V

POOutput Power

THD ≤ 1%, `C-CUPL, RL = 16Ω

TA = +25°C 60 55 60 55 mW (min)

TA = –40°C to +105°C 50 mW (min)

THD+N Total Harmonic Distortion +

Noise PO = 15.3mW, f = 1kHz 0.1 0.5 0.1 0.5 % (max)

(Note 11)

PSRR Power Supply Rejection

Ratio

VRIPPLE = 200mV sine p-p

f = 1kHz (Note 9)65 65 dB

VON Output Noise Voltage BW = 20Hz to 20kHz, A-

weighted 10 10 µV

Electrical Characteristics VDD = 3.0V (Note 1, Note 2)

The following specifications apply for VDD = 3.0V, RL = 16Ω, and CB = 4.7µF unless otherwise specified.

Limits apply to TA = 25°C.

Symbol Parameter Conditions

LM4911 LM4911Q Units

(Limits)

Typ

(Note 6)

Limit

(Note 7)

Typ

(Note 6)

Limit

(Note 7)

IDD Quiescent Current

VIN = 0V, IO = 0A

TA = +25°C 1.5 3 1.5 3 mA

(max)

TA = –40°C to +105°C 4 mA

(max)

ISD Shutdown Current VSHUTDOWN = GND 0.1 2 0.1 2 µA (max)

IMMute Current

VMUTE = VDD, C-Coupled

TA = +25°C 50 100 50 100 µA (max)

TA = –40°C to +105°C 120 µA (max)

VSDIH Shutdown Voltage Input High TA = –40°C to +105°C 1.8 1.8 V

VSDIL Shutdown Voltage Input Low TA = –40°C to +105°C 0.4 0.4 V

VMIH Mute Voltage Input High TA = –40°C to +105°C 1.8 1.8 V

V MIL Mute Voltage Input Low TA = –40°C to +105°C 0.4 0.4 V

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LM4911/LM4911Q

Symbol Parameter Conditions

LM4911 LM4911Q Units

(Limits)

Typ

(Note 6)

Limit

(Note 7)

Typ

(Note 6)

Limit

(Note 7)

POOutput Power

THD ≤ 1%; C-CUPL, RL = 16Ω

TA = +25°C 40 40 35 mW

(min)

TA = –40°C to +105°C 30 mW

(min)

THD ≤ 1%, f = 1kHz, RL = 32Ω 25 mW

(min)

THD+N Total Harmonic Distortion +

Noise PO = 15.3mW, f = 1kHz 0.1 0.5 0.1 0.5 % (max)

(Note 11)

PSRR Power Supply Rejection

Ratio

VRIPPLE = 200mV sine p-p

f = 1kHz (Note 9)65 65 dB

VON Output Noise Voltage BW = 20 Hz to 20kHz, A-weighted 10 10 µV

Electrical Characteristics VDD = 2.4V (Note 1, Note 2)

The following specifications apply for VDD = 2.4V, RL = 16Ω, and CB = 4.7µF unless otherwise specified.

Limits apply to TA = 25°C.

Symbol Parameter Conditions

LM4911 LM4911Q Units

(Limits)

Typ

(Note 6)

Limit

(Note 7)

Typ

(Note 6)

Limit

(Note 7)

IDD Quiescent Current

VIN = 0V, IO = 0A

TA = +25°C 1.5 3 1.5 3 mA

(max)

TA = –40°C to +105°C 4 mA

(max)

ISD Shutdown Current VSHUTDOWN = GND 0.1 2 0.1 2 µA (max)

IMMute Current

VMUTE = VDD, C-Coupled

T A = +25°C 40 80 40 80 µA (max)

TA = –40°C to +105°C 100 µA (max)

VSDIH Shutdown Voltage Input High TA = –40°C to +105°C 1.8 1.8 V

VSDIL Shutdown Voltage Input Low TA = –40°C to +105°C 0.4 0.4 V

VMIH Mute Voltage Input High TA = –40°C to +105°C 1.8 1.8 V

VMIL Mute Voltage Input Low 0.4 0.4 V

POOutput Power

THD = 1%; C-CUPL, RL = 16Ω

TA = +25°C 25 25 20 mW

(min)

TA = –40°C to +105°C 15 mW

(min)

THD ≤1%; RL = 32Ω, f = 1kHz 12 12

THD+N Total Harmonic Distortion +

Noise PO = 15.3mW, f = 1kHz 0.1 0.5 0.1 0.5 % (max)

(Note 11)

TWU Wake Up Time OCL 0.5 0.5 s

C-Coupled, CO = 100μF2 2 s

TUM Un-mute Time C-Coupled, CO= 100μF0.01 0.02 0.01 0.02 s (max)

VOSD

Output Voltage Change on

Release from Shutdown C-Coupled, CO= 100μF 1 1 mV

(max)

PSRR Power Supply Rejection

Ratio

VRIPPLE = 200mV sine p-p

f = 1kHz (Note 9)65 65 dB

VON Output Noise Voltage BW = 20 Hz to 20kHz, A-weighted 10 10 dB

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LM4911/LM4911Q

Note 1: All voltages are measured with respect to the GND pin unless otherwise specified.

Note 2: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device

is functional but do not guarantee specific performance limits.Electrical Characteristics state DC and AC electrical specifications under particular test conditions

which guarantee specific performance limits. This assumes that the device is within the Operating Ratings. Specifications are not guaranteed for parameters

where no limit is given; however, the typical value is a good indication of device performance.

Note 3: The maximum power dissipation must be derated at elevated temperatures and is dictated by TJMAX, θJA, and the ambient temperature, TA. The maximum

allowable power dissipation is PDMAX = (TJMAX - TA) / θJA or the number given in Absolute Maximum Ratings, whichever is lower. For the LM4911/LM4911Q, see

power derating currents for more information.

Note 4: Human body model, 100pF discharged through a 1.5kΩ resistor.

Note 5: Machine Model, 220pF-240pF discharged through all pins.

Note 6: Typicals are measured at 25°C and represent the parametric norm.

Note 7: Limits are guaranteed to National's AOQL (Average Outgoing Quality Level).

Note 8: Datasheet min/max specification limits are guaranteed by design, test, or statistical analysis.

Note 9: 10Ω terminated input.

Note 10: The LDA10A package has its exposed-DAP soldered to an exposed 1.2in2 area of 1oz. Printed circuit board copper.

Note 11: The limit is guaranteed over the temperature range of –40°C to +85°C.

External Components Description

(Figure 2)

Components Functional Description

1. RI

Inverting input resistance which sets the closed-loop gain in conjunction with Rf. This resistor also forms a high-

pass filter with Ci at fc = 1/(2πRiCi).

2. CI

Input coupling capacitor which blocks the DC voltage at the amplifier's input terminals. Also creates a high-pass

filter with Ri at fc = 1/(2πRiCi). Refer to the section Proper Selection of External Components, for an explanation

of how to determine the value of Ci.

3. RfFeedback resistance which sets the closed-loop gain in conjunction with Ri.

4. CS

Supply bypass capacitor which provides power supply filtering. Refer to the Power Supply Bypassing section for

information concerning proper placement and selection of the supply bypass capacitor.

5. CB

Bypass pin capacitor which provides half-supply filtering. Refer to the section, Proper Selection of Proper

Components, for information concerning proper placement and selection of CB

6. Co

Output coupling capacitor which blocks the DC voltage at the amplifier's output. Forms a high pass filter with RL at

fo = 1/(2πRLCo)

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LM4911/LM4911Q

Typical Performance Characteristics

THD+N vs Frequency

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THD+N vs Frequency

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THD+N vs Frequency

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THD+N vs Frequency

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THD+N vs Frequency

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THD+N vs Frequency

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LM4911/LM4911Q

THD+N vs Frequency

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THD+N vs Frequency

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THD+N vs Frequency

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THD+N vs Frequency

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THD+N vs Frequency

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THD+N vs Frequency

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LM4911/LM4911Q

THD+N vs Output Power

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THD+N vs Output Power

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THD+N vs Output Power

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THD+N vs Output Power

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THD+N vs Output Power

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THD+N vs Output Power

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LM4911/LM4911Q

THD+N vs Output Power

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THD+N vs Output Power

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Output Resistance vs Load Resistance

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Output Power vs Supply Voltage

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Output Power vs Supply Voltage

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Output Power vs Supply Voltage

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LM4911/LM4911Q

Output Power vs Supply Voltage

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Output Power vs Load Resistance

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Output Power vs Load Resistance

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Power Dissipation vs. Output Power

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Power Dissipation vs. Output Power

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Power Dissipation vs Output Power

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LM4911/LM4911Q

Channel Separation

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Channel Separation

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Channel Separation

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Channel Separation

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Channel Separation

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Channel Separation

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LM4911/LM4911Q

Power Supply Rejection Ratio

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Power Supply Rejection Ratio

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Power Supply Rejection Ratio

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Power Supply Rejection Ratio

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Power Supply Rejection Ratio

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Power Supply Rejection Ratio

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LM4911/LM4911Q

Power Supply Rejection Ratio

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Power Supply Rejection Ratio

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Frequency Response vs

Input Capacitor Size

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Frequency Response vs

Input Capacitor Size

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Open Loop Frequency Response

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Supply Voltage vs

Supply Current

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LM4911/LM4911Q

Clipping Voltage vs

Supply Voltage

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Noise Floor

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Shutdown Hysteresis Voltage, Vdd=5V

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Shutdown Hysteresis Voltage, Vdd=3V

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Power Derating Curve

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LM4911/LM4911Q

Typical Performance Characteristics

LM4911/LM4911Q Specific Characteristics (Note 10)

THD+N vs Frequency

at VDD = 5V, RL = 16Ω

PO = 100mW, OCL

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THD+N vs Output Power

at VDD = 5V, RL = 16Ω, OCL

200314b8

Power Dissipation vs Output Power

at VDD = 5V, RL = 16Ω

THD+N ≤ 1%, OCL

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LM4911/LM4911Q

Application Information

AMPLIFIER CONFIGURATION EXPLANATION

As shown in Figure 1, the LM4911/LM4911Q has three op-

erational amplifiers internally. Two of the amplifier's have

externally configurable gain while the other amplifier is inter-

nally fixed at the bias point acting as a unity-gain buffer. The

closed-loop gain of the two configurable amplifiers is set by

selecting the ratio of Rf to Ri. Consequently, the gain for each

channel of the IC is

AVD = -(Rf / Ri)

By driving the loads through outputs VoA and VoB with VoC

acting as a buffered bias voltage the LM4911/LM4911Q does

not require output coupling capacitors. The classical single-

ended amplifier configuration where one side of the load is

connected to ground requires large, expensive output cou-

pling capacitors.

A configuration such as the one used in the LM4911/

LM4911Q has a major advantage over single supply, single-

ended amplifiers. Since the outputs VoA, VoB, and VoC are all

biased at 1/2 VDD, no net DC voltage exists across each load.

This eliminates the need for output coupling capacitors which

are required in a single-supply, single-ended amplifier con-

figuration. Without output coupling capacitors in a typical

single-supply, single-ended amplifier, the bias voltage is

placed across the load resulting in both increased internal IC

power dissipation and possible loudspeaker damage.

OUTPUT CAPACITOR vs. CAPACITOR COUPLED

The LM4911/LM4911Q is an stereo audio power amplifier

capable of operating in two distinct output modes: capacitor

coupled (C-CUPL) or output capacitor-less (OCL). The

LM4911/LM4911Q may be run in capacitor coupled mode by

using a coupling capacitor on each single-ended output (VoA

and VoB) and connecting VoC to ground. This output coupling

capacitor blocks the half supply voltage to which the output

amplifiers are typically biased and couples the audio signal to

the headphones or other single-ended (SE) load. The signal

return to circuit ground is through the headphone jack's

sleeve.

The LM4911/LM4911Q can also eliminate these output cou-

pling capacitors by running in OCL mode. Unless shorted to

ground, VoC is internally configured to apply a ½ VDD bias

voltage to a stereo headphone jack's sleeve. This voltage

matches the bias voltage present on VoA and VoB outputs that

drive the headphones. The headphones operate in a manner

similar to a bridge-tied load (BTL). Because the same DC

voltage is applied to both headphone speaker terminals this

results in no net DC current flow through the speaker. AC

current flows through a headphone speaker as an audio

signal's output amplitude increases on the speaker's terminal.

The headphone jack's sleeve is not connected to circuit

ground when used in OCL mode. Using the headphone output

jack as a line-level output will place the LM4911/LM4911Q's

½ VDD bias voltage on a plug's sleeve connection. This

presents no difficulty when the external equipment uses ca-

pacitively coupled inputs. For the very small minority of equip-

ment that is DC coupled, the LM4911/LM4911Q monitors the

current supplied by the amplifier that drives the headphone

jack's sleeve. If this current exceeds 500mAPK, the amplifier

is shutdown, protecting the LM4911/LM4911Q and the exter-

nal equipment.

MODE SELECT DETAIL

The LM4911/LM4911Q may be set up to operate in one of

two modes: OCL and cap-coupled. The default state of the

LM4911/LM4911Q at power up is cap-coupled. During initial

power up or return from shutdown, the LM4911/LM4911Q

must detect the correct mode of operation (OCL or cap-cou-

pled) by sensing the status of the VOC pin. When the bias

voltage of the part ramps up to 60mV (as seen on the Bypass

pin), an internal comparator detects the status of VOC; and at

80mV, latches that value in place. Ramp up of the bias voltage

will proceed at a different rate from this point on depending

upon operating mode. OCL mode will ramp up about 11 times

faster than cap-coupled. Shutdown is not a valid command

during this time period (TWU) and should not enabled to en-

sure a proper power on reset (POR) signal. In addition, the

slew rate of VDD must be greater than 2.5V/ms to ensure re-

liable POR. Recommended power up timing is shown in

Figure 5 along with proper usage of Shutdown and Mute. The

mode select circuit is suspended during CB discharge time.

The circuit shown in Figure 4 presents an applications solu-

tion to the problem of using different supply voltages with

different turn-on times in a system with the LM4911/

LM4911Q. This circuit shows the LM4911/LM4911Q with a

25-50kΩ pull-up resistor connected from the shutdown pin to

VDD. The shutdown pin of the LM4911/LM4911Q is also being

driven by an open drain output of an external microcontroller

on a separate supply. This circuit ensures that shutdown is

disabled when powering up the LM4911/LM4911Q by either

allowing shutdown to be high before the LM4911/LM4911Q

powers on (the microcontroller powers up first) or allows shut-

down to ramp up with VDD (the LM4911/LM4911Q powers up

first). This will ensure the LM4911/LM4911Q powers up prop-

erly and enters the correct mode of operation (cap-coupled or

OCL).

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LM4911/LM4911Q

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FIGURE 4. Recommended Circuit for Different Supply Turn-On Timing

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FIGURE 5. Turn-On, Shutdown, and Mute Timing for Cap-Coupled Mode

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LM4911/LM4911Q

POWER DISSIPATION

Power dissipation is a major concern when using any power

amplifier and must be thoroughly understood to ensure a suc-

cessful design. When operating in capacitor-coupled mode,

Equation 1 states the maximum power dissipation point for a

single-ended amplifier operating at a given supply voltage

and driving a specified output load.

PDMAX = (VDD) 2 / (2π2RL) (1)

Since the LM4911/LM4911Q has two operational amplifiers

in one package, the maximum internal power dissipation point

is twice that of the number which results from Equation 1.

From Equation 1, assuming a 3V power supply and an 32Ω

load, the maximum power dissipation point is 14mW per am-

plifier. Thus the maximum package dissipation point is 28mW.

When operating in OCL mode, the maximum power dissipa-

tion increases due to the use of the third amplifier as a buffer

and is given in Equation 2:

PDMAX = 4(VDD) 2 / (π2RL) (2)

The maximum power dissipation point obtained from either

Equation 1 or 2 must not be greater than the power dissipation

that results from Equation 3:

PDMAX = (TJMAX - TA) / θJA (3)

For package MUB10A, θJA = 190°C/W; for package LDA10A,

θJA = 63°C/W. TJMAX = 150°C for the LM4911/LM4911Q. De-

pending on the ambient temperature, TA, of the system sur-

roundings, Equation 3 can be used to find the maximum

internal power dissipation supported by the IC packaging. If

the result of Equation 1 or 2 is greater than that of Equation

3, then either the supply voltage must be decreased, the load

impedance increased or TA reduced. For the typical applica-

tion of a 3V power supply, with a 32Ω load, the maximum

ambient temperature possible without violating the maximum

junction temperature is approximately 144°C provided that

device operation is around the maximum power dissipation

point. Thus, for typical applications, power dissipation is not

an issue. Power dissipation is a function of output power and

thus, if typical operation is not around the maximum power

dissipation point, the ambient temperature may be increased

accordingly. Refer to the Typical Performance Characteristics

curves for power dissipation information for lower output pow-

ers.

EXPOSED-DAP PACKAGE PCB MOUNTING

CONSIDERATIONS

The LM4911/LM4911Q's exposed-DAP (die attach paddle)

package (LD) provides a low thermal resistance between the

die and the PCB to which the part is mounted and soldered.

This allows rapid heat transfer from the die to the surrounding

PCB copper traces, ground plane, and surrounding air.

The LD package should have its DAP soldered to a copper

pad on the PCB. The DAP's PCB copper pad may be con-

nected to a large plane of continuous unbroken copper. This

plane forms a thermal mass, heat sink, and radiation area.

Further detailed and specific information concerning PCB lay-

out, fabrication, and mounting an LD (LLP) package is avail-

able from National Semiconductor's Package Engineering

Group under application note AN1187.

POWER SUPPLY BYPASSING

As with any amplifier, proper supply bypassing is important

for low noise performance and high power supply rejection.

The capacitor location on the power supply pins should be as

close to the device as possible.

Typical applications employ a 3V regulator with 10mF tanta-

lum or electrolytic capacitor and a ceramic bypass capacitor

which aid in supply stability. This does not eliminate the need

for bypassing the supply nodes of the LM4911/LM4911Q. A

bypass capacitor value in the range of 0.1µF to 1µF is rec-

ommended for CS.

MICRO POWER SHUTDOWN

The voltage applied to the SHUTDOWN pin controls the

LM4911/LM4911Q's shutdown function. Activate micro-pow-

er shutdown by applying a logic-low voltage to the SHUT-

DOWN pin. When active, the LM4911/LM4911Q's micro-

power shutdown feature turns off the amplifier's bias circuitry,

reducing the supply current. The trigger point varies depend-

ing on supply voltage and is shown in the Shutdown Hystere-

sis Voltage graphs in the Typical Performance Characteristics

section. The low 0.1µA(typ) shutdown current is achieved by

applying a voltage that is as near as ground as possible to the

SHUTDOWN pin. A voltage that is higher than ground may

increase the shutdown current. There are a few ways to con-

trol the micro-power shutdown. These include using a single-

pole, single-throw switch, a microprocessor, or a microcon-

troller. When using a switch, connect an external 100kΩ pull-

up resistor between the SHUTDOWN pin and VDD. Connect

the switch between the SHUTDOWN pin and ground. Select

normal amplifier operation by opening the switch. Closing the

switch connects the SHUTDOWN pin to ground, activating

micro-power shutdown.

The switch and resistor guarantee that the SHUTDOWN pin

will not float. This prevents unwanted state changes. In a sys-

tem with a microprocessor or microcontroller, use a digital

output to apply the control voltage to the SHUTDOWN pin.

Driving the SHUTDOWN pin with active circuitry eliminates

the pull-up resistor.

Shutdown enable/disable times are controlled by a combina-

tion of CB and VDD. Larger values of CB results in longer turn

on/off times from Shutdown. Smaller VDD values also increase

turn on/off time for a given value of CB. Longer shutdown

times also improve the LM4911/LM4911Q's resistance to

click and pop upon entering or returning from shutdown. For

a 2.4V supply and CB = 4.7µF, the LM4911/LM4911Q re-

quires about 2 seconds to enter or return from shutdown. This

longer shutdown time enables the LM4911/LM4911Q to have

virtually zero pop and click transients upon entering or release

from shutdown.

Smaller values of CB will decrease turn-on time, but at the cost

of increased pop and click and reduced PSRR. Since shut-

down enable/disable times increase dramatically as supply

voltage gets below 2.2V, this reduced turn-on time may be

desirable if extreme low supply voltage levels are used as this

would offset increases in turn-on time caused by the lower

supply voltage. This technique is not recommended for OCL

mode since shutdown enable/disable times are very fast

(0.5s) independent of supply voltage.

When in cap-coupled mode, some restrictions on the usage

of Mute are in effect when entering or returning from shut-

down. These restrictions require Mute not be toggled imme-

diately following a return or entrance to shutdown for a brief

www.national.com 20

LM4911/LM4911Q

period. These periods are shown as X1 and X2 and are dis-

cussed in greater detail in the Mute section as well as shown

in Figure 5.

MUTE

When in C-CUPL mode, the LM4911/LM4911Q also features

a mute function that enables extremely fast turn-on/turn-off

with a minimum of output pop and click with a low current

consumption (≤ 100µA). The mute function leaves the outputs

at their bias level, thus resulting in higher power consumption

than shutdown mode, but also provides much faster turn on/

off times. Mute mode is enabled by providing a logic high sig-

nal on the MUTE pin in the opposite manner as the shutdown

function described above. Threshold voltages and activation

techniques match those given for the shutdown function as

well.

Mute may not appear to function when the LM4911/LM4911Q

is used to drive high impedance loads. This is because the

LM4911/LM4911Q relies on a typical headphone load

(16-32Ω) to reduce input signal feedthrough through the input

and feedback resistors. Mute attenuation can thus be calcu-

lated by the following formula:

Mute Attenuation (dB) = 20Log(RL / (Ri+RF)

Parallel load resistance may be necessary to achieve satis-

factory Mute levels when the application load is known to be

high impedance.

The mute function is not necessary when the LM4911/

LM4911Q is operating in OCL mode since the shutdown func-

tion operates quickly in OCL mode with less power consump-

tion than mute.

Mute may be enabled during shutdown transitions, but should

not be toggled for a brief period immediately after exiting or

entering shutdown. These brief time periods are labeled X1

(time after returning from shutdown) and X2 (time after en-

tering shutdown) and are shown in the timing diagram given

in Figure 5. X1 occurs immediately following a return from

shutdown (TWU) and lasts 40ms±25%. X2 occurs after the

part is placed in shutdown and the decay of the bias voltage

has occurred (2.2*400k*CB for cap-coupled and

2.2*100k*CB for OCL) and lasts for 100ms±25%. The timing

of these transition periods relative to X1 and X2 is also shown

in Figure 5. Mute should not be toggled during these time pe-

riods, but may be made during the shutdown transitions or

any other time the part is in normal operation (while in cap-

coupled mode - Mute is not valid in OCL mode). Failure to

operate mute correctly may result in much higher click and

pop values or failure of the device to mute at all.

PROPER SELECTION OF EXTERNAL COMPONENTS

Proper selection of external components in applications using

integrated power amplifiers is critical to optimize device and

system performance. While the LM4911/LM4911Q is tolerant

of external component combinations, consideration to com-

ponent values must be used to maximize overall system

quality.

The LM4911/LM4911Q is unity-gain stable which gives the

designer maximum system flexibility. The LM4911/LM4911Q

should be used in low gain configurations to minimize THD+N

values, and maximize the signal to noise ratio. Low gain con-

figurations require large input signals to obtain a given output

power. Input signals equal to or greater than 1Vrms are avail-

able from sources such as audio codecs. Very large values

should not be used for the gain-setting resistors. Values for

Ri and Rf should be less than 1MΩ. Please refer to the section,

Audio Power Amplifier Design, for a more complete expla-

nation of proper gain selection

Besides gain, one of the major considerations is the closed-

loop bandwidth of the amplifier. To a large extent, the band-

width is dictated by the choice of external components shown

in Figure 2 and Figure 3. The input coupling capacitor, Ci,

forms a first order high pass filter which limits low frequency

response. This value should be chosen based on needed fre-

quency response and turn-on time.

SELECTION OF INPUT CAPACITOR SIZE

Amplifying the lowest audio frequencies requires a high value

input coupling capacitor, Ci. A high value capacitor can be

expensive and may compromise space efficiency in portable

designs. In many cases, however, the headphones used in

portable systems have little ability to reproduce signals below

60Hz. Applications using headphones with this limited fre-

quency response reap little improvement by using a high

value input capacitor.

In addition to system cost and size, turn on time is affected by

the size of the input coupling capacitor Ci. A larger input cou-

pling capacitor requires more charge to reach its quiescent

DC voltage. This charge comes from the output via the feed-

back Thus, by minimizing the capacitor size based on nec-

essary low frequency response, turn-on time can be mini-

mized. A small value of Ci (in the range of 0.1µF to 0.39µF),

is recommended.

AUDIO POWER AMPLIFIER DESIGN

A 25mW/32Ω AUDIO AMPLIFIER

Given:

Power Output 25mWrms

Load Impedance 32Ω

Input Level 1Vrms

Input Impedance 20kΩ

A designer must first determine the minimum supply rail to

obtain the specified output power. By extrapolating from the

Output Power vs Supply Voltage graphs in the Typical Per-

formance Characteristics section, the supply rail can be

easily found.

3V is a standard voltage in most applications, it is chosen for

the supply rail. Extra supply voltage creates headroom that

allows the LM4911/LM4911Q to reproduce peak in excess of

25mW without producing audible distortion. At this time, the

designer must make sure that the power supply choice along

with the output impedance does not violate the conditions ex-

plained in the Power Dissipation section.

Once the power dissipation equations have been addressed,

the required gain can be determined from Equation 2.

(4)

From Equation 4, the minimum AV is 0.89; use AV = 1. Since

the desired input impedance is 20kΩ, and with a AV gain of 1,

a ratio of 1:1 results from Equation 1 for Rf to Ri. The values

are chosen with Ri = 20kΩ and Rf = 20kΩ. The final design

step is to address the bandwidth requirements which must be

stated as a pair of -3dB frequency points. Five times away

from a -3dB point is 0.17dB down from passband response

which is better than the required ± 0.25dB specified.

fL = 100Hz/5 = 20Hz

21 www.national.com

LM4911/LM4911Q

fH = 20kHz * 5 = 100kHz

As stated in the External Components section, Ri in con-

junction with Ci creates a

Ci ≥ 1 / (2π * 20kΩ * 20Hz) = 0.397µF; use 0.39µF.

The high frequency pole is determined by the product of the

desired frequency pole, fH, and the differential gain, AV. With

an AV = 1 and fH = 100kHz, the resulting GBWP = 100kHz

which is much smaller than the LM4911/LM4911Q GBWP of

10MHz. This figure displays that is a designer has a need to

design an amplifier with higher differential gain, the LM4911/

LM4911Q can still be used without running into bandwidth

limitations.

Figure 4 shows an optional resistor connected between the

amplifier output that drives the headphone jack sleeve and

ground. This resistor provides a ground path that suppressed

power supply hum. This hum may occur in applications such

as notebook computers in a shutdown condition and con-

nected to an external powered speaker. The resistor's 100Ω

value is a suggested starting point. Its final value must be de-

termined based on the tradeoff between the amount of noise

suppression that may be needed and minimizing the addi-

tional current drawn by the resistor (25mA for a 100Ω resistor

and a 5V supply).

ESD PROTECTION

As stated in the Absolute Maximum Ratings, the LM4911/

LM4911Q has a maximum ESD susceptibility rating of 2000V.

For higher ESD voltages, the addition of a PCDN042 dual

transil (from California Micro Devices), as shown in Figure 6,

will provide additional protection.

200314b4

FIGURE 6. The PCDN042 provides additional ESD protection beyond the 2000V shown in the

Absolute Maximum Ratings for the VOC output

www.national.com 22

LM4911/LM4911Q

Physical Dimensions inches (millimeters) unless otherwise noted

MSOP

Order Number LM4911/LM4911QMM

NS Package Number MUB10A

LLP

Order Number LM4911

NS Package Number LDA10A

23 www.national.com

LM4911/LM4911Q

Notes

LM4911/LM4911Q Stereo 40mW Low Noise Headphone Amplifier with Selectable Capacitive

Coupled or OCL Output

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