STGIPN3H60A - STMicroelectronics - Datasheet.Directory

This is information on a product in full production.

May 2012 Doc ID 018958 Rev 3 1/17

STGIPN3H60A

SLLIMM™-nano (small low-loss intelligent molded module)

IPM, 3 A - 600 V 3-phase IGBT inverter bridge

Datasheet − production data

Features

■IPM 3 A, 600 V, 3-phase IGBT inverter bridge

including control ICs for gate driving and

freewheeling diodes

■Optimized for low electromagnetic interference

■VCE(sat) negative temperature coefficient

■3.3 V, 5 V, 15 V CMOS/TTL input comparators

with hysteresis and pull-down resistor

■Undervoltage lockout

■Internal bootstrap diode

■Interlocking function

■Optimized pinout for easy board layout

Applications

■3-phase inverters for motor drives

■Dish washers, refrigerator compressors,

heating systems, air-conditioning fans,

draining and recirculation pumps

Description

This intelligent power module implements a

compact, high-performance AC motor drive in a

simple, rugged design. It is composed of six

IGBTs with freewheeling diodes and three half-

bridge HVICs for gate driving, providing low

electromagnetic interference (EMI) characteristics

with optimized switching speed. The package is

optimized for thermal performance and

compactness in built-in motor applications, or

other low power applications where assembly

space is limited. SLLIMM™ is a trademark of

STMicroelectronics.

NDIP-26L

Table 1. Device summary

Order code Marking Package Packaging

STGIPN3H60A GIPN3H60A NDIP-26L Tube

www.st.com

Contents STGIPN3H60A

2/17 Doc ID 018958 Rev 3

Contents

1 Internal schematic diagram and pin configuration . . . . . . . . . . . . . . . . 3

2 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

3.1 Control part . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

4 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

4.1 Recommendations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

5 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

STGIPN3H60A Internal schematic diagram and pin configuration

Doc ID 018958 Rev 3 3/17

1 Internal schematic diagram and pin configuration

Figure 1. Internal schematic diagram

GND

VCC

HIN

LIN VBOOT

LVG

OUT

HVG

GND

VCC

HIN

LIN VBOOT

LVG

OUT

HVG

GND

VCC

HIN

LIN VBOOT

LVG

OUT

HVG

LIN U

HIN U

cc U

LIN V

HIN V

cc V

LIN W

HIN W

cc W

GND

N W

W, OUT W

Vboot W

N V

V, OUT V

Vboot V

N U

U,OUT U

Vboot U

Pin 1

Pin 16 Pin 17

Pin 26

AM09917v1

Internal schematic diagram and pin configuration STGIPN3H60A

4/17 Doc ID 018958 Rev 3

Table 2. Pin description

Pin Symbol Description

1 GND Ground

2 NC Not connected

CC W Low voltage power supply W phase

4 HIN W High side logic input for W phase

5 LIN W Low side logic input for W phase

6 NC Not connected

7 NC Not connected

8 NC Not connected

CC V Low voltage power supply V phase

10 HIN V High side logic input for V phase

11 LIN V Low side logic input for V phase

12 NC Not connected

13 VCC U Low voltage power supply for U phase

14 HIN U High side logic input for U phase

15 NC Not connected

16 LIN U Low side logic input for U phase

17 Vboot U Bootstrap voltage for U phase

18 P Positive DC input

19 U U phase output

20 NUNegative DC input for U phase

21 Vboot V Bootstrap voltage for V phase

22 V V phase output

23 NVNegative DC input for V phase

24 Vboot W Bootstrap voltage for W phase

25 W W phase output

26 NWNegative DC input for W phase

STGIPN3H60A Internal schematic diagram and pin configuration

Doc ID 018958 Rev 3 5/17

Figure 2. Pin layout (top view)

(*) Dummy pin internally connected to P (positive DC input).

Electrical ratings STGIPN3H60A

6/17 Doc ID 018958 Rev 3

2 Electrical ratings

2.1 Absolute maximum ratings

Table 3. Inverter part

Symbol Parameter Value Unit

VCES Each IGBT collector emitter voltage (VIN(1) = 0)

1. Applied between HINi, LINi and GND for i = U, V, W.

600 V

± IC (2)

2. Calculated according to the iterative formula:

Each IGBT continuous collector current at

TC = 25 °C 3A

± ICP (3)

3. Pulse width limited by max junction temperature.

Each IGBT pulsed collector current 18 A

PTOT Each IGBT total dissipation at TC = 25 °C 8 W

Table 4. Control part

Symbol Parameter Min. Max. Unit

VOUT

Output voltage applied between OUTU, OUTV

OUTW - GND Vboot -18 Vboot + 0.3 V

VCC Low voltage power supply - 0.3 18 V

Vboot Bootstrap voltage - 0.3 618 V

VIN

Logic input voltage applied between HINi, LINi

and GND for i = U, V, W - 0.3 VCC + 0.3 V

ΔVOUT/dTAllowed output slew rate 50 V/ns

Table 5. Total system

Symbol Parameter Value Unit

VISO

Isolation withstand voltage applied between each

pin and heatsink plate (AC voltage, t = 60 sec.) 1000 V

TJPower chips operating junction temperature -40 to 150 °C

TCModule case operating temperature -40 to 125 °C

ICTC

() Tjmax()

–

Rthj c–VCE sat()max()

Tjmax()

ICTC

(),()×

------ ---- ----------- ---- --------------- ---- ----------- ---- ----------- ---- ---------- ----- --------------=

STGIPN3H60A Electrical ratings

Doc ID 018958 Rev 3 7/17

2.2 Thermal data

Table 6. Thermal data

Symbol Parameter Value Unit

RthJA Thermal resistance junction-ambient 50 °C/W

Electrical characteristics STGIPN3H60A

8/17 Doc ID 018958 Rev 3

3 Electrical characteristics

Tj = 25 °C unless otherwise specified.

Note: tON and tOFF include the propagation delay time of the internal drive. tC(ON) and tC(OFF) are

the switching time of IGBT itself under the internally given gate driving condition.

Figure 3. Switching time test circuit

Table 7. Inverter part

Symbol Parameter Test conditions Min. Typ. Max. Unit

VCE(sat)

Collector-emitter

saturation voltage

VCC = Vboot = 15 V, VIN(1)= 0 - 5 V,

IC = 1 A - 2.15 2.6

VCC = Vboot = 15 V, VIN(1)= 0 - 5 V,

IC = 1 A, TJ = 125 °C -1.65

ICES

Collector-cut off current

(VIN(1)= 0 “logic state”) VCE = 550 V, VCC = VBoot = 15 V - 250 µA

VFDiode forward voltage VIN(1) = 0 “logic state”, IC = 1 A - 1.7 V

Inductive load switching time and energy

ton Tur n- o n tim e

VDD = 300 V,

VCC = Vboot = 15 V,

VIN(1) = 0 - 5 V,

IC = 1 A

(see

Figure 4

)

-275

tc(on) Crossover time (on) - 90

toff Turn-off time - 890

tc(off) Crossover time (off) - 125

trr Reverse recovery time - 50

Eon Turn-on switching losses - 18 µJ

Eoff Turn-off switching losses - 13

1. Applied between HINi, LINi and GND for i = U, V, W (LIN inputs are active-low).

STGIPN3H60A Electrical characteristics

Doc ID 018958 Rev 3 9/17

Figure 4. Switching time definition

3.1 Control part

C(ON)

VIN(ON) 10% IC 90% IC 10% VCE

(a) turn-on (b) turn-off

100% IC 100% IC

OFF

C(OFF)

VIN(OFF) 10% VCE 10% IC

AM09223V1

Table 8. Low voltage power supply (VCC = 15 V unless otherwise specified)

Symbol Parameter Test conditions Min. Typ. Max. Unit

VCCthON Undervoltage turn-on threshold 9.1 9.6 10.1 V

VCCthOFF Undervoltage turn-off threshold 7.9 8.3 8.8 V

VCChys Undervoltage hystereses 0.9 V

Iqccu

Undervoltage quiescent supply

current VCC < 7.9 V 250 330 µA

Iqcc Quiescent current VCC = 15 V 350 450 µA

Table 9. Bootstrapped voltage (VCC = 15 V unless otherwise specified)

Symbol Parameter Test conditions Min. Typ. Max. Unit

Vboot_thON Undervoltage turn-on threshold 8.5 9.5 10.5 V

Vboot_thOFF Undervoltage turn-off threshold 7.2 8.3 9.2 V

Vboothys Undervoltage hystereses 0.9 V

Iqboot Quiescent current 250 µA

RDS(on) Bootstrap driver on-resistance VCC > 12.5 V 125 Ω

Electrical characteristics STGIPN3H60A

10/17 Doc ID 018958 Rev 3

Table 10. Logic inputs (VCC = 15 V unless otherwise specified) (1)

1. See

Figure 5: Dead time and interlocking definition

Symbol Parameter Test conditions Min. Typ. Max. Unit

Vil Low level logic input voltage 1.1 V

Vih High level logic input voltage 1.8 V

Iil Low level logic input current VIN (2) = 0

2. Applied between HINi, LINi and GND for i = U, V, W

-1 µA

Iih High level logic input current VIN (1) = 15 V 20 70 µA

Dt Dead time 320 ns

Figure 5. Dead time and interlocking definition

DT DT

LIN

HIN

LVG

HVG

Interlocking function

AM03794v1

STGIPN3H60A Application information

Doc ID 018958 Rev 3 11/17

4 Application information

Figure 6. Typical application circuit

Application information STGIPN3H60A

12/17 Doc ID 018958 Rev 3

4.1 Recommendations

●Input signals HIN, LIN are active-high logic. A 500 kΩ (typ.) pull-down resistor is built-in

for each high side input. If an external RC filter is used for noise immunity, attention

should be given to the variation of the input signal level.

●To prevent input signal oscillation, the wiring of each input should be as short as

possible.

●By integrating an application-specific type HVIC inside the module, direct coupling to

the MCU terminals without an opto-coupler is possible.

●Each capacitor should be located as close as possible to the pins of the IPM.

●Low inductance shunt resistors should be used for phase leg current sensing.

●Electrolytic bus capacitors should be mounted as close to the module bus terminals as

possible. Additional high frequency ceramic capacitors mounted close to the module

pins will further improve performance.

Note: For further details refer to AN4043.

Table 11. Recommended operating conditions

Symbol Parameter Test conditions Min. Typ. Max. Unit

VPN Supply voltage Applied between P-Nu, Nv,

Nw 300 500 V

VCC Control supply voltage Applied between VCC-

GND 12 15 17 V

VBS High side bias voltage Applied between VBOOTi-

OUTi for i = U, V, W 11.5 17 V

tdead

Blanking time to prevent

Arm-short For each input signal 1.5 µs

fPWM PWM input signal -40°C < Tc < 100°C

-40°C < Tj < 125°C 25 kHz

TCCase operation temperature 100 °C

STGIPN3H60A Package mechanical data

Doc ID 018958 Rev 3 13/17

5 Package mechanical data

In order to meet environmental requirements, ST offers these devices in different grades of

ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®

specifications, grade definitions and product status are available at: www.st.com.

ECOPACK is an ST trademark.

Table 12. NDIP-26L mechanical data

Dim.

mm.

Min. Typ. Max.

A4.40

A1 0.80 1.00 1.20

A2 3.00 3.10 3.20

A3 1.70 1.80 1.90

A4 5.70 5.90 6.10

b 0.53 0.72

b1 0.52 0.60 0.68

b2 0.83 1.02

b3 0.82 0.90 0.98

c 0.46 0.59

c1 0.45 0.50 0.55

D 29.05 29.15 29.25

D1 0.50

D2 0.35

D3 29.55

E 12.35 12.45 12.55

e 1.70 1.80 1.90

e1 2.40 2.50 2.60

eB1 16.10 16.40 16.70

eB2 21.18 21.48 21.78

L 1.24 1.39 1.54

Package mechanical data STGIPN3H60A

14/17 Doc ID 018958 Rev 3

Figure 7. NDIP-26L package dimensions

b1,b3

b,b2

eB1

eB2

0.075

8278949_A

STGIPN3H60A Package mechanical data

Doc ID 018958 Rev 3 15/17

Figure 8. NDIP-26L tube dimensions (dimensions are in mm.)

Note: Base quantity 17 pcs, bulk quantity 476 pcs.

ANTIS TATIC S 03 PVC

AM10474v1

8313150_A

Revision history STGIPN3H60A

16/17 Doc ID 018958 Rev 3

6 Revision history

Table 13. Document revision history

Date Revision Changes

23-Jun-2011 1Initial release.

09-Jan-2012 2 Document status promoted from preliminary data to datasheet.

Added

Figure 8 on page 15

02-May-2012 3 Modified: Min. and Max. value

Table 4 on page 6

Added:

Table 11 on page 12

STGIPN3H60A

Doc ID 018958 Rev 3 17/17

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