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December 2014
FCP104N60F — N-Channel SuperFET® II FRFET® MOSFET
©2013 Fairchild Semiconductor Corporation
FCP104N60F Rev. C3
www.fairchildsemi.com
1
FCP104N60F
N-Channel SuperFET® ll FRFET® MOSFET
600 V, 37 A, 104 mΩ
Features
• 650 V @ TJ = 150°C
•Typ. R
DS(on) = 91 mΩ
• Ultra Low Gate Charge (Typ. Qg = 110 nC)
• Low Effective Output Capacitance (Typ. Coss(eff.) = 313 pF)
• 100% Avalanche Tested
Applications
• Lighting
• Solar Inverter
• AC-DC Power Supply
Description
SuperFET® II MOSFET is Fairchild Semiconductor’s brand-new
high voltage super-junction (SJ) MOSFET family that is utilizing
charge balance technology for outstanding low on-resistance
and lower gate charge performance. This technology is tailored
to minimize conduction loss, provide superior switching
performance, dv/dt rate and higher avalanche energy.
Consequently, SuperFET II MOSFET is very suitable for the
switching power applications such as PFC, server/telecom
power, FPD TV power, ATX power and industrial power
applications. SuperFET® II FRFET® MOSFET’s optimized body
diode reverse recovery performance can remove additional
component and improve system reliability.
MOSFET Maximum Ratings TC = 25oC unless otherwise noted.
Thermal Characteristics
Symbol Parameter FCP104N60F Unit
VDSS Drain to Source Voltage 600 V
VGSS Gate to Source Voltage - DC ±20 V
- AC (f > 1Hz) ±30 V
IDDrain Current - Continuous (TC = 25oC) 37 A
- Continuous (TC = 100oC) 24
IDM Drain Current - Pulsed (Note 1) 114 A
EAS Single Pulsed Avalanche Energy (Note 2) 809 mJ
IAR Avalanche Current (Note 1) 6.8 A
EAR Repetitive Avalanche Energy (Note 1) 3.57 mJ
dv/dt Peak Diode Recovery dv/dt (Note 3) 50 V/ns
MOSFET dv/dt 100
PDPower Dissipation (TC = 25oC) 357 W
- Derate Above 25oC2.85W/
oC
TJ, TSTG Operating and Storage Temperature Range -55 to +150 oC
TL
Maximum Lead Temperature for Soldering,
1/8” from Case for 5 Seconds 300 oC
Symbol Parameter FCP104N60F Unit
RθJC Thermal Resistance, Junction to Case, Max. 0.35 oC/W
RθJA Thermal Resistance, Junction to Ambient ,Max. 62.5
TO-220
GDSG
S
D
FCP104N60F — N-Channel SuperFET® II FRFET® MOSFET
©2013 Fairchild Semiconductor Corporation
FCP104N60F Rev. C3
www.fairchildsemi.com
2
Package Marking and Ordering Information
Electrical Characteristics TC = 25oC unless otherwise noted.
Off Characteristics
On Characteristics
Dynamic Characteristics
Switching Characteristics
Drain-Source Diode Characteristics
Part Number Top Mark Package Packing Method Reel Size Tape Width Quantity
FCP104N60F FCP104N60F TO220 Tube N/A N/A 50 units
Symbol Parameter Test Conditions Min. Typ. Max. Unit
BVDSS Drain to Source Breakdown Voltage VGS = 0 V, ID = 10 mA, TJ = 25oC 600 - - V
VGS = 0 V, ID = 10 mA, TJ = 150oC 650 - -
ΔBVDSS
/ ΔTJ
Breakdown Voltage Temperature
Coefficient ID = 10 mA, Referenced to 25oC-0.67-V/
oC
BVDS
Drain-Source Avlanche Breakdown Volt-
age VGS = 0 V, ID = 18.5 A - 700 - V
IDSS Zero Gate Voltage Drain Current VDS = 600V, VGS = 0 V - - 10 μA
VDS = 480 V, TC = 125oC-16-
IGSS Gate to Body Leakage Current VGS = ±20 V, VDS = 0 V - - ±100 nA
VGS(th) Gate Threshold Voltage VGS = VDS, ID = 250 μA3-5V
RDS(on) Static Drain to Source On Resistance VGS = 10 V, ID = 18.5 A - 91 104 mΩ
gFS Forward Transconductance VDS = 20 V, ID = 18.5 A - 33 - S
Ciss Input Capacitance VDS = 25 V, VGS = 0 V
f = 1 MHz
- 4610 6130 pF
Coss Output Capacitance - 3255 4330 pF
Crss Reverse Transfer Capacitance - 155 235 pF
Coss Output Capacitance VDS = 380 V, VGS = 0 V, f = 1 MHz - 74 - pF
Coss eff. Effective Output Capacitance VDS = 0 V to 480 V, VGS = 0 V - 313 - pF
Qg(tot) Total Gate Charge at 10V
VDS = 380 V, ID = 18.5 A
VGS = 10 V
(Note 4)
- 110 145 nC
Qgs Gate to Source Gate Charge - 24 - nC
Qgd Gate to Drain “Miller” Charge - 44 - nC
ESR Equivalent Series Resistance Drain open 0.9 Ω
td(on) Turn-On Delay Time
VDD = 380 V, ID = 18.5 A
VGS = 10 V, RGEN = 4.7 Ω
(Note 4)
-3478ns
trTurn-On Rise Time - 20 50 ns
td(off) Turn-Off Delay Time - 102 214 ns
tfTurn-Off Fall Time - 5.7 21.4 ns
ISMaximum Continuous Drain to Source Diode Forward Current - - 37 A
ISM Maximum Pulsed Drain to Source Diode Forward Current - - 114 A
VSD Drain to Source Diode Forward Voltage VGS = 0 V, ISD = 18.5 A - - 1.2 V
trr Reverse Recovery Time VGS = 0 V, ISD = 18.5 A
dIF/dt = 100 A/μs
- 144 - ns
Qrr Reverse Recovery Charge - 0.91 - μC
Notes:
1. Repetitive Rating: Pulse width limited by maximum junction temperature
2. IAS = 6.8 A, VDD = 50 V, RG = 25 Ω, Starting TJ = 25°C
3. ISD ≤ 18.5 A, di/dt ≤ 200 A/μs, VDD ≤ BVDSS, Starting TJ = 25°C
4. Essentially Independent of Operating Temperature Typical Characteristics
FCP104N60F — N-Channel SuperFET® II FRFET® MOSFET
©2013 Fairchild Semiconductor Corporation
FCP104N60F Rev. C3
www.fairchildsemi.com
3
Typical Characteristics
Figure 1. On-Region Characteristics Figure 2. Transfer Characteristics
Figure 3. On-Resistance Variation vs. Figure 4. Body Diode Forward Voltage
Drain Current and Gate Voltage Variation vs. Source Current
and Temperature
Figure 5. Capacitance Characteristics Figure 6. Gate Charge Characteristics
0.1 1 10
1
10
100
*Notes:
1. 250μs Pulse Test
2. TC = 25oC
ID, Drain Current[A]
VDS, Drain-Source Voltage[V]
VGS = 20.0V
15.0V
10.0V
8.0V
7.0V
6.5V
5.5V
2468
1
10
100
-55oC
150oC
*Notes:
1. VDS = 20V
2. 250μs Pulse Test
25oC
ID, Drain Current[A]
VGS, Gate-Source Voltage[V]
0 22446688110
0.0
0.1
0.2
*Note: TC = 25oC
VGS = 20V
VGS = 10V
RDS(ON) [Ω],
Drain-Source On-Resistance
ID, Drain Current [A]
0.00.20.40.60.81.01.21.41.6
0.001
0.01
0.1
1
10
100
-55oC
*Notes:
1. VGS = 0V
2. 250μs Pulse Test
150oC
IS, Reverse Drain Current [A]
VSD, Body Diode Forward Voltage [V]
25oC
0 20406080100120
0
2
4
6
8
10
*Note: ID = 18.5A
VDS = 120V
VDS = 300V
VDS = 480V
VGS, Gate-Source Voltage [V]
Qg, Total Gate Charge [nC]
0.1 1 10 100 600
0.1
1
10
100
1000
10000
100000
Coss
Ciss
Ciss = Cgs + Cgd (Cds = shorted)
Coss = Cds + Cgd
Crss = Cgd
*Note:
1. VGS = 0V
2. f = 1MHz
Crss
Capacitances [pF]
VDS, Drain-Source Voltage [V]
FCP104N60F — N-Channel SuperFET® II FRFET® MOSFET
©2013 Fairchild Semiconductor Corporation
FCP104N60F Rev. C3
www.fairchildsemi.com
4
Typical Characteristics (Continued)
Figure 7. Breakdown Voltage Variation Figure 8. On-Resistance Variation
vs. Temperature vs. Temperature
Figure 9. Maximum Safe Operating Area Figure 10. Maximum Drain Current
vs. Case Temperature
Figure 11. Transient Thermal Response Curve
-75 -50 -25 0 25 50 75 100 125 150
0.8
0.9
1.0
1.1
1.2
*Notes:
1. VGS = 0V
2. ID = 10mA
BVDSS, [Normalized]
Drain-Source Breakdown Voltage
TJ, Junction Temperature [oC]
-75 -50 -25 0 25 50 75 100 125 150
0.5
1.0
1.5
2.0
2.5
*Notes:
1. VGS = 10V
2. ID = 18.5A
RDS(on), [Normalized]
Drain-Source On-Resistance
TJ, Junction Temperature [oC]
25 50 75 100 125 150
0
10
20
30
40
ID, Drain Current [A]
TC, Case Temperature [oC]
0.1 1 10 100 1000
0.01
0.1
1
10
100
1000
10μs
100μs
1ms
10ms
ID, Drain Current [A]
VDS, Drain-Source Voltage [V]
Operation in This Area
is Limited by R DS(on)
*Notes:
1. TC = 25oC
2. TJ = 150oC
3. Single Pulse
DC
10-5 10-4 10-3 10-2 10-1 110
0.001
0.01
0.1
1
0.01
0.1
0.2
0.05
0.02 *Notes:
1. ZθJC(t) = 0.35oC/W Max.
2. Duty Factor, D= t1/t2
3. TJM - TC = PDM * ZθJC(t)
0.5
Single pulse
Thermal Response [ZθJC]
Rectangular Pulse Duration [sec]
t
1
P
DM
t
2
ZθJC(t), Thermal Response [oC/W]
FCP104N60F — N-Channel SuperFET® II FRFET® MOSFET
©2013 Fairchild Semiconductor Corporation
FCP104N60F Rev. C3
www.fairchildsemi.com
5
Figure 12. Gate Charge Test Circuit & Waveform
Figure 13. Resistive Switching Test Circuit & Waveforms
Figure 14. Unclamped Inductive Switching Test Circuit & Waveforms
VGS
VDS
10%
90%
td(on) tr
ton toff
td(off) tf
VDD
10V
VDS
RL
DUT
RG
VGS
VGS
VDS
10%
90%
td(on) tr
ton toff
td(off) tf
VDD
10V
VDS
RL
DUT
RG
VGS
VGS
VGS
FCP104N60F — N-Channel SuperFET® II FRFET® MOSFET
©2013 Fairchild Semiconductor Corporation
FCP104N60F Rev. C3
www.fairchildsemi.com
6
Figure 15. Peak Diode Recovery dv/dt Test Circuit & Waveforms
DUT
VDS
+
_
Driver
RGSame Type
as DUT
VGS • dv/dt controlled by RG
•I
SD controlled by pulse period
VDD
L
ISD
10V
VGS
( Driver )
ISD
( DUT )
VDS
( DUT )
VDD
Body Diode
Forward Voltage Drop
VSD
IFM , Body Diode Forward Current
Body Diode Reverse Current
IRM
Body Diode Recovery dv/dt
di/dt
D = Gate Pulse Width
Gate Pulse Period
--------------------------
DUT
VDS
+
_
Driver
RGSame Type
as DUT
VGS • dv/dt controlled by RG
•I
SD controlled by pulse period
VDD
LL
ISD
10V
VGS
( Driver )
ISD
( DUT )
VDS
( DUT )
VDD
Body Diode
Forward Voltage Drop
VSD
IFM , Body Diode Forward Current
Body Diode Reverse Current
IRM
Body Diode Recovery dv/dt
di/dt
D = Gate Pulse Width
Gate Pulse Period
--------------------------
D = Gate Pulse Width
Gate Pulse Period
--------------------------
5°
3°
5°
3°
4.672
4.472
10.360
10.109
3.89
3.60
2.860
2.660
8.787
8.587
15.215
14.757
2.640
2.440
1.650
1.250
(SEE NOTE E)
0.889
0.787
5.180
4.980
13.894
12.941
1.91
15.97
15.89
0.36
M
B A
0.36
M
C
B
A
B
1.41
1.17
7°
3°
6.477
6.121
2.755
2.555
0.457
0.357
5°
3° 5°
3°
C
12.878
12.190
8.89
6.86
3.962
3.505
NOTES:
A. PACKAGE REFERENCE: JEDEC TO220
VARIATION AB
B. ALL DIMENSIONS ARE IN MILLIMETERS.
C. DIMENSION AND TOLERANCE AS PER ASME
Y14.5-2009.
D. DIMENSIONS ARE EXCLUSIVE OF BURRS,
MOLD FLASH AND TIE BAR PROTRUSIONS.
E. MAX WIDTH FOR F102 DEVICE = 1.35mm.
F. DRAWING FILE NAME: TO220T03REV4.
G. FAIRCHILD SEMICONDUCTOR.
31
3
1
www.onsemi.com
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in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
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