Compact 600 mA, 3 MHz, Step-Down
Converter with Output Discharge
Data Sheet
ADP2109
Rev. B
Informati
on furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
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FEATURES
Peak efficiency: 95%
Discharge switch function
Fixed frequency operation: 3 MHz
Typical quiescent current: 18 μA
Maximum load current: 600 mA
Input voltage: 2.3 V to 5.5 V
Uses tiny multilayer inductors and capacitors
Current mode architecture for fast load and line transient
response
100% duty-cycle low dropout mode
Internal synchronous rectifier
Internal compensation
Internal soft start
Current overload protection
Thermal shutdown protection
Shutdown supply current: 0.2 μA
5-ball WLCSP
Supported by ADIsimPower™ design tool
APPLICATIONS
PDAs and palmtop computers
Wireless handsets
Digital audio, portable media players
Digital cameras, GPS navigation units
GENERAL DESCRIPTION
The ADP2109 is a high efficiency, low quiescent current step-
down dc-to-dc converter with an internal discharge switch that
allows automatic discharge of the output capacitor in an ultra-
small 5-ball WLCSP package.
The total solution requires only three tiny external components.
It uses a proprietary high speed current mode and constant
frequency pulse-width modulation (PWM) control scheme for
excellent stability, and transient response. To ensure the longest
battery life in portable applications, the ADP2109 has a power
save mode that reduces the switching frequency under light
load conditions.
The ADP2109 runs on input voltages of 2.3 V to 5.5 V, which
allow for single lithium or lithium polymer cell, multiple alkaline
or NiMH cells, PCMCIA, USB, and other standard power
sources. The maximum load current of 600 mA is achievable
across the input voltage range.
The ADP2109 is available in fixed output voltages of 1.8 V, 1.5 V,
1.2 V, and 1.0 V. All versions include an internal power switch
and synchronous rectifier for minimal external part count and
high efficiency. The ADP2109 has an internal soft start and internal
compensation. During logic-controlled shutdown, the input is
disconnected from the output and the ADP2109 draws less than
1 μA from the input source.
Other key features include undervoltage lockout to prevent deep
battery discharge and soft start to prevent input current overshoot
at startup. The ADP2109 is available in a 5-ball WLCSP.
A similar converter, the ADP2108, provides the same features
and operations as the ADP2109 without the discharge switch
and is available in both WLCSP and TSOT packages with
additional output voltages.
TYPICAL APPLICATIONS CIRCUIT
07964-001
1.0V TO 1.8V
10µF
1µH
4.7µF
2.3V TO 5.5V
ON
OFF
ADP2109
GND
VIN
EN
SW
FB
Figure 1.
ADP2109 Data Sheet
Rev. B | Page 2 of 16
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
General Description ......................................................................... 1
Typical Applications Circuit ............................................................ 1
Revision History ............................................................................... 2
Specifications ..................................................................................... 3
Input and Output Capacitor, Recommended Specifications .. 3
Absolute Maximum Ratings ............................................................ 4
Thermal Resistance ...................................................................... 4
ESD Caution .................................................................................. 4
Pin Configuration and Function Descriptions ............................. 5
Typical Performance Characteristics ............................................. 6
Theory of Operation ...................................................................... 10
Control Scheme .......................................................................... 10
PWM Mode ................................................................................. 10
Power Save Mode ........................................................................ 10
Enable/Shutdown ....................................................................... 11
Discharge Switch ........................................................................ 11
Short-Circuit Protection............................................................ 11
Undervoltage Lockout ............................................................... 11
Thermal Protection .................................................................... 11
Soft Start ...................................................................................... 11
Current Limit .............................................................................. 11
100% Duty Operation ................................................................ 11
Applications Information .............................................................. 12
ADIsimPower Design Tool ....................................................... 12
External Component Selection ................................................ 12
Thermal Considerations ............................................................ 13
PCB Layout Guidelines.............................................................. 13
Evaluation Board ............................................................................ 14
Outline Dimensions ....................................................................... 15
Ordering Guide .......................................................................... 15
REVISION HISTORY
7/12—Rev. A to Rev B
Changes to Features Section............................................................. 1
Added ADIsimPower Design Tool Section .................................. 12
4/10—Rev. 0 to Rev. A
Changes to Ordering Guide .......................................................... 15
4/09—Revision 0: Initial Version
Data Sheet ADP2109
Rev. B | Page 3 of 16
SPECIFICATIONS
VIN = 3.6 V, V OUT = 1.8 V, T J = −40°C to +125°C for minimum/maximum specifications, and TA = 25°C for typical specifications, unless
otherwise noted.1
Table 1.
Parameters Conditions Min Typ Max Unit
INPUT CHARACTERISTICS
Input Voltage Range 2.3 5.5 V
Undervoltage Lockout Threshold VIN rising 2.3 V
VIN falling 2.05 2.15 2.25 V
OUTPUT CHARACTERISTICS
Output Voltage Accuracy PWM mode −2 +2 %
VIN = 2.3 V to 5.5 V, PWM mode −2.5 +2.5 %
POWER SAVE MODE TO PWM CURRENT THRESHOLD 85 mA
PWM TO POWER SAVE MODE CURRENT THRESHOLD
80
mA
INPUT CURRENT CHARACTERISTICS
DC Operating Current
I
LOAD
= 0 mA, device not switching
18
30
μA
Shutdown Current
EN = 0 V, T
A
= T
J
= −40°C to +85°C
0.2
1.0
μA
SW CHARACTERISTICS
SW On Resistance PFET 320 mΩ
NFET 300 mΩ
Current Limit PFET switch peak current limit 1100 1300 1500 mA
Discharge SW Resistance VOUT = 1.0 V 150 Ω
ENABLE CHARACTERISTICS
EN Input High Threshold 1.2 V
EN Input Low Threshold 0.4 V
EN Input Leakage Current EN = 0 V, 3.6 V −1 0 +1 μA
OSCILLATOR FREQUENCY ILOAD = 200 mA 2.5 3.0 3.5 MHz
START-UP TIME 550 μs
THERMAL CHARACTERISTICS
Thermal Shutdown Threshold 150 °C
Thermal Shutdown Hysteresis
20
°C
1 All limits at temperature extremes are guaranteed via correlation using standard statistical quality control (SQC).
INPUT AND OUTPUT CAPACITOR, RECOMMENDED SPECIFICATIONS
Table 2.
Parameter Symbol Conditions Min Typ Max Unit
MINIMUM INPUT AND OUTPUT CAPACITANCE CMIN TA = −40°C to +125°C 4.7 µF
MINIMUM AND MAXIMUM INDUCTANCE L TA = −40°C to +125°C 0.3 3.0 µH
ADP2109 Data Sheet
Rev. B | Page 4 of 16
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter Rating
VIN, EN −0.4 V to +6.5 V
FB, SW to GND −1.0 V to (VIN + 0.2 V)
Operating Ambient Temperature Range −40°C to +85°C
Operating Junction Temperature Range −40°C to +125°C
Storage Temperature Range −65°C to +150°C
Lead Temperature Range −65°C to +150°C
Soldering Conditions JEDEC J-STD-020
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Absolute maximum ratings apply individually only, not in
combination. Unless otherwise specified, all other voltages are
referenced to GND.
The ADP2109 can be damaged when the junction temperature
limits are exceeded. Monitoring ambient temperature does not
guarantee that the junction temperature (TJ) is within the specified
temperature limits. In applications with high power dissipation
and poor thermal resistance, the maximum ambient tempera-
ture may have to be derated. In applications with moderate
power dissipation and low PCB thermal resistance, the max-
imum ambient temperature can exceed the maximum limit
as long as TJ is within specification limits. TJ of the device is
dependent on the ambient temperature (TA) of the device,
the power dissipation (PD) of the device, and the junction-to-
ambient thermal resistance (θJA) of the package. Maximum TJ
is calculated from TA and PD using the following formula:
TJ = TA + (PD × θJA)
THERMAL RESISTANCE
θJA is specified for a device mounted on a JEDEC 2S2P PCB.
Table 4. Thermal Resistance
Package Type θJA Unit
5-Ball WLCSP 105 °C/W
ESD CAUTION
Data Sheet ADP2109
Rev. B | Page 5 of 16
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
VIN GND
SW
EN FB
TOP VIEW
(BALL SIDE DOW N)
Not t o Scal e
07964-003
1
A
B
C
2
BALLA1
INDICATOR
Figure 2. Pin Configuration
Table 5. Pin Function Descriptions
Pin No. Mnemonic Description
A1 VIN Power Source Input. VIN is the source of the PFET high-side switch. Bypass VIN to GND with a 2.2 μF or greater
capacitor as close to the ADP2109 as possible.
A2
GND
Ground. Connect all the input and output capacitors to GND.
B SW Switch Node Output. SW is the drain of the PFET switch and NFET synchronous rectifier.
C1 EN Enable Input. Drive EN high to turn on the ADP2109. Drive EN low to turn it off and reduce the input current to 0.1 μA.
C2 FB Feedback Input of the Error Amplifier. Connect FB to the output of the switching regulator.
ADP2109 Data Sheet
Rev. B | Page 6 of 16
TYPICAL PERFORMANCE CHARACTERISTICS
VIN = 3.6 V, TA = 25°C, VEN = VIN, unless otherwise noted.
12
14
16
18
20
22
24
2.5 3.0 3.5 4.0 4.5 5.0 5.5
07964-004
INPUT VOLTAGE (V)
QUIESCE NT CURRENT (µ A)
–40°C
+25°C
+85°C
Figure 3. Quiescent Supply Current vs. Input Voltage
2500
2600
2700
2800
2900
3000
3100
3200
3300
3400
3500
2.3 2.8 3.3 3.8 4.3 4.8 5.3
07964-005
INPUT VOLTAGE (V)
FRE QUENCY ( kHz )
–40°C
+25°C
+85°C
Figure 4. Switching Frequency vs. Input Voltage
1.795
1.800
1.805
1.810
1.815
1.820
1.825
1.830
1.835
1.840
–45 –25 –5 15 35 55 75
07964-006
TEMPERATURE (°C)
OUTPUT VOLTAGE (V)
IOUT = 10mA
IOUT = 150mA
IOUT = 500mA
Figure 5. Output Voltage vs. Temperature
600
700
800
900
1000
1100
1200
1300
1400
2.7 2.9 3.1 3.3 3.5 3.7 3.9 4.1 4.3 4.5 4.7 4.9 5.1 5.3 5.5
07964-007
INPUT VOLTAGE (V)
CURRENT LIM IT ( A)
Figure 6. PMOS Current Limit vs. Input Voltage
2.5 3.0 3.5 4.0 4.5 5.0 5.5
–40°C
07964-008
INPUT VOLTAGE (V)
OUTPUT CURRE NT (A)
0.04
0.05
0.06
0.07
0.08
0.09
0.10
0.11
0.12
0.13
0.14
0.15
+85°C
PWM TO PSM PSM TO PW M
Figure 7. Mode Transition Across Temperature
2.5 3.0 3.5 4.0 4.5 5.0 5.5
07964-009
INPUT VOLTAGE (V)
OUTPUT CURRE NT (A)
0.06
0.07
0.08
0.09
0.10
0.11
0.12
0.13
0.14
0.15
PWM TO PSM
PSM TO PW M
Figure 8. Mode Transition
Data Sheet ADP2109
Rev. B | Page 7 of 16
00.1 0.2 0.3 0.4 0.5 0.6
07964-010
OUTPUT CURRE NT (A)
OUTPUT VOLTAGE (V)
1.775
1.785
1.795
1.805
1.815
1.825
V
IN
= 2.7V
V
IN
= 3.6V
V
IN
= 4.5V
V
IN
= 5.5V
Figure 9. Load Regulation, VOUT = 1.8 V
00.1 0.2 0.3 0.4
0.5 0.6
0.990
0.995
1.000
1.005
1.010
1.015
1.020
1.025
07964-011
OUTPUT CURRE NT (A)
OUTPUT VOLTAGE (V)
0.985
V
IN
= 2.7V
V
IN
= 3.6V
V
IN
= 4.5V
V
IN
= 5.5V
Figure 10. Load Regulation, VOUT = 1.0 V
0
10
20
30
40
50
60
70
80
90
100
0.001 0.01 0.1 1
07964-012
OUTPUT CURRE NT (A)
EF FICIENCY ( %)
V
IN
= 2.7V
V
IN
= 3.6V
V
IN
= 4.5V
V
IN
= 5.5V
Figure 11. Efficiency, VOUT = 1.8 V
0
10
20
30
40
50
60
70
80
90
100
0.001 0.01 0.1 1
07964-013
OUTPUT CURRE NT (A)
EF FICIENCY ( %)
V
IN
= 2.7V
V
IN
= 3.6V
V
IN
= 4.5V
V
IN
= 5.5V
Figure 12. Efficiency, VOUT = 1.0 V
07964-014
CH1 50mV CH4 2VCH3 1V M 40µs A CH3 3.26V
1
4
3
T 10.80%
V
IN
SW
V
OUT
Figure 13. Line Transient, VOUT = 1.8 V, Power Save Mode, ILOAD = 20 mA
07964-015
20mV CH4 2VCH3 1V M 40µs A CH3 3.26V
1
4
3
10.80%
VIN
SW
VOUT
Figure 14. Line Transient, VOUT = 1.8 V, PWM, ILOAD =100 mA
ADP2109 Data Sheet
Rev. B | Page 8 of 16
07964-016
CH1 50mV CH4 2VCH3 1V M 40µs A CH3 3.26V
1
4
3
T 10.80%
V
IN
SW
V
OUT
Figure 15. Line Transient, VOUT = 1.0 V
07964-017
CH1 50mV CH2 200mA Ω
CH4 2V M 40µs A CH2 36mA
1
2
4
T 19.80%
SW
VOUT
IOUT
Figure 16. Load Transient, VOUT = 1.8 V, 300 mA to 600 mA
07964-018
CH1 50mV CH2 250mA
CH4 2V M 40µs A CH2 5mA
2
1
4
T 25.4%
SW
V
OUT
I
OUT
Figure 17. Load Transient, VOUT = 1.8 V, 50 mA to 300 mA
07964-019
CH1 50mV CH2 50mAΩ
CH4 2V M 40µs A CH2 12mA
2
1
4
T 25.4%
SW
V
OUT
I
OUT
Figure 18. Load Transient, VOUT = 1.8 V, 5 mA to 50 mA
07964-020
CH1 1V CH4 5V
CH2 250mA
CH3 5V M 40µs A CH3 2V
1
3
4
2
T 10.80%
SW
IL
VOUT EN
Figure 19. Startup, VOUT = 1.8 V, 400 mA
07964-021
CH1 1V CH4 5V
CH2 250mA
CH3 5V M 40µs A CH3 2V
1
2
4
3
T 10.80%
SW
I
L
V
OUT
EN
Figure 20. Startup, VOUT = 1.8 V, 5 mA
Data Sheet ADP2109
Rev. B | Page 9 of 16
07964-022
CH1 500mV CH4 5V
CH2 500mA
CH3 5V M 40µs A CH3 2.1V
3
1
2
4
T 19.80%
SW
I
L
V
OUT
EN
Figure 21. Startup, VOUT = 1.0 V, 600 mA
07964-030
CH1 500mV CH4 5.00VCH3 2.00V M 4. 00ms A CH1 380mV
1
3
4
T 73.40%
V
IN
= 5.5V
LOAD = 0mA
V
OUT
= 1.0V
V
OUT
ENABL E
SW
Figure 22. Typical Discharge Curve, VOUT = 1.0 V, VIN = 5.5 V
07964-024
CH1 50mV CH2 500mA
CH4 2V M 2µs A CH4 2. 64mA
1
2
4
T 20%
V
OUT
I
L
SW
Figure 23. Typical Power Save Mode Waveform, 50 mA
07964-023
CH1 20mV CH2 200mA
CH4 2V M 200ns A CH4 2.64V
1
2
4
T 20%
V
OUT
I
L
SW
Figure 24. Typical PWM Waveform, 200 mA
120
100
80
60
40
20
00TIME (ms)
RELATIVE OUTPUT VOLTAGE (%)
07964-031
201918
171615141312111098
7654
321
50µF
20µF
10µF
Figure 25. Discharge Profile with Different Values of Output Capacitors
ADP2109 Data Sheet
Rev. B | Page 10 of 16
THEORY OF OPERATION
GND
FB
VIN
SW
EN
ADP2109
07964-025
SOFT START
UNDERVOLTAGE
LOCKOUT
OSCILLATOR
THERMAL
SHUTDOWN
DRIVER
AND
ANTISHOOT-
THROUGH
PSM
COMP
LOW
CURRENT
PWM
COMP
I
LIMIT
GM E RROR
AMP
PWM/
PSM
CONTROL
Figure 26. Functional Block Diagram
The ADP2109 is a step-down dc-to-dc converter that uses a
fixed frequency and high speed current mode architecture. The
high switching frequency and tiny 5-ball WLCSP package allow
for a small step-down dc-to-dc converter solution.
The ADP2109 operates with an input voltage of 2.3 V to 5.5 V and
regulates an output voltage down to 1.0 V.
CONTROL SCHEME
The ADP2109 operates with a fixed frequency, current mode
PWM control architecture at medium to high loads for high
efficiency, but it shifts to a power save mode control scheme
at light loads, to lower the regulation power losses. When
operating in fixed frequency PWM mode, the duty cycle of the
integrated switches is adjusted and regulates the output voltage.
When operating in power save mode at light loads, the output
voltage is controlled in a hysteretic manner, with higher VOUT
ripple. During part of this time, the converter is able to stop
switching and enters an idle mode, which improves conversion
efficiency.
PWM MODE
In PWM mode, the ADP2109 operates at a fixed frequency of
3 MHz, set by an internal oscillator. At the start of each oscillator
cycle, the PFET switch is turned on, putting a positive voltage
across the inductor. Current in the inductor increases until the
current sense signal crosses the peak inductor current threshold
that turns off the PFET switch and turns on the NFET syn-
chronous rectifier. This puts a negative voltage across the
inductor, causing the inductor current to decrease. The
synchronous rectifier stays on for the rest of the cycle. The
ADP2109 regulates the output voltage by adjusting the peak
inductor current threshold.
POWER SAVE MODE
The ADP2109 smoothly transitions to the power save mode
of operation when the load current decreases below the power
save mode current threshold. On entry to power save mode,
an offset is induced in the PWM regulation level, which makes
the output voltage rise. When it has reached a level of approx-
imately 1.5 % above the PWM regulation level, PWM operation
is turned off. At this point, both power switches are off and the
ADP2109 enters an idle mode. COUT discharges until VOUT falls
to the PWM regulation voltage, at which point the device drives
the inductor to make VOUT rise again to the upper threshold.
This process repeats while the load current is below the power
save mode current threshold.
Power Save Mode Current Threshold
The power save mode current threshold is set to 80 mA. The
ADP2109 employs a scheme that enables this current to remain
accurately controlled, independent of VIN and VOUT levels. This
scheme also ensures that there is very little hysteresis between
the power save mode current threshold for entry to and exit
from the power save mode. The power save mode current
threshold has been optimized for excellent efficiency over
all load currents.
Data Sheet ADP2109
Rev. B | Page 11 of 16
ENABLE/SHUTDOWN
The ADP2109 starts operation with soft start when the EN pin
is toggled from logic low to logic high. Pulling the EN pin low
forces the device into shutdown mode, reducing the shutdown
current below 1 μA.
DISCHARGE SWITCH
The ADP2109 has an integrated resistor of typically 150 Ω, as
shown in Figure 27, to discharge the output capacitor when the
EN pin goes low or when the device goes into under-voltage
lock out or thermal shutdown. The time to discharge is typically
200 µs.
07964-002
FB
Figure 27. Internal Discharge Switch on Feedback
SHORT-CIRCUIT PROTECTION
The ADP2109 includes frequency foldback to prevent output
current runaway on a hard short. When the voltage at the feed-
back pin falls below half of the target output voltage, indicating
the possibility of a hard short at the output, the switching fre-
quency is reduced to half of the internal oscillator frequency.
The reduction in the switching frequency allows more time
for the inductor to discharge, preventing a runaway of output
current.
UNDERVOLTAGE LOCKOUT
To protect against battery discharge, undervoltage lockout
circuitry is integrated on the ADP2109. If the input voltage
drops below the 2.15 V undervoltage lockout (UVLO) thre-
shold, the ADP2109 shuts down and both the power switch
and synchronous rectifier turn off. When the voltage rises
above the UVLO threshold, the soft start period is initiated,
and the part is enabled.
THERMAL PROTECTION
In the event the ADP2109 junction temperatures rise above 150°C,
the thermal shutdown circuit turns off the converter. Extreme
junction temperatures can be the result of high current opera-
tion, poor circuit board design, and/or high ambient temperature.
A 20°C hysteresis is included so that when thermal shutdown
occurs, the ADP2109 does not return to operation until the
on-chip temperature drops below 130°C. When coming out
of thermal shutdown, soft start is initiated.
SOFT START
The ADP2109 has an internal soft start function that ramps
the output voltage in a controlled manner upon startup, thereby
limiting the inrush current. This prevents possible input voltage
drops when a battery or a high impedance power source is
connected to the input of the converter.
After the EN pin is driven high, internal circuits start to power
up. The time required to settle after the EN pin is driven high is
called the power-up time. After the internal circuits are powered
up, the soft start ramp is initiated and the output capacitor is
charged linearly until the output voltage is in regulation. The
time required for the output voltage to ramp is called the soft
start time.
Start-up time in the ADP2109 is the measure of when the output
is in regulation after the EN pin is driven high. Start-up time
consists of the power-up time and soft start time.
CURRENT LIMIT
The ADP2109 has protection circuitry to limit the amount of
positive current flowing through the PFET switch and through
the synchronous rectifier. The positive current limit on the
power switch limits the amount of current that can flow from
the input to the output. The negative current limit prevents the
inductor current from reversing direction and flowing out of
the load.
100% DUTY OPERATION
With a drop in VIN, or an increase in ILOAD, the ADP2109
reaches the limit where, even with the PFET switch on 100%
of the time, VOUT drops below the desired output voltage. At
this limit, the ADP2109 smoothly transitions to a mode where
the PFET switch stays on 100% of the time. When the input
conditions change again and the required duty cycle falls,
the ADP2109 immediately restarts PWM regulation without
allowing overshoot on VOUT.
ADP2109 Data Sheet
Rev. B | Page 12 of 16
APPLICATIONS INFORMATION
ADISIMPOWER DESIGN TOOL
The ADP2109 is supported by ADIsimPower design tool set.
ADIsimPower is a collection of tools that produce complete power
designs optimized for a specific design goal. The tools enable
the user to generate a full schematic, bill of materials, and calculate
performance in minutes. ADIsimPower can optimize designs for
cost, area, efficiency, and parts count while taking into consideration
the operating conditions and limitations of the IC and all real
external components. For more information about ADIsimPower
design tools, refer to www.analog.com/ADIsimPower. The tool
set is available from this website, and users can also request an
unpopulated board through the tool.
EXTERNAL COMPONENT SELECTION
Parameters like efficiency and transient response can be
affected by varying the choice of external components in
the applications circuit, as shown in Figure 1.
Inductor
The high switching frequency of the ADP2109 allows for the
selection of small chip inductors. For best performance, use
inductor values between 0.7 μH and 3 μH. Recommended
inductors are shown in Table 6.
The peak-to-peak inductor current ripple is calculated using
the following equation:
LfV
VVV
I
SW
IN
OUT
IN
OUT
RIPPLE
××
−×
=)(
where:
fSW is the switching frequency.
L is the inductor value.
The minimum dc current rating of the inductor must be greater
than the inductor peak current. The inductor peak current is
calculated using the following equation:
2
)(
RIPPLE
MAXLOAD
PEAK
I
II +=
Inductor conduction losses are caused by the flow of current
through the inductor, which has an associated internal DCR.
Larger sized inductors have smaller DCR, which may decrease
inductor conduction losses. Inductor core losses are related to
the magnetic permeability of the core material. Because the
ADP2109 is a high switching frequency dc-to-dc converter,
shielded ferrite core material is recommended for its low core
losses and low EMI.
Table 6. Suggested 1.0 μH Inductors
Vendor
Model
Dimensions
I
SAT
(mA)
DCR (mΩ)
Murata LQM2HPN1R0M 2.5 × 2.0 × 1.1 1500 90
Coilcraft LPS3010-102 3.0 × 3.0 × 0.9 1700 85
Toko MDT2520-CN 2.5 × 2.0 × 1.2 1800 100
TDK CPL2512T 2.5 × 1.5 × 1.2 1500 100
Output Capacitor
Higher output capacitor values reduce the output voltage ripple
and improve load transient response. When choosing this value,
it is also important to account for the loss of capacitance due to
output voltage dc bias.
Ceramic capacitors are manufactured with a variety of dielectrics,
each with a different behavior over temperature and applied
voltage. Capacitors must have a dielectric that is adequate to
ensure the minimum capacitance over the necessary temper-
ature range and dc bias conditions. X5R or X7R dielectrics
with a voltage rating of 6.3 V or 10 V are recommended for
best performance. Y5V and Z5U dielectrics are not recom-
mended for use with any dc-to-dc converter because of their
poor temperature and dc bias characteristics.
The worst-case capacitance accounting for capacitor variation
over temperature, component tolerance, and voltage is
calculated using the following equation:
CEFF = COUT × (1 – TEMPCO) × 1(1 – TOL)
where:
CEFF is the effective capacitance at the operating voltage.
TEMPCO is the worst-case capacitor temperature coefficient.
TOL is the worst-case component tolerance.
In this example, the worst-case temperature coefficient (TEMPCO)
over −40°C to +85°C is assumed to be 15% for an X5R dielectric.
The tolerance of the capacitor (TOL) is assumed to be 10%, and
COUT is 9.2481 μF at 1.8 V from the graph in Figure 28.
Substituting these values in the equation yields
CEFF = 9.2481 μF × (1 – 0.15) × (1 – 0.1) = 7.0747 μF
To guarantee the performance of the ADP2109, it is imperative
that the effects of dc bias, temperature, and tolerances on the
behavior of the capacitors be evaluated for each application.
0
2
4
6
8
10
12
0123456
07964-026
DC BIAS V OLTAG E ( V )
CAPACI TANCE (µF )
Figure 28. Typical Capacitor Performance
Data Sheet ADP2109
Rev. B | Page 13 of 16
The peak-to-peak output voltage ripple for a chosen output
capacitor and inductor values is calculated using the following
equation:
( )
OUT
SW
RIPPLE
OUT
SW
IN
RIPPLE
Cf
I
CLf
V
V××
=
××××π
=822
Capacitors with lower equivalent series resistance (ESR) are
preferred to guarantee low output voltage ripple, as shown in the
following equation:
RIPPLE
RIPPLE
COUT
I
V
ESR ≤
The effective capacitance needed for stability, which includes
temperature and dc bias effects, is 7 µF.
Table 7. Suggested 10 μF Capacitors
Vendor Type Model
Case
Size
Voltage
Rating (V)
Murata X5R GRM188R60J106 0603 6.3
Taiyo Yuden
X5R
JMK107BJ106
0603
6.3
TDK X5R C1608JB0J106K 0603 6.3
Input Capacitor
Higher value input capacitors help to reduce the input voltage
ripple and improve transient response.
Maximum input capacitor current is calculated using the
following equation:
IN
OUT
IN
OUT
MAXLOAD
CIN
V
VVV
II )(
)(
−
≥
To minimize supply noise, place the input capacitor as close as
possible to the VIN pin of the ADP2109 IC. As with the output
capacitor, a low ESR capacitor is recommended.
The list of recommended capacitors is shown in Table 8.
Table 8. Suggested 4.7 μF Capacitors
Vendor Type Model
Case
Size
Voltage
Rating
(V)
Murata X5R GRM188R60J475ME19 0603 6.3
Taiyo Yuden X5R JMK107BJ475 0603 6.3
TDK X5R C1608X5R0J475 0603 6.3
THERMAL CONSIDERATIONS
Because of the high efficiency of the ADP2109, only a small
amount of power is dissipated inside the ADP2109 package,
which reduces thermal constraints.
However, in applications with maximum loads at high ambient
temperature, low supply voltage, and high duty cycle, the heat
dissipated in the package is great enough that it may cause the
junction temperature of the die to exceed the maximum junction
temperature of 125°C. If the junction temperature exceeds
150°C, the converter goes into thermal shutdown. It recovers
when the junction temperature falls below 130°C.
The junction temperature of the die is the sum of the ambient
temperature of the environment and the temperature rise of the
package due to power dissipation, as shown in the following
equation:
TJ = TA + TR
where:
TJ is the junction temperature.
TA is the ambient temperature.
TR is the rise in temperature of the package due to power
dissipation to it.
The rise in temperature of the package is directly proportional
to the power dissipation in the package. The proportionality
constant for this relationship is the thermal resistance from the
junction of the die to the ambient temperature, as shown in the
following equation:
TR = θJA × PD
where:
TR is the rise of temperature of the package.
θJA is the thermal resistance from the junction of the die to the
ambient temperature of the package.
PD is the power dissipation in the package.
PCB LAYOUT GUIDELINES
Poor layout can affect ADP2109 performance causing
electromagnetic interference (EMI) and electromagnetic
compatibility (EMC) problems, ground bounce, and voltage
losses. Poor layout can also affect regulation and stability.
A good layout is implemented using the following rules:
• Place the inductor, input capacitor, and output capacitor
close to the IC using short tracks. These components carry
high switching frequencies and the large tracks act like
antennas.
• Route the output voltage path away from the inductor and
SW node to minimize noise and magnetic interference.
• Maximize the size of ground metal on the component side
to help with thermal dissipation.
• Use a ground plane with several vias connecting to the
component side ground to further reduce noise interfe-
rence on sensitive circuit nodes.
ADP2109 Data Sheet
Rev. B | Page 14 of 16
EVALUATION BOARD
V
OUT
GND O UT
V
OUT
ADP2109
TB3
TB4
C
OUT
10µF
L1
1µH
U1
1B
C2
A1
V
IN
C1
A2 GND
2
C
IN
4.7µF
07964-027
V
IN
EN EN
VIN SW
FBEN
TB1
TB2
GND I N TB5
Figure 29. Evaluation Board Schematic
07964-028
Figure 30. Top Layer, Recommended Layout
07964-029
Figure 31. Bottom Layer, Recommended Layout
Data Sheet ADP2109
Rev. B | Page 15 of 16
OUTLINE DIMENSIONS
021109-B
A
B
C
0.657
0.602
0.546
1.06
1.02
0.98
1.49
1.45
1.41
1
2
BOTTOM VIEW
(BALL SI DE UP)
TOP VIEW
(BALL SI DE DOW N)
0.330
0.310
0.290 0.866
REF
0.022
REF SEATING
PLANE
0.50
REF
0.355
0.330
0.304 0.280
0.250
0.220
COPLANARITY
0.04
0.50
BALLA1
IDENTIFIER
Figure 32. 5-Ball Wafer Level Chip Scale Package [WLCSP]
(CB-5-3)
Dimensions shown in millimeters
ORDERING GUIDE
Model1
Temperature
Range
Output
Voltage (V) Package Description
Package
Option Branding
ADP2109ACBZ-1.0-R7 –40°C to +125°C 1.0 5-Ball Wafer Level Chip Scale Package [WLCSP] CB-5-3 L9D
ADP2109ACBZ-1.2-R7 –40°C to +125°C 1.2 5-Ball Wafer Level Chip Scale Package [WLCSP] CB-5-3 L9E
ADP2109ACBZ- 1.5-R7 –40°C to +125°C 1.5 5-Ball Wafer Level Chip Scale Package [WLCSP] CB-5-3 LDA
ADP2109ACBZ-1.8-R7
–40°C to +125°C
1.8
5-Ball Wafer Level Chip Scale Package [WLCSP]
CB-5-3
L9F
ADP2109CB-1.8EVALZ Evaluation Board for 1.8 V
1 Z = RoHS Compliant Part.
