1
®
FN6085.9
ISL83080E, ISL83082E, ISL83083E, ISL83084E,
ISL83085E, ISL83086E, ISL83088E
±15kV ESD, 5V, Full Fail-Safe, 1/8 Unit
Load, RS-485/RS-422 Transceivers
The ISL8308xE are BiCMOS, ESD protected, 5V powered,
single transceivers that meet both the RS-48 5 and RS-422
standards for balanced communication. Each driver output,
and receiver input, i s protected against ± 15kV ESD strike s
without latch-up, and unlike competitive product s, this Intersil
family is specified for 10% tolerance supplies (4 .5 V to 5.5V).
These devices have very low bus currents (+125µA/-75µA),
so they present a true “1/8 unit load” to the RS-485 bus. This
allows up to 256 transceivers on the network without violat ing
the RS-485 specification’s 32 unit load maxi mum, and without
using repeaters. For example, in a remote utility meter reading
system, individual meter readings are routed to a concentrator
via an RS-485 network, so the high allowed node count
minimizes the number of repeaters required. Data for all
meters is then read out from the concentrator via a single
access port, or a wireless link.
Receiver (Rx) input s feature a “Full Fail-Safe” d esi gn, which
ensures a logic high Rx output if Rx input s are floa ting,
shorted, or terminated but undriven.
The ISL83080E, ISL83082E, ISL83083E, ISL83084E,
ISL83085E utilize slew rate limited drivers which reduce EMI,
and minimize reflections from improperly terminated
transmission lines, or unterminated stubs in multidrop and
multipoint applications. Slew rate limited versions also include
receiver input filtering to enhance noise immunity in the
presence of slow input signals.
Hot Plug circuitry ensures that the Tx and Rx ou tput s remain
in a high impedance state until the power supply has
stabilized, and the Tx outputs are fully short circuit protected.
The ISL8 3080E, ISL8308 3E, ISL83084E, ISL 83086E are
configured for full duplex (separate Rx input and Tx output
pins) applications. The half duplex versions multiplex the Rx
inputs and Tx outputs to allow transceivers with output
disable functions in 8 Ld packages.
Features
• Pb-Free Available (RoHS Compliant)
• RS-485 I/O Pin ESD Protection . . . . . . . . . . ±15kV HBM
Class 3 ESD Protection (HBM) on all Pins. . . . . . . . >7kV
• Tiny MSOP Packages Save 50% Board Space
• Full Fail-Safe (Open, Short, Terminated and Floating)
Receivers
• Hot Plug Circuitry (ISL83080E, ISL83082E, ISL8308 3E,
ISL83085E)
- Tx and Rx Outputs Remain Three-state During
Power-up/Power-down
• True 1/8 Unit Load Allows up to 256 Devices on the Bus
• Specified for Single 5V, 10% Tolerance, Supplies
• High Data Rates. . . . . . . . . . . . . . . . . . . . . up to 10Mbps
• Low Quiescent Supply Current . . . . . . . . . . . . . . . 530µA
Ultra Low Shutdown Supply Current . . . . . . . . . . . . 70nA
• -7V to +12V Common Mode Input Voltage Range
• Half and Full Duplex Pinouts
• Three- State R x and Tx Outputs (Excep t ISL83084E)
• Current Limiting and Thermal Shutdown for driver
Overload Protection
Applications
• Automated Utility Meter Reading Systems
• High Node Count Systems
• Factory Automation
• Field Bus Networks
• Security Camera Networks
• Building Environmental Control Systems
• Industrial/Process Control Networks
TABLE 1. SUMMARY OF FEATURES
PART
NUMBER HALF/FULL
DUPLEX DA TA RA TE
(Mbps) SLEW-RATE
LIMITED? HOT PLUG # DEVICES
ON BUS Rx/Tx
ENABLE? QUIESCENT
ICC (µA) LOW POWER
SHUTDOWN? PIN
COUNT
ISL83080E Full 0.115 Yes Yes 256 Yes 530 Yes 10, 14
ISL83082E Half 0.115 Yes Yes 256 Yes 530 Yes 8
ISL83083E Full 0.5 Yes Yes 256 Yes 530 Yes 10, 14
ISL83084E Full 0.5 Yes No 256 No 530 No 8
ISL83085E Half 0.5 Yes Yes 256 Yes 530 Yes 8
ISL83086E Full 10 No No 256 Yes 530 Yes 10, 14
ISL83088E Half 10 No No 256 Yes 530 Yes 8
Data Sheet
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 |Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2004-2005, 2008. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
April 22, 2008
2FN6085.9
April 22, 2008
Pinouts ISL83082E, ISL83085E, ISL83088E
(8 LD MSOP, SOIC)
TOP VIEW
ISL83084E
(8 LD SOIC)
TOP VIEW
ISL83080E, ISL83083E, ISL83086E
(10 LD MSOP)
TOP VIEW
ISL83080E, ISL83083E, ISL83086E
(14 LD SOIC)
TOP VIEW
RO
RE
DE
DI
1
2
3
4
8
7
6
5
VCC
B/Z
A/Y
GND
D
RVCC
RO
DI
GND
1
2
3
4
8
7
6
5
A
B
Z
Y
D
R
RO
RE
DE
DI
GND
VCC
A
B
Z
Y
1
2
3
4
5
10
9
8
7
6
D
RNC
RO
RE
DE
DI
GND
GND
VCC
NC
A
B
Z
Y
NC
1
2
3
4
5
6
7
14
13
12
11
10
9
8
D
R
Ordering Information
PART NUMBER (Note 1) PART MARKING TEMP. RANGE (°C) PACKAGE PKG. DWG. #
ISL83080EIB 83080EIB -40 to +85 14 Ld SOIC M14.15
ISL83080EIBZ (Note 2) 83080EIBZ -40 to +85 14 Ld SOIC (Pb-free) M14.15
ISL83080EIUZ (Note 2) 3080Z -40 to +85 10 Ld MSOP (Pb-free) M10.118
ISL83082EIB 83082 EIB -40 to +85 8 Ld SOIC M8.15
ISL83082EIBZ (Note 2) 83082 EIBZ -40 to +85 8 Ld SOIC (Pb-free) M8.15
ISL83082EIU 3082E -40 to +85 8 Ld MSOP M8.118
ISL83082EIUZ (Note 2) 3082Z -40 to +85 8 Ld MSOP (Pb-free) M8.118
ISL83083EIB 83083EIB -40 to +85 14 Ld SOIC M14.15
ISL83083EIBZ (Note 2) 83083EIBZ -40 to +85 14 Ld SOIC (Pb-free) M14.15
ISL83083EIUZ (Note 2) 3083Z -40 to +85 10 Ld MSOP (Pb-free) M10.118
ISL83084EIBZ (Note 2) 83084 EIBZ -40 to +85 8 Ld SOIC (Pb-free) M8.15
ISL83085EIB 83085 EIB -40 to +85 8 Ld SOIC M8.15
ISL83085EIBZ (Note 2) 83085 EIBZ -40 to +85 8 Ld SOIC (Pb-free) M8.15
ISL83085EIU 3085E -40 to +85 8 Ld MSOP M8.118
ISL83085EIUZ (Note 2) 3085Z -40 to +85 8 Ld MSOP (Pb-free) M8.118
ISL83086EIB 83086EIB -40 to +85 14 Ld SOIC M14.15
ISL83086EIBZ (Note 2) 83086EIBZ -40 to +85 14 Ld SOIC (Pb-free) M14.15
ISL83086EIUZ (Note 2) 3086Z -40 to +85 10 Ld MSOP (Pb-free) M10.118
ISL83088EIB 83088 EIB -40 to +85 8 Ld SOIC M8.15
ISL83088EIBZ (Note 2) 83088 EIBZ -40 to +85 8 Ld SOIC (Pb-free) M8.15
ISL83080E, ISL83082E, ISL83083E, ISL83084E, ISL83085E, ISL83086E, ISL83088E
3FN6085.9
April 22, 2008
ISL83088EIU 3088E -40 to +85 8 Ld MSOP M8.118
ISL83088EIUZ (Note 2) 3088Z -40 to +85 8 Ld MSOP (Pb-free) M8.118
NOTES:
1. Add “-T” suffix for tape and reel. Please refer to TB347 for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte
tin plate PLUS ANNEAL - e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations.
Intersil Pb-free products are MSL classified at Pb-free peak reflow tem peratures that meet or exceed the Pb-free requirements of IPC/JEDEC
J STD-020.
Ordering Information (Continued)
PART NUMBER (Note 1) PART MARKING TEMP. RANGE (°C) PACKAGE PKG. DWG. #
Truth Tables
TRANSMITTING
INPUTS OUTPUTS
RE DE DI Z Y
X1101
X1010
0 0 X High-Z High-Z
1 0 X High-Z * High-Z*
NOTE: *Shutdown Mode (See Notes 10 and 13).
RECEIVING
INPUTS OUTPUT
RE DE
Half Duplex DE
Full Duplex A-B RO
00 X≥ -0.05V 1
00 X≤ -0.2V 0
0 0 X Inputs
Open/Shorted 1
10 0 XHigh-Z*
1 1 1 X High-Z
NOTE: *Shutdown Mode (See Notes 10 and 13).
Pin Descriptions
PIN FUNCTION
RO Receiver output: If A - B ≥ -50mV, RO is high; If A - B ≤ -200mV, RO is low; RO = High if A and B are unconnected (float in g)
or shorted.
RE Receiver output enable. RO is enabled when RE is low; RO is high impedance when RE is high.
DE Driver output enable. The driver outputs, Y and Z, are enabled by bringing DE high. They are high impedance when DE is
low.
DI Driver input. A low on DI forces output Y low and output Z high. Similarly , a high on DI forces output Y high and output Z low.
GND Ground connection.
A/Y ±15kV HBM ESD Protected RS-485/RS-422 level, noninverting receiver input and noninverting driver output. Pin is an input
if DE = 0; pin is an output if DE = 1.
B/Z ±15kV HBM ESD Protected RS-485/RS-422 level, Inverting receiver input and inverting driver output. Pin is an input if DE
= 0; pin is an output if DE = 1.
A ±15kV HBM ESD Protected RS-485/RS-422 level, noninverting receiver input.
B ±15kV HBM ESD Protected RS-485/RS-422 level, inverting receiver input.
Y ±15kV HBM ESD Protected RS-485/RS-422 level, noninverting driver output.
Z ±15kV HBM ESD Protected RS-485/RS-422 level, inverting driver output.
VCC System power supply input (4.5V to 5.5V).
NC No Connection.
ISL83080E, ISL83082E, ISL83083E, ISL83084E, ISL83085E, ISL83086E, ISL83088E
4FN6085.9
April 22, 2008
Typical Operating Circuit
ISL83082E, ISL83085E, ISL83088E
ISL83080E, ISL83083E, ISL83086E
ISL83084E
0.1µF
+
D
R
7
6
8
1
2
3
4
5
VCC
GND
RO
RE
DE
DI
A/Y
B/Z
+5V
0.1µF+
D
R
6
7
8
1
2
3
4
5
VCC
GND
RO
RE
DE
DI
A/Y
B/Z
+5V
RTRT
0.1µF
+
D
R12
11
10
9
14
2
3
4
5
6, 7
VCC
GND
RO
RE
DE
DI
A
B
Y
Z
+5V
0.1µF+
D
R
12
11
10
9
14
2
3
4
5
6, 7
VCC
GND
RO
RE
DE
DI
A
B
Y
Z
+5V
RT
RT
0.1µF
+
D
R8
7
6
5
1
2
3
4
VCC
GND
RO
DI
A
B
Y
Z
+5V
0.1µF +
D
R
8
7
6
5
1
2
3
4
VCC
GND
RO
DI
A
B
Y
Z
+5V
RT
RT
ISL83080E, ISL83082E, ISL83083E, ISL83084E, ISL83085E, ISL83086E, ISL83088E
5FN6085.9
April 22, 2008
Absolute Maximum Ratings Thermal Information
VCC to Ground. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7V
Input Voltages
DI, DE, RE . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to (VCC + 0.3V)
Input/Output Voltages
A, B, Y, Z . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -9V to +13V
A, B, Y, Z (Transient Pulse Through 100Ω, Note 14) . . . . . . ±75V
RO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to (VCC + 0.3V)
Short Circuit Duration
Y, Z. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous
ESD Rating . . . . . . . . . . . . . . . . . . . . . . . . . See Specification Table
Thermal Resistance (Typical, Note 3) θJA (°C/W)
8 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . 105
8 Ld MSOP Package . . . . . . . . . . . . . . . . . . . . . . . . 140
10 Ld MSOP Package . . . . . . . . . . . . . . . . . . . . . . . 190
14 Ld SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . 128
Maximum Junction Temperature (Plastic Package) . . . . . . +150°C
Maximum Storage Temperature Range. . . . . . . . . .-65°C to +150°C
Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Operating Conditions
Temperature Range. . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to +85°C
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
NOTE:
3. θJA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
Electrical Specifications Test Conditions: VCC = 4.5V to 5.5V; Unless Otherwise Specified. Typicals are at VCC = 5V, TA = +25°C
(Note 5).
PARAMETER SYMBOL TEST CONDITIONS TEMP
(°C) MIN
(Note 4) TYP MAX
(Note 4) UNITS
DC CHARACTERISTICS
Driver Differential VOUT (no load) VOD1 Full - - VCC V
Driver Differential VOUT (with load) VOD2 RL = 100Ω (RS-422) (Figure 1A) Full 2 2.9 - V
RL = 54Ω (RS-485) (Figure 1A) Full 1.5 2.4 VCC V
RL = 60Ω, -7V ≤ VCM ≤ 12V (Figure 1B) Full 1.5 2.6 - V
Change in Magnitude of Driver
Differential VOUT for
Complementary Output States
ΔVOD RL = 54Ω or 100Ω (Figure 1A) Full - 0.01 0.2 V
Driver Common-Mode VOUT VOC RL = 54Ω or 100Ω (Figure 1A) Full - 2.85 3 V
Change in Magnitude of Driver
Common-Mode VOUT for
Complementary Output States
ΔVOC RL = 54Ω or 100Ω (Figure 1A) Full - 0.01 0.1 V
Logic Input High Voltage VIH DE, DI, RE Full 2 - - V
Logic Input Low Voltage VIL DE, DI, RE Full - - 0.8 V
DI Input Hysteresis Voltage VHYS 25 - 100 - mV
Logic Input Current IIN1 DE, DI, RE Full -2 - 2 µA
Input Current (A, B) IIN2 DE = 0V, VCC = 0V or 5.5V VIN = 12V Full - 70 125 µA
VIN = -7V Full -75 55 - µA
Output Leakage Current (Y , Z) (Full
Duplex Versions Only) IIN3 RE = 0V , DE = 0V , VCC = 0V
or 5.5V (Note 13) VIN = 12V Full - 7 125 µA
VIN = -7V Full -75 11 - µA
Output Leakage Current (Y, Z)
in Shutdown Mode (Full Duplex) IIN3 RE = VCC, DE = 0V,
VCC = 0V or 5.5V (Note 13) VIN = 12V Full - 0 20 µA
VIN = -7V Full -20 9 - µA
Driver Short-Circuit Current,
VO = High or Low IOSD1 DE = VCC, -7V ≤ VY or VZ ≤ 12V (Note 7) Full - - ±250 mA
ISL83080E, ISL83082E, ISL83083E, ISL83084E, ISL83085E, ISL83086E, ISL83088E
6FN6085.9
April 22, 2008
Receiver Differential Threshold
Voltage VTH -7V ≤ VCM ≤ 12V Full -200 -90 -50 mV
Receiver Input Hysteresis ΔVTH VCM = 0V 25 - 20 - mV
Receiver Output High Voltage VOH IO = -4 mA, VID = -50mV Full VCC - 1 4.6 - V
Receiver Output Low Voltage VOL IO = -4mA, VID = -200mV Full - 0.2 0.4 V
Three-State (high impedance)
Receiver Output Current IOZR 0.4V ≤ VO ≤ 2.4V (Note 13) Full -1 0.03 1 µA
Receiver Input Resistance RIN -7V ≤ VCM ≤ 12V Full 96 160 - kΩ
Receiver Short-Circuit Current IOSR 0V ≤ VO ≤ VCC Full ±7 - ±85 mA
SUPPLY CURRENT
No-Load Supply Current (Note 6) ICC Half Duplex Versions, DE = VCC, RE = X,
DI = 0V or VCC Full - 560 700 µA
All Versions, DE = 0V, RE = 0V, or Full Du plex
Versions, DE = VCC, RE = X. DI = 0V or VCC Full - 530 650 µA
Shutdown Supply Current ISHDN DE = 0V, RE = VCC, DI = 0V or VCC (Note 13) Full - 0.07 2 µA
ESD PERFORMANCE
RS-485 Pins (A, Y, B, Z) Human Body Model (HBM), Pin to GND 25 - ±15 - kV
All Other Pins HBM, per MIL-STD-883 Method 3015 25 - ±7 - kV
Machine Model 25 - > ±250 - V
DRIVER SWITCHING CHARAC TERISTICS (115kbps Versions; ISL83080E, ISL83082E)
Driver Differential Output Delay tPLH, tPHL RDIFF = 54Ω, CL = 100pF (Figure 2) Full 500 780 1300 ns
Driver Differential Output Skew tSKEW RDIFF = 54Ω, CL = 100pF (Figure 2) Full - 40 100 ns
Driver Differential Rise or Fall Time tR, tFRDIFF = 54Ω, CL = 100pF (Figure 2) Full 667 1000 1500 ns
Maximum Data Rate fMAX CD = 820pF (Figure 4) (Note 15) Full 115 666 - kbps
Driver Enable to Output High tZH RL = 500Ω, CL = 100pF, SW = GND (Figure 3),
(Note 8) Full - 278 1500 ns
Driver Enable to Output Low tZL RL = 500Ω, CL = 100pF, SW = VCC (Figure 3)
(Note 8) Full - 35 1500 ns
Driver Disable from Output Low tLZ RL = 500Ω, CL = 15pF, SW = VCC (Figure 3) Full - 67 100 ns
Driver Disable from Output High tHZ RL = 500Ω, CL = 15pF, SW = GND (Figure 3) Full - 38 100 ns
Time to Shutdown tSHDN (Note 10) Full 60 160 600 ns
Driver Enable from Shutdown to
Output High tZH(SHDN) RL = 500Ω, CL = 100pF, SW = GND (Figure 3)
(Notes 10, 11) Full - 400 2000 ns
Driver Enable from Shutdown to
Output Low tZL(SHDN) RL = 500Ω, CL = 100pF, SW = VCC (Figure 3)
(Notes 10, 11) Full - 155 2000 ns
DRIVER SWITCHING CHARACTERISTICS (500kbps Versions; ISL83083E, ISL83084E, ISL83085E)
Driver Differential Output Delay tPLH, tPHL RDIFF = 54Ω, CL = 100pF (Figure 2) Full 250 360 1000 ns
Driver Differential Output Skew tSKEW RDIFF = 54Ω, CL = 100pF (Figure 2) Full - 20 100 ns
Driver Differential Rise or Fall Time tR, tFRDIFF = 54Ω, CL = 100pF (Figure 2) Full 200 475 750 ns
Electrical Specifications Test Conditions: VCC = 4.5V to 5.5V; Unless Otherwise Specified. Typicals are at VCC = 5V, TA = +25°C
(Note 5). (Continued)
PARAMETER SYMBOL TEST CONDITIONS TEMP
(°C) MIN
(Note 4) TYP MAX
(Note 4) UNITS
ISL83080E, ISL83082E, ISL83083E, ISL83084E, ISL83085E, ISL83086E, ISL83088E
7FN6085.9
April 22, 2008
Maximum Data Rate fMAX CD = 820pF (Figure 4) (Note 15) Full 500 1000 - kbps
Driver Enable to Output High tZH RL = 500Ω, CL = 100pF, SW = GND (Figure 3),
(Notes 8, 13) Full - 137 1000 ns
Driver Enable to Output Low tZL RL = 500Ω, CL = 100pF, SW = VCC (Figure 3),
(Notes 8, 13) Full - 35 1000 ns
Driver Disable from Output Low tLZ RL = 500Ω, CL = 15pF, SW = VCC (Figure 3),
(Note 13) Full - 65 100 ns
Driver Disable from Output High tHZ RL = 500Ω, CL = 15pF, SW = GND (Figure 3),
(Note 13) Full - 38 100 ns
Time to Shutdown tSHDN (Note 10) Full 60 160 600 ns
Driver Enable from Shutdown to
Output High tZH(SHDN) RL = 500Ω, CL = 100pF , SW = GND (Figure 3),
(Notes 10, 11, 13) Full - 260 1500 ns
Driver Enable from Shutdown to
Output Low tZL(SHDN) RL = 500Ω, CL = 100pF, SW = VCC (Figure 3),
(Notes 10, 11, 13) Full - 155 1500 ns
DRIVER SWITCHING CHARAC TERISTICS (10Mbps Versions; ISL83086E, ISL83088E)
Driver Differential Output Delay tPLH, tPHL RDIFF = 54Ω, CL = 100pF (Figure 2) Full - 20 60 ns
Driver Differential Output Skew tSKEW RDIFF = 54Ω, CL = 100pF (Figure 2) Full - 1 10 ns
Driver Differential Rise or Fall Time tR, tFRDIFF = 54Ω, CL = 100pF (Figure 2) Full - 13 25 ns
Maximum Data Rate fMAX CD = 470pF (Figure 4) (Note 15) Full 10 15 - Mbps
Driver Enable to Output High tZH RL = 500Ω, CL = 100pF, SW = GND (Figure 3),
(Note 8) Full - 35 150 ns
Driver Enable to Output Low tZL RL = 500Ω, CL = 100pF, SW = VCC (Figure 3),
(Note 8) Full - 30 150 ns
Driver Disable from Output Low tLZ RL = 500Ω, CL = 15pF, SW = VCC (Figure 3) Full - 66 100 ns
Driver Disable from Output High tHZ RL = 500Ω, CL = 15pF, SW = GND (Figure 3) Full - 38 100 ns
Time to Shutdown tSHDN (Note 10) Full 60 160 600 ns
Driver Enable from Shutdown to
Output High tZH(SHDN) RL = 500Ω, CL = 100pF , SW = GND (Figure 3),
(Notes 10, 11) Full - 115 250 ns
Driver Enable from Shutdown to
Output Low tZL(SHDN) RL = 500Ω, CL = 100pF, SW = VCC (Figure 3),
(Notes 10, 11) Full - 84 250 ns
RECEIVER SWITCHING CHARACTERISTICS (115kbps and 500kbps Versions; ISL83080E THRU ISL83085E)
Maximum Data Rate fMAX (Figure 5) (Note 15) Full 0.5 10 - Mbps
Receiver Input to Output Delay tPLH, tPHL (Figure 5) Full - 100 150 ns
Receiver Skew | tPLH - tPHL |t
SKD (Figure 5) Full - 7 10 ns
Receiver Enable to Output Low tZL RL = 1kΩ, CL = 15pF, SW = VCC (Figure 6),
(Notes 9, 13) Full - 10 50 ns
Receiver Enable to Output High tZH RL = 1kΩ, CL = 15pF, SW = GND (Figure 6),
(Notes 9, 13) Full - 10 50 ns
Receiver Disable from Output Low tLZ RL = 1kΩ, CL = 15pF, SW = VCC (Figure 6) ,
(Note 13) Full - 10 50 ns
Receiver Disable from Output High tHZ RL = 1kΩ, CL = 15pF, SW = GND (Figure 6),
(Note 13) Full - 10 50 ns
Electrical Specifications Test Conditions: VCC = 4.5V to 5.5V; Unless Otherwise Specified. Typicals are at VCC = 5V, TA = +25°C
(Note 5). (Continued)
PARAMETER SYMBOL TEST CONDITIONS TEMP
(°C) MIN
(Note 4) TYP MAX
(Note 4) UNITS
ISL83080E, ISL83082E, ISL83083E, ISL83084E, ISL83085E, ISL83086E, ISL83088E
8FN6085.9
April 22, 2008
Time to Shutdown tSHDN (Notes 10, 13) Full 60 160 600 ns
Receiver Enable from Shutdown to
Output High tZH(SHDN) RL = 1kΩ, CL = 15pF, SW = GND (Figure 6),
(Notes 10, 12, 13) Full - 150 2000 ns
Receiver Enable from Shutdown to
Output Low tZL(SHDN) RL = 1kΩ, CL = 15pF, SW = VCC (Figure 6),
(Notes 10, 12, 13) Full - 150 2000 ns
RECEIVER SWITCHING CHARACTERISTICS (10Mbps Versions; ISL83086E, ISL83088E)
Maximum Data Rate fMAX (Figure 5) (Note 15) Full 10 15 - Mbps
Receiver Input to Output Delay tPLH, tPHL (Figure 5) Full - 70 125 ns
Receiver Skew | tPLH - tPHL |t
SKD (Figure 5) Full - 0 10 ns
Receiver Enable to Output Low tZL RL = 1kΩ, CL = 15pF, SW = VCC (Figure 6)
(Note 9) Full - 10 30 ns
Receiver Enable to Output High tZH RL = 1kΩ, CL = 15pF, SW = GND (Figure 6)
(Note 9) Full - 10 30 ns
Receiver Disable from Output Low tLZ RL = 1kΩ, CL = 15pF, SW = VCC (Figure 6) Full - 10 30 ns
Receiver Disable from Output High tHZ RL = 1kΩ, CL = 15pF, SW = GND (Figure 6) Full - 10 30 ns
Time to Shutdown tSHDN (Note 10) Full 60 160 600 ns
Receiver Enable from Shutdown to
Output High tZH(SHDN) RL = 1kΩ, CL = 15pF, SW = GND (Figure 6)
(Notes 10, 12) Full - 150 2000 ns
Receiver Enable from Shutdown to
Output Low tZL(SHDN) RL = 1kΩ, CL = 15pF, SW = VCC (Figure 6)
(Notes 10, 12) Full - 150 2000 ns
NOTES:
4. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. T emperature limits established by characterization
and are not production tested.
5. All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to device ground unless
otherwise specified.
6. Supply current specification is valid for loaded drivers when DE = 0V.
7. Applies to peak current. See “Typical Performance Curves” beginning on page 12 for more information.
8. Keep RE = 0 to prevent the device from entering SHDN.
9. The RE signal high time must be short enough (typically <100ns) to prevent the device from entering SHDN.
10. Transceivers are put into shutdown by bringing RE high and DE low . If the inputs are in this state for less than 60ns, the p arts are guaranteed
not to enter shutdown. If the inputs are in this state for at least 600ns, the parts are guaranteed to have entered shutdown. See “Low Power
Shutdown Mode” on page 12.
11. Keep RE = VCC, and set the DE signal low time >600ns to ensure that the device enters SHDN.
12. Set the RE signal high time >600ns to ensure that the device enters SHDN.
13. Does not apply to the ISL83084E.
14. Tested according to TIA/EIA-485-A, section 4.2.6 (±75V for 15µs at a 1% duty cycle).
15. Limits established by characterization and are not production tested.
Electrical Specifications Test Conditions: VCC = 4.5V to 5.5V; Unless Otherwise Specified. Typicals are at VCC = 5V, TA = +25°C
(Note 5). (Continued)
PARAMETER SYMBOL TEST CONDITIONS TEMP
(°C) MIN
(Note 4) TYP MAX
(Note 4) UNITS
ISL83080E, ISL83082E, ISL83083E, ISL83084E, ISL83085E, ISL83086E, ISL83088E
9FN6085.9
April 22, 2008
Test Circuits and Waveforms
FIGURE 1A. VOD AND VOC FIGURE 1B. VOD WITH COMMON MODE LOAD
FIGURE 1. DC DRIVER TEST CIRCUITS
FIGURE 2A. TEST CIRCUIT FIGURE 2B. MEASUREMENT POINTS
FIGURE 2. DRIVER PROPAGATION DELAY AND DIFFERENTIAL TRANSITION TIMES
FIGURE 3A. TEST CIRCUIT FIGURE 3B. MEASUREMENT POINTS
FIGURE 3. DRIVER ENABLE AND DISABLE TIMES (DOES NOT APPLY TO THE ISL83084E)
D
DE
DI
VCC
VOD
VOC
RL/2
RL/2
Z
YD
DE
DI
VCC
VOD
375Ω
375Ω
Z
Y
RL = 60ΩVCM
-7V TO +12V
D
DE
DI
VCC
SIGNAL
GENERATOR
CL = 100pF
RDIFF
Z
YCL = 100pF
OUT (Z)
3V
0V
1.5V1.5V
VOH
VOL
OUT (Y)
tPLH tPHL
DIFF OUT (Y - Z)
tR
+VOD
-VOD
90% 90%
tF
10% 10%
DI
SKEW = |tPLH - tPHL|
D
DE
DI Z
Y
VCC
GND
SW
PARAMETER OUTPUT RE DI SW CL (pF)
tHZ Y/Z X 1/0 GND 15
tLZ Y/Z X 0/1 VCC 15
tZH Y/Z 0 (Note 8) 1/0 GND 100
tZL Y/Z 0 (Note 8) 0/1 VCC 100
tZH(SHDN) Y/Z 1 (Note 11) 1/0 GND 100
tZL(SHDN) Y/Z 1 (Note 11) 0/1 VCC 100
SIGNAL
GENERATOR
500Ω
CL
OUT (Y, Z)
3V
0V
1.5V1.5V
VOH
0V
VOH - 0.5V
tHZ
OUT (Y, Z)
VCC
VOL
VOL + 0.5V
tLZ
DE
OUTPUT HIGH
OUTPUT LOW
tZL, tZL(SHDN)
tZH, tZH(SHDN)
NOTE 10
2.3V
2.3V
NOTES 8, 11
NOTES 8, 11
ISL83080E, ISL83082E, ISL83083E, ISL83084E, ISL83085E, ISL83086E, ISL83088E
10 FN6085.9
April 22, 2008
Application Information
RS-485 and RS-422 are differential (balanced) data
transmission standards for use in long haul or noisy
environments. RS-422 is a subset of RS-485, so RS-485
transceivers are also RS-422 compliant. RS-422 is a
point-to-multipoint (multidrop) standard, which allows only
one driver and up to 10 (assuming one unit load devi ces)
receivers on each bus. RS-485 is a true multipoint standard,
which allows up to 32 one unit load devices (an y
combination of drivers and receivers) on each bus. To allo w
for multipoint operation, the RS-485 specification requires
that drivers must handle bus contention without sustaining
any damage.
FIGURE 4A. TEST CIRCUIT FIGURE 4B. MEASUREMENT POINTS
FIGURE 4. DRIVER DATA RATE
FIGURE 5A. TEST CIRCUIT FIGURE 5B. MEASUREMENT POINTS
FIGURE 5. RECEIVER PROPAGATION DELAY AND DATA RATE
FIGURE 6A. TEST CIRCUIT FIGURE 6B. MEASUREMENT POINTS
FIGURE 6. RECEIVER ENABLE AND DISABLE TIMES (DOES NOT APPLY TO THE ISL83084E)
Test Circuits and Waveforms (Continued)
D
DE
DI
VCC
SIGNAL
GENERATOR
Z
Y
CDVOD
+
-
60Ω
3V
0V
DIFF OUT (Y - Z) +VOD
-VOD
DI
0V
SIGNAL
GENERATOR
RRO
RE
A
B
0V 15pF
RO
+1.5V
-1.5V
tPLH
0V0V
VCC
0V
1.5V 1.5V
tPHL
A
1kΩVCC
GND
SW
PARAMETER DE A SW
tHZ 0 +1.5V GND
tLZ 0 -1.5V VCC
tZH (Note 9) 0 +1.5V GND
tZL (Note 9) 0 -1.5V VCC
tZH(SHDN) (Note 12) 0 +1.5V GND
tZL(SHDN) (Note 12) 0 -1.5V VCC
SIGNAL
GENERATOR
RRO
RE
A
B
GND
15pF
RO
3V
0V
1.5V1.5V
VOH
0V
1.5V
VOH - 0.5V
tHZ
RO
VCC
VOL
1.5V
VOL + 0.5V
tLZ
RE
OUTPUT HIGH
OUTPUT LOW
tZL, tZL(SHDN)
tZH, tZH(SHDN)
NOTE 10
NOTES 9, 12
NOTES 9, 12
ISL83080E, ISL83082E, ISL83083E, ISL83084E, ISL83085E, ISL83086E, ISL83088E
11 FN6085.9
April 22, 2008
Another important advantage of RS-485 is the extended
common mode range (CMR), which specifies that the driver
outputs and receiver inputs withstand signals that range from
+12V to -7V. RS-422 and RS-485 are intended for runs as
long as 4000’, so the wide CMR is necessary to handle
ground potential differences, as well as voltages induced in
the cable by external fields.
Receiver Featu r es
These devices utilize a dif ferential input receiver for maximum
noise immunity and co mmon mode rejection. In put se nsitivi ty
is ±200mV, as required by the RS-422 and RS-485
specifications.
Receiver input resistance of 96kΩ surpasses the RS-422
specification of 4kΩ, and is eight times the RS-485 “Unit
Load (UL)” requirement of 12kΩ minimum. Thus, these
products are known as “one-eighth UL” transceivers, and
there can be up to 256 of these devices on a network while
still complying with the RS-485 loading specification.
Receiver inputs function with common mode voltages as
great as ±7V outside the power supplies (i.e., +12V and
-7V), making them ideal for long networks where induced
voltages are a realistic concern.
All the receivers include a “full fail-safe” function that
guarantees a high level receiver output if the receiver inputs
are unconnected (floating) or shorted.
Receivers easily meet the data rates supported by the
corresponding driver, and all receiver outputs are
three-statable via the active low RE input (except for the
ISL83084E).
Driver Features
The RS-485/RS-422 driver is a differential output device that
delivers at least 1.5V across a 54Ω load (RS-485), and at
least 2V across a 100Ω load (RS-422). The drivers feature
low propagation delay skew to maximize bit width, and to
minimize EMI.
All drivers are three-statable via the active high DE input
(except for the ISL83084E).
The 115kbps and 500kbps driver outputs are slew rate
limited to minimize EMI, and to minimize reflections in
unterminated or improperly terminated networks. Outputs of
the ISL83086E, ISL83088E drive rs are not limited, so faster
output transition times allow data rates of at least 10Mbps.
Hot Plug Function
When a piece of equipment powers up, there is a period of
time where the processor or ASIC driving the RS-485 control
lines (DE, RE) is unable to ensure tha t the RS-485 Tx and
Rx outputs are kept disabled. If the equipment is connected
to the bus, a driver activating prematurely during power-up
may crash the bus. To avoid this scenario, the ISL83080,
ISL83082, ISL83083, ISL830 85 versions incorporate a “Hot
Plug” function. Circuitry monitoring VCC ensures that, during
power-up and power-down, the Tx and Rx outputs remain
disabled, regardless of the state of DE and RE, if VCC is less
than ~3.4V. This gives the processor/ASIC a chance to stabilize
and drive the RS-485 control lines to the proper states.
ESD Protection
All pins on these devices include class 3 Human Body
Model (HBM) ESD protection structures, but the RS-485
pins (driver outputs and receiver inputs) incorporate
advanced structures allowing them to survive ESD events
in excess of ±15kV HBM. The RS-485 pins are particularly
vulnerable to ESD damage because they typically connect
to an exposed port on the exterior of the finished product.
Simply touching the port pins, or connecting a cable, can
cause an ESD event that might destroy unprotected ICs.
These new ESD structures protect the device whether or
not it is powered up, protect without allowing any latchup
mechanism to activate, and without degrading the RS-485
common mode range of -7V to +12V. This built-in ESD
protection eliminates the need for board level protection
structures (e.g., transient suppression diodes), and the
associated, undesirable capacitive load they present.
Data Rate, Cables, and Terminations
RS-485/RS-422 are inten ded for network lengths up to
4000’, but the maximum system data rate decreases as the
transmission length increases. Devices operating at 10Mbps
are limited to lengths less than 100 ’, while the 115kbps
versions can operate at full data rates with lengths of several
1000’.
Twisted pair is the cable of choice for RS-485/RS-422
networks. Twisted pair cables tend to pick up noise and
other electromagnetically induced voltages as common
mode signals, which are effectively rejected by the
dif fe ren tial receivers in these ICs.
Proper termination is imperative (when using the 10Mbps
devices) to minimize reflections. Short networks using the
FIGURE 7. HOT PLUG PERFORMANCE (ISL83080E) vs
DEVICE WITHOUT HOT PLUG CIRCUITRY
(ISL83086E)
TIME (40µs/DIV)
VCC
RECEIVER OUTPUT (V)
DRIVER Y OUTPUT (V)
2.5
5.0
2.5
5.0
VCC (V)
RL = 1kΩ
RO
0
2.5
5.0
0
0
A/Y
RL = 1kΩ
ISL83080E
ISL83080E
3.2V
3.4V
DI = VCC
ISL83080E, ISL83082E, ISL83083E, ISL83084E, ISL83085E, ISL83086E, ISL83088E
12 FN6085.9
April 22, 2008
115kbps versions need not be terminated, but, terminations
are recommended unless power dissipation is an overriding
concern.
In point-to-point, or point-to-multipoint (single driver on bus)
networks, the main cable should be terminated in its
characteristic impedance (typically 120Ω) at the end farthest
from the driver. In multi-receiver appl ications, stubs
connecting receivers to the main cable should be kept as
short as possible. Multipoint (multi-driver) systems requi re
that the main cable be terminated in its characteristic
impedance at both ends. Stubs connecting a transceiver to
the main cable should be kept as short as possible.
Built-In Driver Overload Protection
As stated previously, the RS-485 sp ecification requires that
drivers survive worst case bus contentions undamaged.
These devices meet this requirement via driver output short
circuit current limits, and on-chip thermal shutdown circuitry.
The driver output stages incorporate short circuit current
limiting circuitry which ensures that the output curren t ne ve r
exceeds the RS-485 specification, even at the common
mode voltage range extremes. Additionally, these devices
utilize a foldback circuit which reduces the short circuit
current, and thus the power dissipation, whenever the
contending voltage exceeds either supply.
In the event of a major short circuit condition, devices also
include a thermal shut down fe ature that disable s the drivers
whenever the die temperature becomes excessive. This
eliminates the power dissip a tion, a llowing the die to cool. The
drivers automatically re-enable af ter the die temperature
drops about +15°C. If the contention persists, the thermal
shutdown/re-e nable cycle repeat s until the faul t is cleared.
Receivers stay operatio nal during th ermal shutdown.
Low Power Shutdown Mode
These CMOS transceivers all use a fraction of the power
required by their bipolar counterparts, but they also include a
shutdown feature (except for the ISL83084E) that reduces
the already low quiescent ICC to a 70nA trickle. These
devices enter shutdown whenever the receiver and driver
are simultaneously disabled (RE =V
CC and DE = GND) for
a period of at least 600ns. Disabling bo th the driver and the
receiver for less than 60ns guarantees that the transceiver
will not enter shutdown.
Note that receiver and driver enable times increase when
the transceiver enables from shutdown. Refer to Notes 8
thru 12, at the end of the “Electrical Specification Table” on
page 8, for more information.
Typical Performance Curves VCC = 5V, TA = +25°C; Unless Otherwise Specified
FIGURE 8. DRIVER OUTPUT CURRENT vs DIFFERENTIAL
OUTPUT VOLTAGE FIGURE 9. DRIVER DIFFERENTIAL OUTPUT VOL TAGE vs
TEMPERATURE
DIFFERENTIAL OUTPUT VOLTAGE (V)
DRIVER OUTPUT CURRENT (mA)
012345
0
10
20
30
40
50
60
70
80
90
-40 0 50 85
TEMPERATURE (°C)
DIFFERENTIAL OUTPUT VOLTAGE (V)
-25 25 75
2.0
2.2
2.4
2.6
2.8
3.0
3.2
3.4
RDIFF = 54Ω
RDIFF = 100Ω
ISL83080E, ISL83082E, ISL83083E, ISL83084E, ISL83085E, ISL83086E, ISL83088E
13 FN6085.9
April 22, 2008
FIGURE 10. DRIVER OUTPUT CURRENT vs SHORT CIRCUIT
VOLTAGE FIGURE 11. SUPPLY CURRENT vs TEMPERATURE
FIGURE 12. DRIVER DIFFERENTIAL PROPAGATION DELAY
vs TEMPERATURE (ISL83080E, ISL83082E) FIGURE 13. DRIVER DIFFERENTIAL SKEW vs
TEMPERATURE (ISL83080E, ISL83082E)
FIGURE 14. DRIVER DIFFERENTIAL PROPAGATION DELAY
vs TEMPERATURE (ISL83083E, ISL83084E,
ISL83085E)
FIGURE 15. DRIVER DIFFERENTIAL SKEW vs
TEMPERATURE (ISL83083E, ISL83084E,
ISL83085E)
Typical Performance Curves VCC = 5V, TA = +25°C; Unless Otherwise Specified (Continued)
OUTPUT VOLTAGE (V)
-7 -6 -4 -2 0 2 4 6 8 10 12
OUTPUT CURRENT (mA)
-50
0
50
100
150
200
-100
-150
Y OR Z = HIGH
Y OR Z = LOW
ISL8308xE
ISL83080E thru ISL83085E
ISL83086E/ISL83088E
-40 0 50 85
TEMPERATURE (°C)
ICC (µA)
-25 25 75
500
510
520
530
540
550
560
HALF DUPLEX, DE = VCC, RE = X
HALF DUPLEX, DE = GND, RE = GND
FULL DUPLEX, DE = X, RE = GND
-40 0 50 85
TEMPERATURE (°C)
-25 25 75
PROPAGATION DELAY (ns)
740
760
780
800
820
840
860
880
tPLH
tPHL
30
35
40
45
50
55
60
-40 0 50 85
TEMPERATURE (°C)
SKEW (ns)
-25 25 75
|CROSS PT. OF Y↑ AND Z↓ - CROSS PT. OF Y↓ AND Z↑|
-40 0 50 85
TEMPERATURE (°C)
-25 25 75
PROPAGATION DELAY (ns)
340
350
360
370
380
390
400
tPLH
tPHL
-40 0 50 85
TEMPERATURE (°C)
SKEW (ns)
-25 25 75
17
18
19
20
21
22
23
24
25
26
27
|CROSS PT. OF Y↑ AND Z↓ - CROSS PT. OF Y↓ AND Z↑|
ISL83080E, ISL83082E, ISL83083E, ISL83084E, ISL83085E, ISL83086E, ISL83088E
14 FN6085.9
April 22, 2008
FIGURE 16. DRIVER DIFFERENTIAL PROPAGATION DELAY
vs TEMPERATURE (ISL83086E, ISL83088E) FIGURE 17. DRIVER DIFFERENTIAL SKEW vs
TEMPERATURE (ISL83086E, ISL83088E)
FIGURE 18. DRIVER AND RECEIVER WAVEFORMS,
LOW TO HIGH (ISL83080E, ISL83082E) FIGURE 19. DRIVER AND RECEIVER WAVEFORMS,
HIGH TO LOW (ISL83080E, ISL83082E)
FIGURE 20. DRIVER AND RECEIVER WAVEFORMS,
LOW TO HIGH (ISL83083E, ISL83084E,
ISL83085E)
FIGURE 21. DRIVER AND RECEIVER WAVEFORMS,
HIGH TO LOW (ISL83083E, ISL83084E,
ISL83085E)
Typical Performance Curves VCC = 5V, TA = +25°C; Unless Otherwise Specified (Continued)
-40 0 50 85
TEMPERATURE (°C)
-25 25 75
PROPAGATION DELAY (ns)
tPLH
tPHL
15
16
17
18
19
20
-40 0 50 85
TEMPERATURE (°C)
SKEW (ns)
-25 25 75
|CROSS PT. OF Y↑ AND Z↓ - CROSS PT. OF Y↓ AND Z↑|
0.50
0.55
0.60
0.65
0.70
0
3
4
1
2
TIME (400ns/DIV)
RECEIVER OUTPUT (V)
RDIFF = 54Ω, CL = 100pF
0
5
DRIVER OUTPUT (V)
0
5
DRIVER INPUT (V)
DI
RO
A/Y
B/Z
0
3
4
1
2
TIME (400ns/DIV)
DI
RECEIVER OUTPUT (V)
DRIVER OUTPUT (V)
0
5
0
5
DRIVER INPUT (V)
RDIFF = 54Ω, CL = 100pF
B/Z
A/Y
RO
0
3
4
1
2
TIME (200ns/DIV)
RECEIVER OUTPUT (V)
RDIFF = 54Ω, CL = 100pF
0
5
DRIVER OUTPUT (V)
0
5
DRIVER INPUT (V)
DI
RO
A/Y
B/Z
0
3
4
1
2
TIME (200ns/DIV)
DI
RECEIVER OUTPUT (V)
DRIVER OUTPU T (V )
0
5
0
5
DRIVER INPUT (V)
RDIFF = 54Ω, CL = 100pF
B/Z
A/Y
RO
ISL83080E, ISL83082E, ISL83083E, ISL83084E, ISL83085E, ISL83086E, ISL83088E
15 FN6085.9
April 22, 2008
FIGURE 22. DRIVER AND RECEIVER WAVEFORMS,
LOW TO HIGH (ISL83086E, ISL83088E) FIGURE 23. DRIVER AND RECEIVER WAVEFORMS,
HIGH TO LOW (ISL83086E, ISL83088E)
FIGURE 24. RECEIVER OUTPUT CURRENT vs RECEIVER
OUTPUT VOLTAGE
Die Characteristics
SUBSTRATE POTENTIAL (POWERED UP):
GND
TRANSISTOR COUNT:
525
PROCESS:
Si Gate BiCMOS
Typical Performance Curves VCC = 5V, TA = +25°C; Unless Otherwise Specified (Continued)
0
3
4
1
2
TIME (20ns/DIV)
RECEIVER OUTPUT (V)
RDIFF = 54Ω, CL = 100pF
0
5
DRIVER OUTPUT (V)
0
5
DRIVER INPUT (V )
DI
RO
A/Y
B/Z
0
3
4
1
2
TIME (20ns/DIV)
DI
RECEIVER OUTPUT (V)
DRIVER OUTPUT (V)
0
5
0
5
DRIVER INPUT (V)
RDIFF = 54Ω, CL = 100pF
B/Z
A/Y
RO
RECEIVER OUTPUT VOLTAGE (V)
RECEIVER OUTPUT CURRENT (mA)
012345
0
5
10
15
20
25
30
35
40
VOH, +25°C
VOH, +85°C
VOL, +25°C
VOL, +85°C
ISL83080E, ISL83082E, ISL83083E, ISL83084E, ISL83085E, ISL83086E, ISL83088E
16 FN6085.9
April 22, 2008
ISL83080E, ISL83082E, ISL83083E, ISL83084E, ISL83085E, ISL83086E, ISL83088E
Mini Small Outline Plastic Packages (MSOP)
NOTES:
1. These p ackage dimensions are within allowable dimensions of
JEDEC MO-187BA.
2. Dimensioning and tolerancing per ANSI Y14.5M-1994.
3. Dimension “D” does not include mold flash, protrusions or gate
burrs and are measured at Da tum Plane. Mold flash, p rotrusion
and gate burrs shall not exceed 0.15mm (0.006 inch) per side.
4. Dimension “E1” does not include interlead flash or protrusions
and are measured at Datum Plane. Interlead flash and
protrusions shall not exceed 0.15mm (0.006 inch) per side.
5. Formed leads shall be planar with respect to one another within
0.10mm (0.004) at seating Plane.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. Dimension “b” does not include dambar protrusion. Allowable
dambar protrusion shall be 0.08mm (0.003 inch) total in excess
of “b” dimension at maximum material condition. Minimum space
between protrusion and adjacent lead is 0.07mm (0.0027 inch).
10. Datums and to be determined at Datum plane
.
11. Controlling dimension: MILLIMETER. Converted inch dimen-
sions are for reference only.
L
0.25
(0.010)
L1
R1
R
4X θ
4X θ
GAUGE
PLANE
SEATING
PLANE
EE1
N
12
TOP VIEW
INDEX
AREA
-C-
-B-
0.20 (0.008) ABC
SEATING
PLANE
0.20 (0.008) C
0.10 (0.004) C
-A-
-H-
SIDE VIEW
b
eD
A
A1
A2
-B-
END VIEW
0.20 (0.008) CD
E1
C
L
C
a
- H -
-A - - B -
- H -
M8.118 (JEDEC MO-187AA)
8 LEAD MINI SMALL OUTLINE PLASTIC PACKAGE
SYMBOL
INCHES MILLIMETERS
NOTESMIN MAX MIN MAX
A0.037 0.043 0.94 1.10 -
A1 0.002 0.006 0.05 0.15 -
A2 0.030 0.037 0.75 0.95 -
b0.010 0.014 0.25 0.36 9
c0.004 0.008 0.09 0.20 -
D0.116 0.120 2.95 3.05 3
E1 0.116 0.120 2.95 3.05 4
e 0.026 BSC 0.65 BSC -
E0.187 0.199 4.75 5.05 -
L0.016 0.028 0.40 0.70 6
L1 0.037 REF 0.95 REF -
N8 87
R0.003 - 0.07 - -
R1 0.003 - 0.07 - -
05o15o5o15o-
α0o6o0o6o-
Rev. 2 01/03
17 FN6085.9
April 22, 2008
Mini Small Outline Plastic Packages (MSOP)
NOTES:
1. These p ackage dimensions are within allowable dimensions of
JEDEC MO-187BA.
2. Dimensioning and tolerancing per ANSI Y14.5M-1994.
3. Dimension “D” does not include mold flash, protrusions or gate
burrs and are measured at Da tum Plane. Mold flash, p rotrusion
and gate burrs shall not exceed 0.15mm (0.006 inch) per side.
4. Dimension “E1” does not include interlead flash or protrusions
and are measured at Datum Plane. Interlead flash and
protrusions shall not exceed 0.15mm (0.006 inch) per side.
5. Formed leads shall be planar with respect to one another within
0.10mm (.004) at seating Plane.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. Dimension “b” does not include dambar protrusion. Allowable
dambar protrusion shall be 0.08mm (0.003 inch) total in excess
of “b” dimension at maximum material condition. Minimum space
between protrusion and adjacent lead is 0.07mm (0.0027 inch).
10. Datums and to be determined at Datum plane
.
11. Controlling dimension: MILLIMETER. Converted inch dimen-
sions are for reference only
L
0.25
(0.010)
L1
R1
R
4X θ
4X θ
GAUGE
PLANE
SEATING
PLANE
EE1
N
12
TOP VI EW
INDEX
AREA
-C-
-B-
0.20 (0.008) ABC
SEATING
PLANE
0.20 (0.008) C
0.10 (0.004) C
-A-
-H-
SIDE VIEW
b
eD
A
A1
A2
-B-
END VIEW
0.20 (0.008) CD
E1
C
L
C
a
- H -
-A - - B -
- H -
M10.118 (JEDEC MO-187BA)
10 LEAD MINI SMALL OUTLINE PLASTIC PACKAGE
SYMBOL
INCHES MILLIMETERS
NOTESMIN MAX MIN MAX
A0.037 0.043 0.94 1.10 -
A1 0.002 0.006 0.05 0.15 -
A2 0.030 0.037 0.75 0.95 -
b0.007 0.011 0.18 0.27 9
c0.004 0.008 0.09 0.20 -
D0.116 0.120 2.95 3.05 3
E1 0.116 0.120 2.95 3.05 4
e 0.020 BSC 0.50 BSC -
E0.187 0.199 4.75 5.05 -
L0.016 0.028 0.40 0.70 6
L1 0.037 REF 0.95 REF -
N10 107
R0.003 - 0.07 - -
R1 0.003 - 0.07 - -
5o15o5o15o-
α0o6o0o6o-
Rev. 0 12/02
θ
ISL83080E, ISL83082E, ISL83083E, ISL83084E, ISL83085E, ISL83086E, ISL83088E
18 FN6085.9
April 22, 2008
Small Outline Plastic Packages (SOIC)
NOTES:
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006
inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. Interlead
flash and protrusions shall not exceed 0.25mm (0.010 inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater
above the seating plane, shall not exceed a maximum value of
0.61mm (0.024 inch).
10. Controlling dimension: MILLIMETER. Converted inch dimensions
are not necessarily exact.
INDEX
AREA E
D
N
123
-B-
0.25(0.010) C AMBS
e
-A-
L
B
M
-C-
A1
A
SEATING PLANE
0.10(0.004)
h x 45o
C
H
µ
0.25(0.010) BM M
α
M14.15 (JEDEC MS-012-AB ISSUE C)
14 LEAD NARROW BODY SMALL OUTLINE PLASTIC
PACKAGE
SYMBOL
INCHES MILLIMETERS
NOTESMIN MAX MIN MAX
A0.0532 0.0688 1.35 1.75 -
A1 0.0040 0.0098 0.10 0.25 -
B0.013 0.020 0.33 0.51 9
C0.0075 0.0098 0.19 0.25 -
D0.3367 0.3444 8.55 8.75 3
E0.1497 0.1574 3.80 4.00 4
e 0.050 BSC 1.27 BSC -
H0.2284 0.2440 5.80 6.20 -
h0.0099 0.0196 0.25 0.50 5
L0.016 0.050 0.40 1.27 6
N14 147
α0o8o0o8o-
Rev. 0 12/93
ISL83080E, ISL83082E, ISL83083E, ISL83084E, ISL83085E, ISL83086E, ISL83088E
19
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No lice nse is gran t ed by i mpli catio n or other wise u nder an y p a tent or patent right s of I nter sil or it s sub sidi aries.
For information regarding Intersil Corporation and its products, see www.intersil.com
FN6085.9
April 22, 2008
ISL83080E, ISL83082E, ISL83083E, ISL83084E, ISL83085E, ISL83086E, ISL83088E
Small Outline Plastic Packages (SOIC)
INDEX
AREA E
D
N
123
-B-
0.25(0.010) C AMBS
e
-A-
L
B
M
-C-
A1
A
SEATING PLANE
0.10(0.004)
h x 45°
C
H0.25(0.010) BM M
α
NOTES:
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006
inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. Inter-
lead flash and protrusions shall not exceed 0.25mm (0.010 inch) per
side.
5. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater
above the seating plane, shall not exceed a maximum value of
0.61mm (0.024 inch).
10. Controlling dimension: MILLIMETER. Converted inch dimensions
are not necessarily exact.
M8.15 (JEDEC MS-012-AA ISSUE C)
8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE
SYMBOL
INCHES MILLIMETERS
NOTESMIN MAX MIN MAX
A 0.0532 0.0688 1.35 1.75 -
A1 0.0040 0.0098 0.10 0.25 -
B 0.013 0.020 0.33 0.51 9
C 0.0075 0.0098 0.19 0.25 -
D 0.1890 0.1968 4.80 5.00 3
E 0.1497 0.1574 3.80 4.00 4
e 0.050 BSC 1.27 BSC -
H 0.2284 0.2440 5.80 6.20 -
h 0.0099 0.0196 0.25 0.50 5
L 0.016 0.050 0.40 1.27 6
N8 87
α0° 8° 0° 8° -
Rev. 1 6/05
