General Description
The MAX4747–MAX4750 low-voltage, quad single-pole
single-throw (SPST)/dual single-pole/double-throw
(SPDT) analog switches operate from a single +2V to
+11V supply and handle rail-to-rail analog signals.
These switches exhibit low leakage current (0.1nA) and
consume less than 0.5nW (typ) of quiescent power,
making them ideal for battery-powered applications.
When powered from a +3V supply, these switches fea-
ture 50Ω(max) on-resistance (RON), with 3.5Ω(max)
matching between channels and 9Ω(max) flatness
over the specified signal range.
The MAX4747 has four normally open (NO) switches, the
MAX4748 has four normally closed (NC) switches, and
the MAX4749 has two NO and two NC switches. The
MAX4750 has two SPDT switches. These switches are
available in 14-pin TSSOP, 16-pin TQFN (4mm x 4mm),
and 16-bump WLP packages. This tiny chip-scale pack-
age occupies a 2mm 2mm area and significantly
reduces the required PC board area.
Applications
Battery-Powered Systems
Audio/Video-Signal Routing
Low-Voltage Data-Acquisition Systems
Cell Phones
Communications Circuits
Glucose Meters
PDAs
Features
o2mm 2mm WLP
oGuaranteed On-Resistance (RON)
25Ω (max) at +5V
50Ω (max) at +3V
oOn-Resistance Matching
3Ω (max) at +5V
3.5Ω (max) at +3V
oGuaranteed < 0.1nA Leakage Current at
TA= +25°C
oSingle-Supply Operation from +2.0V to +11V
oTTL/CMOS-Logic Compatible
o-84dB Crosstalk (1MHz)
o-72dB Off-Isolation (1MHz)
oLow Power Consumption: 0.5nW (typ)
oRail-to-Rail Signal Handling
MAX4747–MAX4750
50
Ω
, Low-Voltage, Quad SPST/Dual SPDT Analog
Switches in WLP
________________________________________________________________
Maxim Integrated Products
1
Ordering Information
19-2646; Rev 3; 1/12
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
PART TEMP
RANGE
PIN-/BUMP-
PACKAGE
MAX4747EUD+ -40°C to +85°C 14 TSSOP
MAX4747ETE+ -40°C to +85°C 16 Thin QFN-EP*
MAX4747EWE+T -40°C to +85°C 16 WLP
TOP VIEW TOP VIEW
INPUT SWITCH STATE
LOW
HIGH
OFF
ON
14
13
12
11
10
9
8
1
2
3
4
5
6
7
MAX4747
MAX4747
TSSOP
V+
IN1
IN4
NO4
COM4
COM3
NO3
COM2
NO2
COM1
NO1
GND
IN3
IN2
(BUMPS SIDE DOWN)
WLP
1
A
B
C
D
234
NO2 COM2 IN2
COM1
NO1 V+ IN3
IN1 GND NO3
IN4 NO4 COM4 COM3
16
+
+15 14 13
NO1
V+
N.C.
IN1
9
10
11
12
COM3
COM4
NO4
IN4
4
3
2
1
IN2
COM2
NO2
COM1
*CONNECT EP TO V+
5678
IN3
GND
NO3
N.C.
MAX4747ETE
TQFN
*EP
Pin/Bump Configurations/Truth Tables
Pin Configurations/Truth Tables continued at end of data sheet.
Ordering Information continued at end of data sheet.
*
EP = Exposed pad.
+
Denotes a lead(Pb)-free/RoHS-compliant package.
T = Tape and reel.
MAX4747–MAX4750
50
Ω
, Low-Voltage, Quad SPST/Dual SPDT Analog
Switches in WLP
2 _______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS—Single +3V Supply
(V+ = +3V ±10%, VIH = +2.0V, VIL = +0.8V, TA= TMIN to TMAX, unless otherwise noted. Typical values are at V+ = +3V, TA= +25°C.)
(Notes 3, 4)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
(All voltages referenced to GND.)
V+ ...........................................................................-0.3V to +12V
IN_, COM_, NO_, NC_ (Note 1)....................-0.3V to (V+ + 0.3V)
Continuous Current (any pin) ...........................................±10mA
Peak Current (any pin, pulsed at 1ms, 10% duty cycle) ...±20mA
Continuous Power Dissipation (TA= +70°C)
14-Pin TSSOP (derate 9.1mW/°C above +70°C) .........727mW
16-Pin Thin QFN (derate 16.9mW/°C above +70°C) .....1349mW
16-Bump WLP (derate 7.3mW/°C above +70°C).........589mW
Operating Temperature Range ...........................-40°C to +85°C
Storage Temperature Range .............................-65°C to +150°C
Maximum Junction Temperature .....................................+150°C
Bump Temperature (soldering)
Infrared (15s) ...............................................................+220°C
Vapor Phase (60s) .......................................................+215°C
Lead Temperature (soldering, 10s) .................................+300°C
Soldering Temperature (reflow) .......................................+260°C
Note 1: Signals on IN_, NO_, NC_, or COM_ exceeding V+ or GND are clamped by internal diodes. Limit forward-diode current to
maximum current rating.
PARAMETER SYMBOL CONDITIONS TAMIN TYP MAX UNITS
ANALOG SWITCH
Analog Signal Range VCOM_,
VNO_, VNC_ 0V+V
+25°C 17 50
On-Resistance RON V+ = +2.7V, ICOM_ = 5mA,
VNO_ or VNC_ = +1.5V TMIN to
TMAX 60
Ω
+25°C 0.2 3.5
On-Resistance Matching
Between Channels
(Notes 5, 6)
∆RON V+ = +2.7V, ICOM_ = 5mA,
VNO_ or VNC_ = +1.5V TMIN to
TMAX 4.5
Ω
+25°C 2.7 9
On-Resistance Flatness
(Note 7) RFLAT
(
ON
)
V+ = +2.7V, ICOM_ = 5mA,
VNO_ or VNC_ = +1V, +1.5V, +2V TMIN to
TMAX 11
Ω
+25°C -0.1 +0.1
NO_ or NC_ Off-Leakage Current
(Note 8)
INO_
(
OFF
),
INC_
(
OFF
)
V+ = +3.6V,
VCOM_ = +0.3V, +3V,
VNO_ or VNC_ = +3V, +0.3V
TMIN to
TMAX -2 +2 nA
+25°C -0.1 +0.1
COM_ Off-Leakage Current
(Note 8) ICOM_
(
OFF
)
V+ = +3.6V,
VCOM_ = +0.3V, +3V,
VNO_ or VNC_ = +3V, +0.3V
TMIN to
TMAX -2 +2 nA
+25°C -0.2 +0.2
COM_ On-Leakage Current
(Note 8) ICOM_
(
ON
)
V+ = +3.6V,
VCOM_ = +0.3V, +3.0V,
VNO_ or VNC_ = +0.3V, +3V, or
unconnected
TMIN to
TMAX -4 +4
nA
MAX4747–MAX4750
50
Ω
, Low-Voltage, Quad SPST/Dual SPDT Analog
Switches in WLP
_______________________________________________________________________________________ 3
ELECTRICAL CHARACTERISTICS—Single +3V Supply (continued)
(V+ = +3V ±10%, VIH = +2.0V, VIL = +0.8V, TA= TMIN to TMAX, unless otherwise noted. Typical values are at V+ = +3V, TA= +25°C.)
(Notes 3, 4)
PARAMETER SYMBOL CONDITIONS TAMIN TYP MAX UNITS
DYNAMIC
+25°C 57 150
Turn-On Time tON VNO_ or VNC_ = +1.5V,
RL = 300Ω, CL = 35pF, Figure 2 TMIN to
TMAX 170 ns
+25°C 24 60
Turn-Off Time tOFF VNO_ or VNC_ = +1.5V,
RL = 300Ω, CL = 35pF, Figure 2 TMIN to
TMAX 70 ns
+25°C 33
Break-Before-Make
(MAX4749/MAX4750 Only)
(Note 8)
tBBM VNO_ or VNC_ = +1.5V,
RL = 300Ω, CL = 35pF, Figure 3 TMIN to
TMAX 1ns
Charge Injection Q V
GE N
= 0V , RGE N = 0Ω, C
L = 1.0nF,
Figure 4 +25°C 7 pC
On-Channel -3dB Bandwidth BW Signal = 0dBm, 50Ω in and out +25°C 250 MHz
Off-Isolation (Note 9) VISO f = 1MHz, VNO_ = 1VRMS,
RL = 50Ω, CL = 5pF, Figure 5 +25°C -72 dB
Crosstalk (Note 10) VCT f = 1MHz, VNO_ = 1VRMS,
RL = 50Ω, CL = 5pF, Figure 6 +25°C 84 dB
NO_ or NC_ Off-Capacitance COFF f = 1MHz, Figure 7 +25°C 20 pF
COM_ Off-Capacitance CCOM_
(
OFF
)
f = 1MHz, Figure 7 +25°C 20 pF
COM_ On-Capacitance CCOM_
(
ON
)
f = 1MHz, Figure 7 +25°C 40 pF
LOGIC INPUT
Input Logic High VIH 1.4 V
Input Logic Low VIL 0.8 V
Input Leakage Current IIN VIN_ = 0V or V+ -1 +0.005 +1 µA
POWER SUPPLY
Power-Supply Range V+ 2 11 V
Positive Supply Current I+ V+ = +5.5V, VIN_ = 0V or V+,
all switches on or off 0.0001 1 µA
MAX4747–MAX4750
50
Ω
, Low-Voltage, Quad SPST/Dual SPDT Analog
Switches in WLP
4 _______________________________________________________________________________________
ELECTRICAL CHARACTERISTICS—Single +5V Supply
(V+ = +5V ±10%, VIH = +2.0V, VIL = +0.8V, TA= TMIN to TMAX, unless otherwise noted. Typical values are at V+ = +5V, TA= +25°C.)
(Notes 3, 4)
PARAMETER SYMBOL CONDITIONS TAMIN TYP MAX UNITS
ANALOG SWITCH
Analog Signal Range VCOM_,
VNO_, VNC_ 0V+V
+25°C 8.2 25
On-Resistance RON
V+ = +4.5V,
ICOM_ = 5mA,
VNO_ or VNC_ = +3.0V
TMIN to
TMAX 30
Ω
+25°C 0.1 3
On-Resistance Matching
Between Channels
(Notes 5, 6)
∆RON V+ = +4.5V, ICOM_ = 5mA,
VNO_ or VNC_ = +3.0V TMIN to
TMAX 4
Ω
+25°C 2.2 5
On-Resistance Flatness
(Notes 7) RFLAT
(
ON
)
V+ = +4.5V, ICOM_ = 5mA,
VNO_ or VNC_ = +1V, +2V, +3V TMIN to
TMAX 7
Ω
+25°C -0.1 +0.1
NO_ or NC_ Off-Leakage Current
(Note 8)
INO_
(
OFF
),
INC_
(
OFF
)
V+ = +5.5V,
VCOM_ = +1V, +4.5V,
VNO_ or VNC_ = +4.5V, +1V
TMIN to
TMAX -2 +2 nA
+25°C -0.1 +0.1
COM_ Off-Leakage Current
(Note 8) ICOM_
(
OFF
)
V+ = +5.5V,
VCOM_ = +1V, +4.5V,
VNO_ or VNC_ = +4.5V, +1V
TMIN to
TMAX -2 +2 nA
+25°C -0.2 +0.2
COM_ On-Leakage Current
(Note 8) ICOM_
(
ON
)
V+ = +5.5V,
VCOM_ = +1V, +4.5V,
VNO_ or VNC_ = +1V, +4.5V, or
unconnected
TMIN to
TMAX -4 +4
nA
DYNAMIC
+25°C 36 85
Turn-On Time tON
VNO_ or VNC_ = +3.0V,
RL = 300Ω, CL = 35pF,
Figure 2
TMIN to
TMAX 95 ns
+25°C 19 45
Turn-Off Time tOFF
VNO_ or VNC_ = +3.0V,
RL = 300Ω, CL = 35pF,
Figure 2
TMIN to
TMAX 55 ns
+25°C 14
Break-Before-Make
(MAX4749/MAX4750 Only)
(Note 8)
tBBM
VNO_ or VNC_ = +3.0V,
RL = 300Ω, CL = 35pF,
Figure 3
TMIN to
TMAX 1ns
Charge Injection Q VGEN = 0V, RGEN = 0Ω,
CL = 1.0nF, Figure 4 +25°C 9 pC
On-Channel -3dB Bandwidth BW Signal = 0dBm,
50Ω in and out +25°C 250 MHz
Off-Isolation (Note 9) VISO f = 1MHz, VNO_= 1VRMS,
RL = 50Ω, CL = 5pF, Figure 5 +25°C -72 dB
MAX4747–MAX4750
50
Ω
, Low-Voltage, Quad SPST/Dual SPDT Analog
Switches in WLP
_______________________________________________________________________________________ 5
Note 3: The algebraic convention, where the most negative value is a minimum and the most positive value a maximum, is used
in this data sheet.
Note 4: WLP parts are 100% tested at +25°C only, and are guaranteed by design over temperature. TSSOP and Thin QFN parts
are 100% tested at +85°C and guaranteed by design over temperature.
Note 5: ∆RON = RON(MAX) - RON(MIN).
Note 6: WLP and Thin QFN on-resistance matching between channels is guaranteed by design.
Note 7: Flatness is defined as the difference between the maximum and minimum value of on-resistance as measured over the
specified analog signal range.
Note 8: Guaranteed by design.
Note 9: Off-isolation = 20 log10 (VNO_/VCOM_), VNO_ = output, VCOM_ = input to off switch.
Note 10: Between any two switches.
ELECTRICAL CHARACTERISTICS—Single +5V Supply (continued)
(V+ = +5V ±10%, VIH = +2.0V, VIL = +0.8V, TA= TMIN to TMAX, unless otherwise noted. Typical values are at V+ = +5V, TA= +25°C.)
(Notes 3, 4)
PARAMETER SYMBOL CONDITIONS TAMIN TYP MAX UNITS
Crosstalk (Note 10) VCT f = 1MHz, VNO_ = 1VRMS,
RL = 50Ω, CL = 5pF, Figure 6 +25°C -84 dB
NO_ or NC_ Off-Capacitance COFF f = 1MHz, Figure 7 +25°C 20 pF
COM_ Off-Capacitance CCOM_
(
OFF
)
f = 1MHz, Figure 7 +25°C 20 pF
COM_ On-Capacitance CCOM_
(
ON
)
f = 1MHz, Figure 7 +25°C 40 pF
LOGIC INPUT
Input Logic High VIH 2V
Input Logic Low VIL 0.8 V
Input Leakage Current IIN VIN_ = 0V or V+ -1 +0.005 +1 µA
POWER SUPPLY
Power-Supply Range V+ 2 11 V
Positive Supply Current I+ V+ = +5.5V, VIN_ = 0V or V+,
all switches on or off 0.0001 1 µA
Typical Operating Characteristics
(TA = +25°C, unless otherwise noted.)
ON-RESISTANCE vs. VCOM
MAX4747–50-toc01
VCOM (V)
RON (Ω)
108642
10
20
30
40
50
0
012
V+ = 2V
V+ = 3V
V+ = 5V
V+ = 11V
ON-RESISTANCE vs. VCOM
MAX4747–50-toc02
VCOM (V)
RON (Ω)
4321
4
8
12
16
0
05
V+ = 5V
TA = +25°C
TA = -40°C
TA = +85°C
ON-RESISTANCE vs. VCOM
MAX4747–50-toc03
VCOM (V)
RON (Ω)
2.52.01.51.00.5
5
10
15
20
25
30
0
03.0
TA = +85°CTA = +25°C
TA = -40°C
V+ = 3V
MAX4747–MAX4750
50
Ω
, Low-Voltage, Quad SPST/Dual SPDT Analog
Switches in WLP
6 _______________________________________________________________________________________
ON-RESISTANCE vs. VCOM
MAX4747–50-toc04
VCOM (V)
RON (Ω)
2.01.51.00.5
5
10
15
20
25
30
0
02.5
TA = +85°C
TA = +25°C
TA = -40°C
V+ = 2.5V
SUPPLY CURRENT
vs. TEMPERATURE
MAX4747–50-toc05
TEMPERATURE (°C)
SUPPLY CURRENT (pA)
603510-15
1
10
100
1000
10,000
0.1
-40 85
V+ = 3V, 5V
100
0.01
-40 -15 35 60 85
LEAKAGE vs. TEMPERATURE
0.1
1
10
MAX4747–50-toc06
TEMPERATURE (°C)
LEAKAGE CURRENT (pA)
10
V+ = 5V,
VCOM = 4.5V,
NO_ or NC_ = UNCONNECTED
ON
OFF
IN LOGIC THRESHOLD
vs. SUPPLY VOLTAGE
MAX4747–50-toc07
SUPPLY VOLTAGE (V)
LOGIC THRESHOLD (V)
1082 4 6
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
0
012
VNO_ = V+
0
0.01 0.1 1 10 100 1000
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
-110
FREQUENCY RESPONSE
MAX4747–50-toc08
FREQUENCY (MHz)
GAIN (dB)/PHASE (DEGREES)
LOSS
PHASE
CROSSTALK
OFF-
ISOLATION
Typical Operating Characteristics (continued)
(TA = +25°C, unless otherwise noted.)
CHARGE INJECTION vs. VCOM
MAX4747–50-toc09
VCOM (V)
CHARGE (pC)
108642
10
20
30
40
50
60
0
012
V+ = 11V
V+ = 5V
V+ = 3V
TURN-ON/OFF TIME
vs. TEMPERATURE
MAX4747–50-toc10
TEMPERATURE (°C)
TURN-ON/OFF TIME (ns)
6035-15 10
10
20
30
40
50
60
70
80
0
-40 85
tON, V+ = 3V tON, V+ = 5V
tOFF, V+ = 3V tOFF, V+ = 5V
TURN-ON/OFF TIME
vs. SUPPLY VOLTAGE
MAX4747–50-toc11
SUPPLY VOLTAGE (V)
TURN-ON/OFF TIME (ns)
108642
20
40
60
80
100
120
0
012
tON
tOFF
VNO = V+/2
TOTAL HARMONIC DISTORTION
vs. FREQUENCY
MAX4747-50 toc12
FREQUENCY (kHz)
THD (%)
1010.1
0.01
0.1
1
0.001
0.01 100
SOURCE AND LOAD = 600Ω
VCOM = 2VP-P
V+ = 5V
V+ = 3V
MAX4747–MAX4750
50
Ω
, Low-Voltage, Quad SPST/Dual SPDT Analog
Switches in WLP
_______________________________________________________________________________________ 7
Bump Description—WLP
PIN
MAX4747 MAX4748 MAX4749 MAX4750 NAME FUNCTION
B1, A2, C4, D2 — — — NO1–NO4 Analog-Switch Normally Open Terminals
— B1, A2, C4, D2 — — NC1–NC4 Analog-Switch Normally Closed Terminals
— — B1, C4 — NO1, NO3 Analog-Switch Normally Open Terminals
— — — B1, C4 NO1, NO2 Analog-Switch Normally Open Terminals
— — — A3, D2 NC1, NC2 Analog-Switch Normally Closed Terminals
— — A2, D2 — NC2, NC4 Analog-Switch Normally Closed Terminals
A1, A3, D4, D3 A1, A3, D4, D3 A1, A3, D4, D3 — COM1–COM4 Analog-Switch Common Terminal
— — — A1, D4 COM1, COM2 Analog-Switch Common Terminal
C1, A4, B4, D1 C1, A4, B4, D1 C1, A4, B4, D1 — IN1–IN4 Logic-Control Digital Input
— — — C1, B4 IN1, IN2 Logic-Control Digital Input
C3 C3 C3 C3 GND Ground. Connect to digital ground.
B2 B2 B2 B2 V+
Positive Analog and Digital Supply
Voltage Input. Internally connected to
substrate.
— — — A2, A4, D1, D3 N.C. No Connection. Not internally connected.
Pin Description—TSSOP
PIN
MAX4747 MAX4748 MAX4749 MAX4750 NAME FUNCTION
1, 3, 8, 11 — — — NO1–NO4 Analog-Switch Normally Open Terminals
— 1, 3, 8, 11 — — NC1–NC4 Analog-Switch Normally Closed Terminals
— — 1, 8 — NO1, NO3 Analog-Switch Normally Open Terminals
— — — 1, 8 NO1, NO2 Analog-Switch Normally Open Terminals
— — — 4, 11 NC1, NC2 Analog-Switch Normally Closed Terminals
— — 3, 11 — NC2, NC4 Analog-Switch Normally Closed Terminals
2, 4, 9, 10 2, 4, 9, 10 2, 4, 9, 10 — COM1–COM4 Analog-Switch Common Terminal
— — — 2, 9 COM1, COM2 Analog-Switch Common Terminal
13, 5, 6, 12 13, 5, 6, 12 13, 5, 6, 12 — IN1–IN4 Logic-Control Digital Input
— — — 13, 6 IN1, IN2 Logic-Control Digital Input
7 7 7 7 GND Ground. Connect to digital ground.
14 14 14 14 V+ Positive Analog and Digital Supply Voltage
Input. Internally connected to substrate.
— — — 3, 5, 10, 12 N.C. No Connection. Not internally connected.
MAX4747–MAX4750
50
Ω
, Low-Voltage, Quad SPST/Dual SPDT Analog
Switches in WLP
8 _______________________________________________________________________________________
Pin Description—TQFN-EP
PIN
MAX4747 MAX4748 MAX4749 MAX4750 NAME FUNCTION
1, 3 1, 3 1, 3 1, 9 COM1, COM2 Analog-Switch Common Terminals
2 — — 7 NO2 Analog-Switch Normally Open Terminal
4, 13 4, 13 4, 13 5, 13 IN2, IN1 Logic-Control Digital Inputs
5, 12 5, 12 5, 12 — IN3, IN4 Logic-Control Digital Inputs
6 6 6 6 GND Ground. Connect to digital ground.
7 — 7 — NO3 Analog-Switch Normally Open Terminal
8, 14 8, 14 8, 14 2, 4, 8, 10, 12, 14 N.C. No Connection. Not internally connected.
9, 10 9, 10 9, 10 — COM3, COM4 Analog-Switch Common Terminals
11 — — — NO4 Analog-Switch Normally Open Terminal
15 15 15 15 V+ Positive Supply-Voltage Input
16 — 16 16 NO1 Analog-Switch Normally Open Terminal
— 2 2 11 NC2 Analog-Switch Normally Closed Terminal
— 7 — — NC3 Analog-Switch Normally Closed Terminal
— 11 11 — NC4 Analog-Switch Normally Closed Terminal
— 16 — 3 NC1 Analog-Switch Normally Closed Terminal
— — — — EP Exposed Pad. Connect EP to V+.
MAX4747–MAX4750
Applications Information
Operating Considerations for
High-Voltage Supply
The MAX4747–MAX4750 operate to +11V with some
precautions. The absolute maximum rating for V+ is
+12V (referenced to GND). When operating near this
region, bypass V+ with a minimum 0.1µF capacitor to
ground as close to the IC as possible.
Logic Levels
The MAX4747–MAX4750 are TTL compatible when
powered from a single +3V supply. When powered from
other supply voltages, the logic inputs should be driven
rail-to-rail. For example, with a +11V supply, IN_ should
be driven low to 0V and high to 11V. With a +3.3V sup-
ply, IN_ should be driven low to 0V and high to 3.3V.
Driving IN_ rail-to-rail minimizes power consumption.
Analog Signal Levels
Analog signals that range over the entire supply volt-
age (GND to V+) pass with very little change in RON
(see the
Typical Operating Characteristics
). The bidi-
rectional switches allow NO_, NC_, and COM_ connec-
tions to be used as either inputs or outputs.
Power-Supply Sequencing and
Overvoltage Protection
CAUTION: Do not exceed the absolute maximum
ratings. Stresses beyond the listed ratings can
cause permanent damage to the devices.
Proper power-supply sequencing is recommended for
all CMOS devices. Always apply V+ before applying
analog signals, especially if the analog signal is not
current limited. If this sequencing is not possible, and if
the analog inputs are not current limited to < 20mA, add
small-signal diode D1 as shown in Figure 1. If the ana-
log signal can dip below GND, add D2. Adding protec-
tion diodes reduces the analog signal range to a diode
drop (about 0.7V) below V+ (for D1), and to a diode
drop above ground (for D2). Leakage is unaffected by
adding the diodes. On-resistance increases slightly at
low supply voltages. Maximum supply voltage (V+) must
not exceed +11V.
Adding protection diodes causes the logic thresholds to
be shifted relative to the power-supply rails. The most
significant shift occurs when using low supply voltages
(+5V or less). With a +5V supply, TTL compatibility is
not guaranteed when protection diodes are added.
Driving IN_ and IN_ all the way to the supply rails (i.e., to
a diode drop higher than the V+ pin, or to a diode drop
lower than the GND pin) is always acceptable.
Protection diodes D1 and D2 also protect against some
overvoltage situations. Using the circuit in Figure 1, no
damage results if the supply voltage is below the
absolute maximum rating (+12V) and if a fault voltage
up to the absolute maximum rating (V+ + 0.3V) is
applied to an analog signal terminal.
WLP Applications Information
For the latest application details on WLP construction,
dimensions, tape carrier information, PC board tech-
niques, bump-pad layout, and recommended reflow
temperature profile, as well as the latest information on
reliability testing results, refer to the Application Note
1891:
Wafer-Level Packaging (WLP) and its Applications
on Maxim’s web site at www.maxim-ic.com/wlp.
MAX4747–
MAX4750
NO_ COM_
GND
V+
*INTERNAL PROTECTION DIODES
D2
D1
EXTERNAL BLOCKING DIODE
EXTERNAL BLOCKING DIODE
GND
V+
*
*
*
*
Figure 1. Overvoltage Protection Using External Blocking Diodes
Test Circuits/Timing Diagrams
50
Ω
, Low-Voltage, Quad SPST/Dual SPDT Analog
Switches in WLP
_______________________________________________________________________________________ 9
MAX4747–MAX4750
50
Ω
, Low-Voltage, Quad SPST/Dual SPDT Analog
Switches in WLP
10 ______________________________________________________________________________________
Test Circuits/Timing Diagrams (continued)
50%
VIL
LOGIC
INPUT
RL
300Ω
IN_
CL INCLUDES FIXTURE AND STRAY CAPACITANCE.
( RL)
VN_
VIH
tOFF
0
NO_
OR NC_
0.9 x VOUT 0.9 x VOUT
tON
VOUT
SWITCH
OUTPUT
LOGIC
INPUT
LOGIC INPUT WAVEFORMS INVERTED FOR SWITCHES
THAT HAVE THE OPPOSITE LOGIC SENSE.
V+
COM_
CL
35pF
V+
VOUT
MAX4747–
MAX4750
GND
RL + RON
tr < 5ns
tf < 5ns
VOUT = VN_
Figure 2. Switching Time
50%
0.9 x V0UT1
VIH
VIL
0
LOGIC
INPUT
SWITCH
OUTPUT 2
(VOUT2)
0
0.9 x VOUT2
tBBM tBBM
LOGIC
INPUT
RL2
300Ω
GND
CL INCLUDES FIXTURE AND STRAY CAPACITANCE.
NC_
IN_
IN_
NO_
VOUT2
V+
V+
CL2
35pF
VN_
RL1
300Ω
VOUT1
CL1
35pF
COM_
COM_ SWITCH
OUTPUT 1
(VOUT1)
MAX4749 tr < 5ns
tf < 5ns
Figure 3. Break-Before-Make Interval
VGEN GND
COM
CL
1nF
VOUT
V+ VOUT
IN
OFF ON OFF
∆VOUT
Q = (∆VOUT)(CL)
NC_
OR NO_
IN DEPENDS ON SWITCH CONFIGURATION;
INPUT POLARITY DETERMINED BY SENSE OF SWITCH.
OFF ON OFF
IN
VILTO VIH
V+
RGEN
IN_
MAX4747–
MAX4750
Figure 4. Charge Injection
MAX4747–MAX4750
50
Ω
, Low-Voltage, Quad SPST/Dual SPDT Analog
Switches in WLP
______________________________________________________________________________________ 11
IN_
VIL OR
VIH
SIGNAL
GENERATOR 0dBm
V+
10nF
ANALYZER
NC_
OR NO_
RL
GND
COM_V+
MAX4747–
MAX4750
V-
DUAL SUPPLIES USED TO ACCOMMODATE GROUND-REFERENCED INSTRUMENTS.
10nF
Figure 5. Off-Isolation/On-Channel Bandwidth
SIGNAL
GENERATOR 0dBm
V+
10nF
ANALYZER NO_/NC_
RL
COM_
0 OR 2.4V IN_
NO_/NC_ 50Ω
COM_
IN_ 0 OR
2.4V
N.C.
V+
MAX4747–
MAX4750
GND
V-
DUAL SUPPLIES USED TO ACCOMMODATE GROUND-REFERENCED INSTRUMENTS.
10nF
Figure 6. Crosstalk
CAPACITANCE
METER NC_ OR
NO_
COM_
GND
IN_ VIL OR
VIH
10nF V+
f = 1MHz
V+
MAX4747–
MAX4750
Figure 7. Channel Off-/On-Capacitance
Test Circuits/Timing Diagrams (continued)
Ordering Information (continued)
PART TEMP
RANGE
PIN-/BUMP-
PACKAGE
MAX4748EUD+ -40°C to +85°C 14 TSSOP
MAX4748ETE+ -40°C to +85°C 16 Thin QFN-EP*
MAX4748EWE+T -40°C to +85°C 16 WLP
MAX4749EUD+ -40°C to +85°C 14 TSSOP
MAX4749ETE+ -40°C to +85°C 16 Thin QFN-EP*
MAX4749EWE+T** -40°C to +85°C 16 WLP
MAX4750EUD+ -40°C to +85°C 14 TSSOP
MAX4750ETE+ -40°C to +85°C 16 Thin QFN-EP*
MAX4750EWE+T** -40°C to +85°C 16 WLP
*
EP = Exposed pad.
+
Denotes a lead(Pb)-free/RoHS-compliant package.
**
Future products. Contact factory for availability.
T = Tape and reel.
MAX4747–MAX4750
50
Ω
, Low-Voltage, Quad SPST/Dual SPDT Analog
Switches in WLP
12 ______________________________________________________________________________________
14
13
12
11
10
9
8
1
2
3
4
5
6
7
MAX4748
MAX4748
MAX4749
MAX4748
MAX4750
TSSOP
V+
IN1
IN4
NC4
COM4
COM3
NC3
COM2
NC2
COM1
NC1
GND
IN3
IN2
TOP VIEW
INPUT SWITCH STATE
LOW
HIGH
ON
OFF
14
13
12
11
10
9
8
1
2
3
4
5
6
7
MAX4749
TSSOP
V+
IN1
IN4
NC4
COM4
COM3
NO3
COM2
NC2
COM1
NO1
GND
IN3
IN2
INPUT NO1, NO3
LOW
HIGH
OFF
ON
NC2, NC4
ON
OFF
14
13
12
11
10
9
8
1
2
3
4
5
6
7
MAX4750
TSSOP
V+
IN1
N.C.
NC2
N.C.
COM2
NO2
NC1
N.C.
COM1
NO1
GND
IN2
N.C.
INPUT NO1, NO2
LOW
HIGH
OFF
ON
NC1, NC2
ON
OFF
TOP VIEW
(BUMPS SIDE DOWN)
TOP VIEW TOP VIEW
(BUMPS SIDE DOWN)
TOP VIEW TOP VIEW
(BUMPS SIDE DOWN)
WLP
N.C. NC1 N.C.
COM1
1
A
B
C
D
234
NO1 V+ IN2
IN1 GND NO2
N.C. NC2 N.C. COM2
WLP
NC2 COM2 IN2
COM1
1
A
B
C
D
234
NO1 V+ IN3
IN1 GND NO3
IN4 NC4 COM4 COM3
WLP
NC2 COM2 IN2
COM1
1
A
B
C
D
234
NC1 V+ IN3
IN1 GND NC3
IN4 NC4 COM4 COM3
16 15 14 13
NC1
V+
N.C.
IN1
9
10
11
12
COM3
COM4
NO4
IN4
4
3
2
1
IN2
COM2
NC2
COM1
5678
IN3
GND
NC3
N.C.
MAX4748ETE
TQFN
16 15 14 13
NO1
V+
N.C.
IN1
9
10
11
12
COM2
N.C.
NC2
N.C.
4
3
2
1
NC1
N.C.
N.C.
COM1
5678
IN2
GND
NO2
N.C.
MAX4750ETE
TQFN
16 15 14 13
NO1
V+
N.C.
IN1
9
10
11
12
COM3
COM4
NC4
IN4
4
3
2
1
IN2
COM2
NC2
COM1
5678
IN3
GND
NO3
N.C.
MAX4749ETE
TQFN
+
+
+
+
+
+
*EP
*EP
*EP
*CONNECT EP TO V+
*CONNECT EP TO V+
*CONNECT EP TO V+
Pin/Bump Configurations/Truth Tables (continued)
MAX4747–MAX4750
50
Ω
, Low-Voltage, Quad SPST/Dual SPDT Analog
Switches in WLP
______________________________________________________________________________________ 13
Chip Information
PROCESS: CMOS
Package Information
For the latest package outline information and land patterns
(footprints), go to www.maxim-ic.com/packages. Note that a
“+”, “#”, or “-” in the package code indicates RoHS status only.
Package drawings may show a different suffix character, but
the drawing pertains to the package regardless of RoHS status.
PACKAGE
TYPE
PACKAGE
CODE
OUTLINE
NO.
LAND
PATTERN NO.
14 TSSOP U14+1 21-0066 90-0113
16 TQFN T1644+4 21-0139 90-0070
16 WLP W162D2+1 21-0200
Refer to
Application
Note 1891
MAX4747–MAX4750
50
Ω
, Low-Voltage, Quad SPST/Dual SPDT Analog
Switches in WLP
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits) shown in
the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
14
____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2012 Maxim Integrated Products Maxim is a registered trademark of Maxim Integrated Products, Inc.
Revision History
REVISION
NUMBER
REVISION
DATE DESCRIPTION PAGES
CHANGED
2 12/06 Various changes 1-15
3 1/12 Updated UCSP to WLP packaging, corrected pin configuration, added lead-free
packaging 1-9, 11-13
