SCALE™-2 1SP0635x2x1-33
Data Sheet
www.power.com/igbt-driver Page 6
7) The given power can only be fully exploited without slaves 1SP0635D2S1 (no parallel connection of
IGBT modules). If the specified value is exceeded, this indicates a driver overload. It should be noted
that the driver is not protected against overload. From 70°C to 85°C, the maximum permissible output
power can be linearly interpolated from the given data.
8) The given power can be fully exploited with slaves 1SP0635D2S1 (parallel connection of IGBT
modules). If the specified value is exceeded, this indicates a driver overload. It should be noted that
the driver is not protected against overload. From 70°C to 85°C, the maximum permissible output
power can be linearly interpolated from the given data. Note that the DC/DC converter on the master
1SP0635x2M1 is dimensioned to supply the master as well as three connected slaves 1SP0635D2S1 at
full load.
9) The gate current is limited by the gate resistors located on the driver.
10) HiPot testing (= dielectric testing) must generally be restricted to suitable components. This gate
driver is suited for HiPot testing. Nevertheless, it is strongly recommended to limit the testing time to
1s slots. Excessive HiPot testing may lead to insulation degradation.
11) This limit is due to active clamping under switching conditions. Refer to the “Description & Application
Manual for 1SP0635 SCALE-2 IGBT Drivers”.
12) Due to the Dynamic Active Advanced Clamping Function (DA2C) implemented on the driver, the DC-
link voltage can be increased in the off-state condition (e.g. after emergency shut-down). This value is
only valid when the IGBTs are in the off state (not switching). The time during which the voltage can
be applied should be limited to short periods (< 60 seconds). Refer to the “Description & Application
Manual for 1SP0635 SCALE-2 IGBT Drivers”.
13) The maximum dynamic voltage between auxiliary emitters of parallel-connected drivers due to
asymmetrical operation at turn-on and turn-off must be limited to the given value.
14) Maximum allowed rate of change between auxiliary emitter voltages of parallel connected drivers.
15) Dynamic voltages between auxiliary emitters of parallel connected drivers at turn-on and turn-off lead
to equalizing currents over the X2 or X3 bus. The peak and RMS values of the resulting current must
be limited to the given value.
16) Undervoltage monitoring of the secondary-side supply voltage (Viso to Vee and Vee to COM which
correspond with the approximate turn-on and turn-off gate-emitter voltages). If the corresponding
voltage drops below this limit on 1SP0635x2M1 (masters), all paralleled IGBTs (master and slaves) are
switched off and a fault is transmitted to the status output. If the corresponding voltage drops below
this limit on 1SP0635D2S1 (slaves), the corresponding IGBT is switched off. A fault will be generated
by the gate-monitoring function on the master which will turn off all paralleled IGBTs after the
corresponding delay.
17) The mean value VGE,mean of all gate voltages (master and all slaves) is filtered and compared to the
given values at turn-on and turn-off. If the specified values are exceeded (VGE,mean<VGE,on,min at turn-on
resp. VGE,mean>VGE,off,max at turn-off) after the given filter delay, the driver turns off all parallel-
connected IGBTs and a fault is transmitted to the status output.
18) A dynamic Vce protection is implemented on the driver. The maximum allowed Vce voltage at turn-on
is dynamically adjusted in order to better fit the IGBT characteristics at turn-on. At the end of the
turn-on process, the given static value applies.
19) The resulting pulse width of the direct output of the gate drive unit for short-circuit type I (excluding
the delay of the gate resistors) is the sum of the response time plus the delay to IGBT turn-off.
20) The turn-off event of the IGBT is delayed by the specified time after the response time.
21) Including the delay of the external fiber-optic links (cable length: 1m). Measured from the transition
of the turn-on or turn-off command at the optical transmitter on the host controller side to the direct
output of the gate drive unit (excluding the delay of the gate resistors).
22) Output rise and fall times are measured between 10% and 90% of the nominal output swing. The
values are given for the driver side of the gate resistors with 2Ω/1uF load. The time constant of the
output load in conjunction with the present gate resistors leads to an additional delay at their load
side.
23) Delay of external fiber-optic links. Measured from the driver secondary side (ASIC output) to the
optical receiver on the host controller (cable length: 1m).
24) Measured on the host side. The fault status on the secondary side is automatically reset after the
specified time.