© Semiconductor Components Industries, LLC, 2016
August, 2019 − Rev. 2
1Publication Order Number:
NVTFS5C680NL/D
NVTFS5C680NL
MOSFET – Power, Single
N-Channel
60 V, 26.5 mW, 20 A
Features
•Small Footprint (3.3 x 3.3 mm) for Compact Design
•Low RDS(on) to Minimize Conduction Losses
•Low Capacitance to Minimize Driver Losses
•NVTFS5C680NLWF − Wettable Flanks Product
•AEC−Q101 Qualified and PPAP Capable
•These Devices are Pb−Free and are RoHS Compliant
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Parameter Symbol Value Unit
Drain−to−Source Voltage VDSS 60 V
Gate−to−Source Voltage VGS ±20 V
Continuous Drain
Current RqJC
(Notes 1, 2, 3, 4) Steady
State
TC = 25°CID20 A
TC = 100°C 14
Power Dissipation
RqJC (Notes 1, 2, 3)
TC = 25°CPD20 W
TC = 100°C 10
Continuous Drain
Current RqJA
(Notes 1 & 3, 4) Steady
State
TA = 25°CID7.82 A
TA = 100°C 6.54
Power Dissipation
RqJA (Notes 1, 3)
TA = 25°CPD3.0 W
TA = 100°C 2.1
Pulsed Drain Current TA = 25°C, tp = 10 msIDM 80 A
Operating Junction and Storage Temperature TJ, Tstg −55 to
+175
°C
Source Current (Body Diode) IS17 A
Single Pulse Drain−to−Source Avalanche
Energy (IL(pk) = 1 A)
EAS 51 mJ
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
TL260 °C
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
THERMAL RESISTANCE MAXIMUM RATINGS (Note 1)
Parameter Symbol Value Unit
Junction−to−Case − Steady State (Note 3) RqJC 7.32 °C/W
Junction−to−Ambient − Steady State (Note 3) RqJA 49
1. The entire application environment impacts the thermal resistance values shown,
they are not constants and are only valid for the particular conditions noted.
2. Psi (Y) is used as required per JESD51−12 for packages in which
substantially less than 100% of the heat flows to single case surface.
3. Surface−mounted on FR4 board using a 650 mm2, 2 oz. Cu pad.
4. Continuous DC current rating. Maximum current for pulses as long as 1
second is higher but is dependent on pulse duration and duty cycle.
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V(BR)DSS RDS(on) MAX ID MAX
60 V
26.5 mW @ 10 V
20 A
WDFN8
(m8FL)
CASE 511AB
MARKING DIAGRAM
42.5 mW @ 4.5 V
(Note: Microdot may be in either location)
1
XXXX = Specific Device Code
A = Assembly Location
Y = Year
WW = Work Week
G= Pb−Free Package
1
XXXX
AYWWG
G
D
D
D
D
S
S
S
G
N−Channel
D (5 − 8)
S (1, 2, 3)
G (4)
See detailed ordering, marking and shipping information in the
package dimensions section on page 5 of this data sheet.
ORDERING INFORMATION
NVTFS5C680NL
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2
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted)
Parameter Symbol Test Condition Min Typ Max Unit
OFF CHARACTERISTICS
Drain−to−Source Breakdown Voltage V(BR)DSS VGS = 0 V, ID = 250 mA60 V
Zero Gate Voltage Drain Current IDSS VGS = 0 V,
VDS = 60 V
TJ = 25°C 10 mA
TJ = 125°C 100
Gate−to−Source Leakage Current IGSS VDS = 0 V, VGS = +20 V 100 nA
ON CHARACTERISTICS (Note 5)
Gate Threshold Voltage VGS(TH) VGS = VDS, ID = 13 mA1.2 2.2 V
Drain−to−Source On Resistance RDS(on) VGS = 10 V, ID = 10 A 22 26.5 mW
VGS = 4.5 V, ID = 10 A 34 42.5
Forward Transconductance gFS VDS = 15 V, ID = 10 A 20 S
CHARGES AND CAPACITANCES
Input Capacitance Ciss VGS = 0 V, f = 1.0 MHz,
VDS = 25 V
327 pF
Output Capacitance Coss 161
Reverse Transfer Capacitance Crss 6.0
Total Gate Charge QG(TOT)
VGS = 4.5 V, VDS = 48 V, ID = 10 A
2.9 nC
Threshold Gate Charge QG(TH) 0.8 nC
Gate−to−Source Charge QGS 1.2
Gate−to−Drain Charge QGD 0.8
Total Gate Charge QG(TOT) VGS = 10 V, VDS = 48 V, ID = 10 A 6.0 nC
SWITCHING CHARACTERISTICS (Note 6)
Turn−On Delay Time td(on)
VGS = 4.5 V, VDS = 48 V,
ID = 10 A, RG = 1.0 W
6.5 ns
Rise Time tr25
Turn−Off Delay Time td(off) 13
Fall Time tf23
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage VSD VGS = 0 V,
IS = 10 A
TJ = 25°C 0.9 1.2 V
TJ = 125°C 0.8
Reverse Recovery Time tRR
VGS = 0 V, dlS/dt = 100 A/ms,
IS = 10 A
17 ns
Charge Time ta8.0
Discharge Time tb9.0
Reverse Recovery Charge QRR 7.0 nC
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
5. Pulse Test: Pulse Width ≤ 300 ms, Duty Cycle ≤ 2%.
6. Switching characteristics are independent of operating junction temperatures.
NVTFS5C680NL
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3
TYPICAL CHARACTERISTICS
0
5
10
15
20
25
30
012345
Figure 1. On−Region Characteristics Figure 2. Transfer Characteristics
VDS, DRAIN−TO−SOURCE VOLTAGE (V) VGS, GATE−TO−SOURCE VOLTAGE (V)
Figure 3. On−Resistance vs. Gate−to−Source
Voltage
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
VGS, GATE−TO−SOURCE VOLTAGE (V) ID, DRAIN CURRENT (A)
Figure 5. On−Resistance Variation with
Temperature
Figure 6. Drain−to−Source Leakage Current
vs. Voltage
TJ, JUNCTION TEMPERATURE (°C) VDS, DRAIN−TO−SOURCE VOLTAGE (V)
ID, DRAIN CURRENT (A)
ID, DRAIN CURRENT (A)
RDS(on), DRAIN−TO−SOURCE RESISTANCE (mW)
RDS(on), DRAIN−TO−SOURCE RESISTANCE (mW)
RDS(on), NORMALIZED DRAIN−TO−
SOURCE RESISTANCE
IDSS, LEAKAGE (nA)
2.6 V
3.0 V
TJ = 125°C
TJ = 25°C
TJ = −55°C
TJ = 25°C
ID = 10 A
TJ = 25°C
VGS = 4.5 V
VGS = 10 V
VGS = 10 V
ID = 10 A
TJ = 125°C
TJ = 85°C
3.4 V
VDS = 10 V
TJ = 150°C
VGS = 3.8 V to 10 V
2.8 V
3.2 V
0
5
10
15
20
25
30
0 0.5 1.0 1.5 2.0 2.5
3.6 V
20
25
30
35
40
45
50
34 5 6 7 8 910
50
56 8 910
40
30
25
20
15
7
0.6
0.8
1.0
1.4
1.6
1.8
2.2
−50 −25 0 25 50 75 100 125 150 175
0.01
100
1000
10000
100000
5152535
35
45
1.2
2.0
45 55
TJ = 25°C
10
1
0.1
NVTFS5C680NL
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4
TYPICAL CHARACTERISTICS
Figure 7. Capacitance Variation Figure 8. Gate−to−Source vs. Total Charge
VDS, DRAIN−TO−SOURCE VOLTAGE (V) QG, TOTAL GATE CHARGE (nC)
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
Figure 10. Diode Forward Voltage vs. Current
RG, GATE RESISTANCE (W)VSD, SOURCE−TO−DRAIN VOLTAGE (V)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
Figure 12. IPEAK vs. Time in Avalanche
VDS (V) TIME IN AVALANCHE (s)
C, CAPACITANCE (pF)
VGS, GATE−TO−SOURCE VOLTAGE (V)
t, TIME (ns)
IS, SOURCE CURRENT (A)
ID, DRAIN CURRENT (A)
IPEAK, (A)
VGS = 0 V
TJ = 25°C
f = 1 MHz
CISS
COSS
CRSS VDS = 48 V
TJ = 25°C
ID = 10 A
QGS QGD
VGS = 4.5 V
VDS = 48 V
ID = 10 A
td(off)
td(on)
tf
tr
TJ = 125°C
TJ = 25°C
TJ = −55°C
TJ (initial) = 100°C
TJ (initial) = 25°C
RDS(on) Limit
Thermal Limit
Package Limit 1 ms
10 ms
TC = 25°C
VGS ≤ 10 V
Single Pulse
1
10
100
1000
010203040
0
2
4
6
8
10
012 3
1
10
100
1 10 100
1
10
0.6 0.7 0.8 0.9 1.4
1000
1 10 1000.1
100
10
1
0.1 0.1
1
10
0.00001 0.001 0.01
0.0001
50 60 4 5
1.0 1.1 1.2 1.3
1000
10 ms
0.5 ms
VGS = 0 V
NVTFS5C680NL
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5
TYPICAL CHARACTERISTICS
0.01
0.1
1
10
100
0.000001 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000
Figure 13. Thermal Characteristics
PULSE TIME (sec)
R(t) (°C/W)
Single Pulse
50% Duty Cycle
20%
10%
5%
2%
1%
DEVICE ORDERING INFORMATION
Device Marking Package Shipping†
NVTFS5C680NLTAG 680L WDFN8
(Pb−Free)
1500 / Tape & Reel
NVTFS5C680NLWFTAG 80LW WDFN8
(Pb−Free)
1500 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
M1.40 1.50
q0 −−−
_
1.60
12
_
WDFN8 3.3x3.3, 0.65P
CASE 511AB
ISSUE D
DATE 23 APR 2012
SCALE 2:1
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION D1 AND E1 DO NOT INCLUDE MOLD FLASH
PROTRUSIONS OR GATE BURRS.
1234
56
TOP VIEW
SIDE VIEW
BOTTOM VIEW
D1
E1 q
D
E
B
A
0.20 C
0.20 C
2X
2X
DIM MIN NOM
MILLIMETERS
A0.70 0.75
A1 0.00 −−−
b0.23 0.30
c0.15 0.20
D
D1 2.95 3.05
D2 1.98 2.11
E
E1 2.95 3.05
E2 1.47 1.60
e0.65 BSC
G0.30 0.41
K0.65 0.80
L0.30 0.43
L1 0.06 0.13
A
0.10 C
0.10 C
DETAIL A
14
8L1
e/2
8X
D2
G
E2
K
b
A0.10 B
C
0.05 C
L
DETAIL A
A1
e
6X
c
4X
C
SEATING
PLANE
1
5
MAX
0.80
0.05
0.40
0.25
3.15
2.24
3.15
1.73
0.51
0.95
0.56
0.20
M
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
SOLDERING FOOTPRINT*
0.650.42
0.75 2.30
3.46
PACKAGE
8X
0.055 0.059
0 −−−
_
0.063
12
_
0.028 0.030
0.000 −−−
0.009 0.012
0.006 0.008
0.116 0.120
0.078 0.083
0.116 0.120
0.058 0.063
0.026 BSC
0.012 0.016
0.026 0.032
0.012 0.017
0.002 0.005
0.031
0.002
0.016
0.010
0.124
0.088
0.124
0.068
0.020
0.037
0.022
0.008
MIN NOM
INCHES
MAX
78
PITCH
3.60
0.57
0.47
OUTLINE
DIMENSION: MILLIMETERS
3.30 BSC
3.30 BSC
0.130 BSC
0.130 BSC
2.37
0.66
4X
GENERIC
MARKING DIAGRAM*
XXXXX = Specific Device Code
A = Assembly Location
Y = Year
WW = Work Week
G= Pb−Free Package
*This information is generic. Please refer
to device data sheet for actual part
marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present.
XXXXX
AYWWG
G
1
E3 0.23 0.30 0.40 0.009 0.012 0.016
E3
4X
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
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DOCUMENT NUMBER:
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WDFN8 3.3X3.3, 0.65P
© Semiconductor Components Industries, LLC, 2019 www.onsemi.com
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