TDA7331 (R) SINGLE CHIP RDS DEMODULATOR + FILTER VERY HIGH RDS DEMODULATION QUALITY WITH IMPROVED DIGITAL SIGNAL PROCESSING HIGH PERFORMANCE, 57KHz BANDPASS FILTER (8th ORDER) PURELY DIGITAL RDS DEMODULATION WITHOUT EXTERNAL COMPONENTS ARI INDICATION AND RDS SIGNAL QUALITY OUTPUTS 4.332MHz CRYSTAL OSCILLATOR (8.664 and 17.328MHz SELECTABLE OPTIONS) LOW NOISE CMOS TECHNOLOGY LOW RADIATION DIP20 ORDERING NUMBERS: ) s ( ct r P e 1 MPX 270pF t e l o s b O u d o FILOUT c u d TDA7331 DESCRIPTION The TDA7331, an improved version of TDA7330B, recovers the additional inaudible RDS information which is transmitted by FM radio broadcasting stations and operates in accordance with the EBU (European Broadcasting Union) specifications. The device is made up of two sections: a casBLOCK DIAGRAM and TEST CIRCUIT SO20 TDA7331D o r P caded antialiasing + switched capacitors bandpass filter for precise RDS band selection and a demodulating section that performs the extraction od RDS data stream (RDDA) and clock (RDCL), to be furher processed by a suitable RDS decoder. Outputs for RDS signal quality and ARI indication are also present. e t le o s b O C1 27pF T57 4.332MHz OSCIN C2 47pF OSCOUT 10 11 2nd ORDER ANTIALIASING FILTER 9 3 OSCILLATOR & DIVIDER 18 12 8th ORDER SC-BANDPASS FILTER 4 1187.5Hz PLL 57KHz PLL 15 14 FAST ARI INDICATOR 16 VS ) s t( QUAL DET. OSEL FSEL RDCL ARI QUAL 100nF VREF - 2 + POLARITY BIPHASE DEC. 0 1 10F MUX DIFF. DECODER 19 INTEGRAL BIPHASE DEC. 5 GND September 2003 6,7,8,17 N.C. 13 TEST LOGIC RDDA TM 20 EXTRES D97AU686B 1/7 TDA7331 ABSOLUTE MAXIMUM RATINGS Symbol VS Top Tstg Parameter Supply Voltage Operating Temperature Range Storage Temperature Value 7 -40 to 85 -55 to 150 Unit V C C PIN FUNCTION No pin 1 2 3 Name MPX VREF OSEL 4 5 6 7 8 9 10 11 12 13 14 15 FILOUT GND nc nc nc OSCOUT OSCIN T57 RDCL RDDA QUAL ARI 16 17 18 Vs nc FSEL 19 TM 20 EXTRES PIN CONNECTION Functional description RDS input signal Reference voltage Oscillator selector pin: - open, or closed to Vs = quartz oscillator - closed to GND = external driven Filter output Ground Not connected Not connected Not connected Oscillator output Oscillator input Testing output pin: 57kHz clock output RDS clock output 1187.5Hz RDS data output Output for signal quality indication (High = good) Output for ARI indication: - high when RDS+ARI are present - high when only ARI is present - low when only RDS is present - undefined when nos signal is present Supply voltage Not connected Frequency selector pin: - 100K to VS = 17.328MHz - open = 4.332MHz - closed to VS = 8.664MHz Test mode pin: - open = normal operation - closed to VS = testmode Reset pin: - open = run mode - closed to VS = reset condition e t le u d o r P e t e l o bs O ) s ( ct o s b O - MPX 1 20 EXTRES VREF 2 19 TM OSEL 3 18 FSEL FILOUT 4 17 N.C. GND 5 16 VS N.C. 6 15 ARI N.C. 7 14 QUAL N.C. 8 13 RDDA OSCOUT 9 12 RDCL 10 11 T57 OSCIN D97AU687 2/7 o r P c u d ) s t( TDA7331 THERMAL DATA Symbol Description Rth j-amb Thermal Resistance Junction-Ambient DIP20 SO20 Unit 100 200 C/W Max ELECTRICAL CHARACTERISTICS (Tamb = 25C, VS = 5V, unless otherwise specified). Symbol Parameter VS Supply voltage IS Supply current Test Condition Min. 4.5 Typ. Max. Unit 5 5.5 V 7.5 11.0 mA FILTER fC BW Center frequency 56.5 57 57.5 kHz 3dB Bandwidth 2.5 3 3.5 kHz 22 dB G Gain f = 57kHz 18 20 A Attenuation f 4kHz f = 38kHz 18 50 22 60 f = 67kHz RI RL Input impedance of MPX Load impedance on FILOUT 35 80 1 45 120 S/N Signal to noise ratio VIN = 3mVRMS 30 40 VIN MPX input signal f = 19kHz; T3 40dB(1) f = 57kHz (RDS+ ARI) VREF Reference e t le DEMODULATOR Input pins (EXTRES, FSEL, TM) Input pin (OSEL) Input Current Input Current Input voltage high IPD IPU VIH (s) Input voltage low VIL Output pins (RDCL, RDDA, ARI, QUAL, T57) VOH Ouput voltage high VOL Output voltage low OSCILLATOR VCLL VCLH s b O IL = 0.5mA OSEL = open circuit OSEL = open circuit OSEL = open circuit Amplitude OSCIN (for external drive) OSEL = GND, f = 4.332MHz OSEL = GND, f = 8.664MHz OSEL = GND, f = 17.328MHz ) s t( 150 c u d o r P 1000 50 VS/2 dB K M dB mVRMS mVRMS V all with internal pull down resistor with internal pull up resistor 15 -25 0.7 VS 0.8 VS 30 -10 0.2 VS 0.3 VS 4 IL = 0.5mA Input level OSCIN pin Input level OSCIN pin Amplitude OSCOUT t e l o VPP ct u d o r P e o s b O - VIN = 5V (pull-down input) VIN = 0V (pull-up input) dB dB 4.6 0.4 A A V V V 1 V 1 4.5 V V V 100 mVpp 120 mVpp 150 mVpp 4 (1) The 3rd harmonic (57kHz) must be less than -40dB with respect to the input signal plus gain. 3/7 TDA7331 Figure 1. RDS timing diagram CLOCK LINE DATA LINE OUTPUT TIMING The RDS (1187.5Hz) output clock on RDCL line is synchronized to the incoming data. According to the internal PLL lock condition data change can result on the falling or on the rising clock edge. (see Fig. 1) Whichever clock edge is used by the decoder (rising or falling edge) the data will remain valid for 416.7 sec after the clock transition. OSCILLATOR CONTROLS (FSEL, OSEL) Three different crystal frequencies can be used. The adaption of the internal clock divider to the external crystal is achieved via the input pin FSEL. See the followings table for reference: Crystal FSEL (pin configuration) 4.332MHz 8.664MHz 17.328MHz connected to GND or open connected to Vs external resistor of 100K to Vs ) s ( ct u d o r P e t e l o s b O 4/7 A special mode is introduced to reduce EMI. With pin OSEL connected to GND the internal oscillator is switched off and an external sinusoidal frequency could be applied on OSCIN. The peak to peak voltage of this signal can be reduced down to 60mV. In this mode the frequency selection via FSEL is still active. Suggested values of C1 and C2 are shown in the following table: c u d e t le Crystal 4.332MHz 8.664MHz 17.328MHz o s b O - o r P ) s t( C1 C2 27pF 27pF 27pF 47pF - TDA7331 mm DIM. MIN. a1 0.254 B 1.39 TYP. inch MAX. MIN. TYP. MAX. OUTLINE AND MECHANICAL DATA 0.010 1.65 0.055 0.065 b 0.45 0.018 b1 0.25 0.010 D 25.4 1.000 E 8.5 0.335 e 2.54 0.100 e3 22.86 0.900 F 7.1 0.280 I 3.93 0.155 L 3.3 Z o r P DIP20 e let 0.130 1.34 0.053 ) s ( ct c u d ) s t( o s b O - u d o r P e t e l o s b O 5/7 TDA7331 mm inch OUTLINE AND MECHANICAL DATA DIM. MIN. TYP. MAX. MIN. TYP. MAX. A 2.35 2.65 0.093 0.104 A1 0.1 0.3 0.004 0.012 B 0.33 0.51 0.013 0.020 C 0.23 0.32 0.009 0.013 D 12.6 13 0.496 0.512 E 7.4 7.6 0.291 0.299 e 1.27 0.050 H 10 10.65 0.394 0.419 h 0.25 0.75 0.010 0.030 L 0.4 1.27 0.016 0.050 K c u d o r P SO20 e let 0 (min.)8 (max.) ) s ( ct u d o B r P e t e l o s b O o s b O - L h x 45 A e A1 K H D 20 11 E 1 0 1 SO20MEC 6/7 C ) s t( TDA7331 c u d e t le ) s ( ct ) s t( o r P o s b O - u d o r P e t e l o s b O Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. 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