LTC5543 2.3GHz to 4GHz High Dynamic Range Downconverting Mixer DESCRIPTION FEATURES n n n n n n n n n n n n Conversion Gain: 8.4dB at 2500MHz IIP3: 24.5dBm at 2500MHz Noise Figure: 10.2dB at 2500MHz 17.5dB NF Under +5dBm Blocking High Input P1dB 3.3V Supply, 660mW Power Consumption Shutdown Pin 50 Single-Ended RF and LO Inputs LO Inputs 50 Matched when Shutdown High Isolation LO Switch 0dBm LO Drive Level High LO-RF and LO-IF Isolation Small Solution Size 20-Lead (5mm x 5mm) QFN package The LTC(R)5543 is part of a family of high dynamic range, high gain passive downconverting mixers covering the 600MHz to 4GHz frequency range. The LTC5543 is optimized for 2.3GHz to 4GHz RF applications. The LO frequency must fall within the 2.4GHz to 3.6GHz range for optimum performance. A typical application is a LTE or WiMAX receiver with a 2.3GHz to 2.7GHz RF input and high-side LO. The LTC5543 is designed for 3.3V operation, however; the IF amplifier can be powered by 5V for the highest P1dB. An integrated SPDT LO switch with fast switching accepts two active LO signals, while providing high isolation. APPLICATIONS The LTC5543's high conversion gain and high dynamic range enable the use of lossy IF filters in high-selectivity receiver designs, while minimizing the total solution cost, board space and system-level variation. n High Dynamic Range Downconverting Mixer Family n n n n Wireless Infrastructure Receivers (LTE, WiMAX, WCS) Point-To-Point Microwave Links High Dynamic Range Downmixer Applications L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. PART# RF RANGE LO RANGE LTC5540 600MHz -1.3GHz 700MHz - 1.2GHz LTC5541 1.3GHz - 2.3GHz 1.4GHz - 2.0GHz LTC5542 1.6GHz - 2.7GHz 1.7GHz - 2.5GHz LTC5543 2.3GHz - 4GHz 2.4GHz - 3.6GHz TYPICAL APPLICATION Wideband Receiver 190MHz SAW 1nF VCCIF 3.3V or 5V 1F 22pF IF AMP 1nF 150nH 150nH + Wideband Conversion Gain, IIP3 and NF vs IF Output Frequency 190MHz BPF 9.0 ADC 2.7pF LTC5543 IF 1.2nH LNA LO2 RF ALTERNATE LO FOR FREQUENCY-HOPPING LO 0.8pF SYNTH 2 GC (dB) RF 2500MHz TO 2570MHz IMAGE BPF IIP3 fLO = 2725MHz 8.8 PLO = 0dBm RF = 2535 35MHz 8.7 TEST CIRCUIT IN FIGURE 1 8.6 22 20 18 8.5 8.4 16 GC 14 8.3 2.7pF SHDN (0V/3.3V) BIAS SHDN VCC2 VCC 3.3V 1F VCC1 22pF VCC3 LO1 LOSEL LO SELECT (0V/3.3V) 12 8.2 SYNTH 1 LO 2725MHz 5543 TA01 24 NF 8.1 8.0 155 IIP3 (dBm), SSB NF (dB) IF - IF 26 8.9 10 8 165 175 185 195 205 215 IF OUTPUT FREQUENCY (MHz) 6 225 5543 TA02 5543f 1 LTC5543 ABSOLUTE MAXIMUM RATINGS PIN CONFIGURATION (Note 1) IFGND GND IF- IFBIAS IF+ TOP VIEW Mixer Supply Voltage (VCC1, VCC2)...........................3.8V LO Switch Supply Voltage (VCC3).............................3.8V IF Supply Voltage (IF+, IF -) ......................................5.5V Shutdown Voltage (SHDN) ................-0.3V to VCC +0.3V LO Select Voltage (LOSEL)................-0.3V to VCC +0.3V LO1, LO2 Input Power (2GHz to 4GHz) ..................9dBm LO1, LO2 Input DC Voltage ....................................0.5V RF Input Power (2GHz to 4GHz) ...........................15dBm RF Input DC Voltage ............................................... 0.1V Operating Temperature Range .................-40C to 85C Storage Temperature Range .................. -65C to 150C Junction Temperature (TJ) .................................... 150C 20 19 18 17 16 15 LO2 NC 1 14 VCC3 RF 2 21 GND CT 3 13 GND 7 8 9 10 LOSEL GND 6 VCC1 11 LO1 VCC2 12 GND SHDN 5 LOBIAS GND 4 UH PACKAGE 20-LEAD (5mm s 5mm) PLASTIC QFN TJMAX = 150C, JA = 34C/W, JC = 3C/W EXPOSED PAD (PIN 21) IS GND, MUST BE SOLDERED TO PCB ORDER INFORMATION LEAD FREE FINISH TAPE AND REEL PART MARKING PACKAGE DESCRIPTION TEMPERATURE RANGE LTC5543IUH#PBF LTC5543IUH#TRPBF 5543 20-Lead (5mm x 5mm) Plastic QFN -40C to 85C Consult LTC Marketing for parts specified with wider operating temperature ranges. Consult LTC Marketing for information on non-standard lead based finish parts. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ AC ELECTRICAL CHARACTERISTICS VCC = 3.3V, VCCIF = 3.3V, SHDN = Low, TA = 25C, PLO = 0dBm, unless otherwise noted. Test circuit shown in Figure 1. (Notes 2, 3, 4) PARAMETER CONDITIONS MIN LO Input Frequency Range RF Input Frequency Range Low-Side LO High-Side LO TYP MAX UNITS 2400 to 3600 MHz 2400 to 4000 2200 to 3200 MHz MHz 5 to 600 MHz IF Output Frequency Range Requires External Matching RF Input Return Loss ZO = 50, 2200MHz to 3800MHz >12 dB LO Input Return Loss ZO = 50, 2400MHz to 3600MHz >12 dB IF Output Return Loss Requires External Matching >12 dB LO Input Power fLO = 2400MHz to 3600MHz -4 0 6 dBm LO to RF Leakage fLO = 2400MHz to 3600MHz <-28 dBm LO to IF Leakage fLO = 2400MHz to 3600MHz <-35 dBm LO Switch Isolation LO1 Selected, 2400MHz < fLO < 3600MHz LO2 Selected, 2400MHz < fLO < 3600MHz >44 >47 dB dB RF to LO Isolation fRF = 2200MHz to 4000MHz >37 dB RF to IF Isolation fRF = 2200MHz to 4000MHz >33 dB 5543f 2 LTC5543 AC ELECTRICAL CHARACTERISTICS VCC = 3.3V, VCCIF = 3.3V, SHDN = Low, TA = 25C, PLO = 0dBm, PRF = -3dBm (f = 2MHz for two-tone IIP3 tests),unless otherwise noted. Test circuit shown in Figure 1. (Notes 2, 3, 4) High-Side LO Downmixer Application: RF = 2300MHz to 2700MHz, IF = 190MHz, fLO = fRF +fIF PARAMETER CONDITIONS Conversion Gain RF = 2300MHz RF = 2500MHz RF = 2700MHz Conversion Gain Flatness RF = 2500 30MHz, LO = 2690MHz, IF=190 30MHz Conversion Gain vs Temperature TA = -40C to +85C, RF = 2500MHz Input 3rd Order Intercept RF = 2300MHz RF = 2500MHz RF = 2700MHz SSB Noise Figure MIN TYP 7.0 8.9 8.4 8.2 MAX dB 0.1 22.5 UNITS dB -0.007 dB/C 23.8 24.5 24.4 dBm RF = 2300MHz RF = 2500MHz RF = 2700MHz 9.9 10.2 10.4 SSB Noise Figure Under Blocking fRF = 2500MHz, fLO = 2690MHz, fBLOCK = 2300MHz, PBLOCK = 5dBm 17.5 dB 2LO - 2RF Output Spurious Product (fRF = fLO - fIF/2) fRF = 2595MHz at -10dBm, fLO = 2690MHz, fIF = 190MHz -61 dBc 3LO - 3RF Output Spurious Product (fRF = fLO - fIF/3) fRF = 2626.67MHz at -10dBm, fLO = 2690MHz, fIF = 190MHz -74 dBc Input 1dB Compression RF = 2500MHz, VCCIF = 3.3V RF = 2500MHz, VCCIF = 5V 10.9 13.9 dBm 11.9 dB Low-Side LO Downmixer Application: RF = 2400MHz to 3800MHz, IF = 190MHz, fLO = fRF -fIF PARAMETER CONDITIONS Conversion Gain RF = 2600MHz RF = 3300MHz RF = 3500MHz MIN TYP 5.3 8.9 7.1 6.7 MAX UNITS dB Conversion Gain Flatness RF = 3500MHz 30MHz, LO = 3310MHz, IF = 190 30MHz 0.15 dB Conversion Gain vs Temperature TA = -40C to 85C, RF = 3500MHz -0.004 dB/C Input 3rd Order Intercept RF = 2600MHz RF = 3300MHz RF = 3500MHz 24.7 25.6 25.1 dBm RF = 2600MHz RF = 3300MHz RF = 3500MHz 9.6 11.6 11.8 dB 2RF - 2LO Output Spurious Product (fRF = fLO + fIF/2) fRF = 3405MHz at -10dBm, fLO = 3310MHz fIF = 190MHz -50 dBc 3RF - 3LO Output Spurious Product (fRF = fLO + fIF/3) fRF = 3373.33MHz at -10dBm, fLO = 3310MHz fIF = 190MHz -77 dBc Input 1dB Compression RF = 3500MHz, VCCIF = 3.3V RF = 3500MHz, VCCIF = 5V 11.3 11.8 dBm SSB Noise Figure 22.5 5543f 3 LTC5543 DC ELECTRICAL CHARACTERISTICS VCC = 3.3V, VCCIF = 3.3V, SHDN = Low, TA = 25C, unless otherwise noted. Test circuit shown in Figure 1. (Note 2) PARAMETER CONDITIONS MIN TYP MAX UNITS VCC Supply Voltage (Pins 6, 8 and 14) 3.1 3.3 3.5 V VCCIF Supply Voltage (Pins 18 and 19) 3.1 3.3 5.3 V 99 102 201 116 122 238 mA 500 A Power Supply Requirements (VCC, VCCIF) VCC Supply Current (Pins 6 + 8 + 14) VCCIF Supply Current (Pins 18 + 19) Total Supply Current (VCC + VCCIF) Total Supply Current - Shutdown SHDN = High Shutdown Logic Input (SHDN) Low = On, High = Off SHDN Input High Voltage (Off) 3 V SHDN Input Low Voltage (On) -0.3V to VCC + 0.3V SHDN Input Current -20 0.3 V 30 A Turn On Time 1 s Turn Off Time 1.5 s LO Select Logic Input (LOSEL) Low = LO1 Selected, High = LO2 Selected LOSEL Input High Voltage 3 V LOSEL Input Low Voltage -0.3V to VCC + 0.3V LOSEL Input Current -20 LO Switching Time VCC Supply Current vs Supply Voltage (Mixer and LO Switch) 85C 220 104 85C 25C -40C 96 SUPPLY CURRENT(mA) SUPPLY CURRENT (mA) SUPPLY CURRENT(mA) 230 115 106 105 25C 95 85 94 3.4 3.2 3.3 3.5 VCC SUPPLY VOLTAGE (V) 3.6 5543 G01 75 3.0 3.3 210 VCC = 3.3V, VCCIF = 5V (DUAL SUPPLY) 200 VCC = VCCIF = 3.3V (SINGLE SUPPLY) 190 180 -40C 92 3.1 ns Total Supply Current vs Temperature (VCC + VCCIF) 125 108 90 3.0 A SHDN = Low, Test circuit shown in Figure 1. VCCIF Supply Current vs Supply Voltage (IF Amplifier) 110 98 30 Note 3: SSB Noise Figure measurements performed with a small-signal noise source, bandpass filter and 6dB matching pad on RF input, bandpass filter and 6dB matching pad on the LO input, and no other RF signals applied. Note 4: LO switch isolation is measured at the IF output port at the IF frequency with fLO1 and fLO2 offset by 2MHz. TYPICAL DC PERFORMANCE CHARACTERISTICS 100 V 50 Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The LTC5543 is guaranteed functional over the operating temperature range from -40C to 85C. 102 0.3 3.6 3.9 4.2 4.5 4.8 5.1 VCCIF SUPPLY VOLTAGE (V) 5.4 5543 G02 170 -45 -25 55 -5 15 35 TEMPERATURE (C) 75 95 5543 G03 5543f 4 LTC5543 TYPICAL AC PERFORMANCE CHARACTERISTICS High-Side LO VCC = 3.3V, VCCIF = 3.3V, SHDN = Low, TA = 25C, PLO = 0dBm, PRF = -3dBm (-3dBm/tone for two-tone IIP3 tests, f = 2MHz), IF = 190MHz, unless otherwise noted. Test circuit shown in Figure 1. Conversion Gain, IIP3 and NF vs RF Frequency LO Leakage vs LO Frequency 15 IIP3 13 IIP3 (dBm) NF 9 20 GC GC (dB), SSB NF (dB) 11 22 16 2.2 2.4 5 3.2 2.6 2.8 3.0 RF FREQUENCY (GHz) LO-RF LO-IF -40 -60 2.4 RF-LO 40 2.6 2.8 3.0 3.2 LO FREQUENCY (GHz) 3.4 30 2.2 2.4 2.6 2.8 3.0 3.2 3.4 3.6 3.8 4.0 RF FREQUENCY (GHz) 3.6 5543 G05 2300MHz Conversion Gain, IIP3 and NF vs LO Power 5543 G06 2500MHz Conversion Gain, IIP3 and NF vs LO Power 2700MHz Conversion Gain, IIP3 and NF vs LO Power 20 27 20 27 21 25 18 25 18 19 16 23 25 IIP3 23 17 10 15 8 13 6 11 GC 9 7 -6 -4 4 -2 0 2 LO INPUT POWER (dBm) 19 17 10 21 15 11 4 11 2 9 2 9 0 7 0 7 GC -6 -4 4 -2 0 2 LO INPUT POWER (dBm) 19 20 25 18 23 10 9 7 3.0 GC 8 20 25 18 23 85C 16 25C -40C 14 19 NF 17 12 10 15 13 8 RF = 2500MHz 6 VCC = VCCIF 11 RF = 2500MHz 6 VCC = 3.3V 4 9 3.5 3.1 3.2 3.3 3.4 VCC, VCCIF SUPPLY VOLTAGE (V) 2 3.6 5543 G10 1 -4 4 -2 0 2 LO INPUT POWER (dBm) 7 3.0 GC 3.3 4 3.6 3.9 4.2 4.5 4.8 5.1 VCCIF SUPPLY VOLTAGE (V) 6 Conversion Gain, IIP3 and RF Input P1dB vs Temperature 2 5.4 5543 G11 SSB NF (dB) 12 15 11 3 5543 G09 IIP3 21 SSB NF (dB) 17 NF 5 GC Conversion Gain, IIP3 and NF vs IF Supply Voltage (Dual Supply) 85C 16 25C -40C 14 13 7 -6 6 9 NF 13 5543 G08 GC (dB), IIP3 (dBm) 21 15 4 Conversion Gain, IIP3 and NF vs Supply Voltage (Single Supply) IIP3 11 6 5543 G07 23 17 21 13 6 25 8 NF 19 17 85C 25C 15 -40C 13 SSB NF (dB) NF 85C 25C 14 -40C 12 SSB NF (dB) 19 16 GC (dB), IIP3 (dBm) 21 SSB NF (dB) 85C 25C 14 -40C 12 IIP3 GC (dB), IIP3 (dBm), P1dB (dBm) IIP3 GC (dB), IIP3 (dBm) 27 23 GC (dB), IIP3 (dBm) 45 35 5543 G04 GC (dB), IIP3 (dBm) RF-IF 50 -50 7 18 55 -30 LO LEAKAGE (dBm) 24 RF Isolation vs RF Frequency -20 ISOLATION (dB) 26 IIP3 21 RF = 2500MHz VCCIF = 5.0V VCCIF = 3.3V 19 17 15 13 P1dB 11 9 GC 7 -45 -25 -5 15 35 55 TEMPERATURE (C) 75 95 5543 G12 5543f 5 LTC5543 TYPICAL AC PERFORMANCE CHARACTERISTICS High-Side LO (continued) VCC = 3.3V, VCCIF = 3.3V, SHDN = Low, TA = 25C, PLO = 0dBm, PRF = -3dBm (-3dBm/tone for two-tone IIP3 tests, f = 2MHz), IF = 190MHz, unless otherwise noted. Test circuit shown in Figure 1. 2-Tone IF Output Power, IM3 and IM5 vs RF Input Power 20 IFOUT 10 (RF = 2500MHz) IFOUT RF1 = 2499MHz RF2 = 2501MHz LO = 2690MHz -10 0 -20 -30 -40 -50 -60 -10 LO = 2690MHz -20 -30 2LO-2RF (RF = 2595MHz) -40 -50 3LO-3RF (RF = 2626.67MHz) -60 IM3 -70 -9 -6 -3 0 3 RF INPUT POWER (dBm/TONE) 3 6 9 -6 -3 0 RF INPUT POWER (dBm) 12 50 15 14 PLO = 0dBm 12 46 44 40 2.4 5 53 30 RF = 2500MHz 25 DISTRIBUTION (%) 20 15 10 2.6 2.8 3.0 3.2 LO FREQUENCY (GHz) 3.4 LOSEL = HIGH 3.6 8.2 8.4 8.6 CONVERSION GAIN (dB) 8.8 5543 G18a 2.6 2.8 3.0 3.2 LO FREQUENCY (GHz) 3.4 85C 25C -40C 5543 G18 25 RF = 2500MHz 20 20 15 10 0 22.9 3.6 SSB NF Distribution 85C 25C -40C RF = 2500MHz 15 10 5 5 5 8.0 49 IIP3 Distribution 25 0 7.8 51 45 2.4 DISTRIBUTION (%) 85C 25C -40C 85C 25C -40C 5543 G17 Conversion Gain Distribution 30 6 47 5543 G16 DISTRIBUTION (%) 55 LOSEL = LOW PLO = 3dBm 35 4 -2 0 2 LO INPUT POWER (dBm) LO Switch Isolation vs LO Frequency-LO2 Selected 42 0 -20 -15 -10 -5 RF BLOCKER POWER (dBm) -4 5543 G15 ISOLATION (dB) ISOLATION (dB) SSB NF (dB) PLO = -3dBm 10 -25 3LO-3RF (RF = 2626.67MHz) -6 15 85C 25C -40C 48 17 11 -70 LO Switch Isolation vs LO Frequency-LO1 Selected 18 13 -65 5543 G14 RF = 2500MHz BLOCKER = 2300MHz 16 2LO-2RF (RF = 2595MHz) -60 -80 -80 -12 -9 6 SSB Noise Figure vs RF Blocker Level 19 -55 -75 5543 G13 20 RF = 2500MHz LO = 2690MHz PRF = -10dBm -70 IM5 -80 -12 RELATIVE SPUR LEVEL (dBc) 0 -50 20 OUTPUT POWER (dBm) OUTPUT POWER/TONE (dBm) 10 2 x 2 and 3 x 3 Spurs vs LO Power Single-Tone IF Output Power, 2 x 2 and 3 x 3 Spurs vs RF Input Power 23.3 23.7 24.1 IIP3 (dBm) 24.5 25.3 5543 G18b 0 8.2 8.6 9.0 9.4 9.8 10.2 10.6 11.0 11.4 SSB NOISE FIGURE (dB) 5543 G18c 5543f 6 LTC5543 TYPICAL AC PERFORMANCE CHARACTERISTICS Low-Side LO VCC = 3.3V, VCCIF = 3.3V, SHDN = Low, TA = 25C, PLO = 0dBm, PRF = -3dBm (-3dBm/tone for two-tone IIP3 tests, f = 2MHz), IF = 190MHz, unless otherwise noted. Test circuit shown in Figure 1. 2600MHz Conversion Gain, IIP3 and RF Input P1dB vs Temperature Conversion Gain, IIP3 and NF vs RF Frequency 16 25 IIP3 12 22 NF 10 20 8 GC 16 2.4 2.6 21 17 15 13 P1dB 11 6 4.0 3.8 RF = 2600MHz VCCIF = 5.0V VCCIF = 3.3V 19 9 2.8 3 3.2 3.4 3.6 RF FREQUENCY (GHz) 25 7 -45 55 -5 15 35 TEMPERATURE (C) 75 16 8 14 85C 6 25C -40C 4 12 GC 8 -6 -4 4 -2 0 2 LO INPUT POWER (dBm) 20 NF 18 12 16 10 14 8 8 0 6 85C 6 25C -40C 4 GC -6 6 -4 4 -2 0 2 LO INPUT POWER (dBm) 18 12 16 10 12 10 2 8 0 6 2 0 -4 4 -2 0 2 LO INPUT POWER (dBm) 0 2 x 2 and 3 x 3 Spur Suppression vs LO Power -40 -50 -60 -30 LO = 3310MHz 2RF-2LO (RF = 3405MHz) -40 -50 -60 IM5 -80 -70 -90 -12 -80 -12 -9 6 5543 G24 RF = 3500MHz LO = 3310MHz PRF = -10dBm -45 -10 -20 6 5543 G23 IFOUT 10 (RF = 3500MHz) 3 -9 -6 -3 0 RF INPUT POWER (dBm/TONE) GC -6 6 20 IM3 8 85C 6 25C -40C 4 14 Single-Tone IF Output Power, 2 x 2 and 3 x 3 Spurs vs RF Input Power IFOUT 14 NF 5543 G22b OUTPUT POWER (dBm) OUTPUT POWER/TONE (dBm) 16 14 12 95 18 20 10 -20 RF1 = 3499MHz RF2 = 3501MHz -30 LO = 3310MHz -40 75 20 22 2 -10 55 -5 15 35 TEMPERATURE (C) 26 16 20 -70 -25 20 18 IIP3 2-Tone IF Output Power, IM3 and IM5 vs RF Input Power 0 GC 3500MHz Conversion Gain, IIP3 and NF vs LO Power 22 5543 G22 10 9 5543 G21 RELATIVE SPUR LEVEL (dBc) 10 GC (dB), IIP3 (dBm) 10 P1dB 11 SSB NF (dB) 18 13 95 SSB NF (dB) 12 SSB NF (dB) GC (dB), IIP3 (dBm) 14 NF 15 24 IIP3 24 16 20 17 -25 26 18 22 RF = 3500MHz VCCIF = 5.0V VCCIF = 3.3V 19 5 -45 3300MHz Conversion Gain, IIP3 and NF vs LO Power 24 21 5543 G20 2600MHz Conversion Gain, IIP3 and NF vs LO Power IIP3 IIP3 7 5543 G19 26 23 GC GC (dB), IIP3 (dBm) 18 GC (dB), SSB NF (dB) IIP3 (dBm) GC (dB), IIP3 (dBm), P1dB (dBm) 23 14 24 27 IIP3 GC (dB), IIP3 (dBm), P1dB (dBm) 26 3500MHz Conversion Gain, IIP3 and RF Input P1dB vs Temperature 3RF-3LO (RF = 3373.33MHz) -50 -55 2RF-2LO (RF = 3405MHz) -60 -65 -70 3RF-3LO (RF = 3373.33MHz) -75 -80 3 6 9 -6 -3 0 RF INPUT POWER (dBm) 12 15 5543 G25 -6 -4 -2 0 2 4 LO INPUT POWER (dBm) 6 5543 G26 5543f 7 LTC5543 PIN FUNCTIONS NC (Pin 1): This pin is not connected internally. It can be left floating, connected to ground or to VCC . LOBIAS (Pin 7): This Pin Allows Adjustment of the LO Buffer Current. Typical DC voltage is 2.2V. RF (Pin 2): Single-Ended Input for the RF Signal. This pin is internally connected to the primary side of the RF input transformer, which has low DC resistance to ground. A series DC-blocking capacitor should be used to avoid damage to the integrated transformer. The RF input is impedance matched, as long as the selected LO input is driven with a 0dBm 6dB source between 2.4GHz and 3.6GHz. LOSEL (Pin 9): LO1/LO2 Select Pin. When the input voltage is less than 0.3V, the LO1 port is selected. When the input voltage is greater than 3V, the LO2 port is selected. Typical input current is 11A for LOSEL = 3.3V. This pin must not be allowed to float. CT (Pin 3): RF Transformer Secondary Center-Tap. This pin may require a bypass capacitor to ground. See the Applications Information section. This pin has an internally generated bias voltage of 1.2V. It must be DC-isolated from ground and VCC. GND (Pins 4, 10, 12, 13, 17, Exposed Pad Pin 21): Ground. These pins must be soldered to the RF ground plane on the circuit board. The exposed pad metal of the package provides both electrical contact to ground and good thermal contact to the printed circuit board. SHDN (Pin 5): Shutdown Pin. When the input voltage is less than 0.3V, the internal circuits supplied through pins 6, 8, 14, 18 and 19 are enabled. When the input voltage is greater than 3V, all circuits are disabled. Typical input current is less than 10A. This pin must not be allowed to float. VCC2 (Pin 6) and VCC1 (Pin 8): Power Supply Pins for the LO Buffer and Bias Circuits. These pins are internally connected and must be externally connected to a regulated 3.3V supply, with bypass capacitors located close to the pin. Typical current consumption is 99mA. LO1 (Pin 11) and LO2 (Pin 15): Single-Ended Inputs for the Local Oscillators. These pins are internally biased at 0V and require external DC blocking capacitors. Both inputs are internally matched to 50, even when the chip is disabled (SHDN = high). VCC3 (Pin 14): Power Supply Pin for the LO Switch. This pin must be connected to a regulated 3.3V supply and bypassed to ground with a capacitor near the pin. Typical DC current consumption is less than 100A. IFGND (Pin 16): DC Ground Return for the IF Amplifier. This pin must be connected to ground to complete the IF amplifier's DC current path. Typical DC current is 102mA. IF - (Pin 18) and IF + (Pin 19): Open-Collector Differential Outputs for the IF Amplifier. These pins must be connected to a DC supply through impedance matching inductors, or a transformer center-tap. Typical DC current consumption is 51mA into each pin. IFBIAS (Pin 20): This Pin Allows Adjustment of the IF Amplifier Current. Typical DC voltage is 2.1V. 5543f 8 LTC5543 BLOCK DIAGRAM 20 19 18 IF+ IFBIAS 21 16 IF - EXPOSED PAD IFGND IF AMP 2 3 5 LO2 15 VCC3 14 RF LO AMP LOSEL PASSIVE MIXER CT SHDN 9 LO1 11 BIAS VCC2 VCC1 6 8 7 LOBIAS GND PINS ARE NOT SHOWN 5541 BD TEST CIRCUIT L1 VCCIF 3.1V TO 5.3V 102mA C9 C10 IF (MHz) L1, L2 (nH) L2 140 270 190 150 240 100 305 56 380 39 456 24 C8 20 RFIN 50 L1, L2 vs IF Frequencies IFOUT 190MHz 50 4:1 T1 19 18 17 16 IFBIAS IF+ IF - GND IFGND 1 NC LO2 15 2 RF VCC3 14 C4 LO2IN 50 L4 REF DES VALUE SIZE COMMENTS C3, C4 2.7pF 0402 AVX GND 13 C6, C7, C8 22pF 0402 AVX GND 12 C5, C9 1F 0603 AVX C10 1000pF 0402 AVX C11 0.8pF 0402 AVX L1, L2 150nH 0603 Coilcraft 0603CS L4 1.2nH 0402 Toko LL1005-FH T1 (Alternate) TC4-1W-7ALN+ (WBC4-6TLB) C11 C7 LTC5543 3 CT 4 GND C3 SHDN (0V/3.3V) 5 SHDN VCC2 LOBIAS 7 6 VCC 3.1V TO 3.5V 99 mA C5 0.015" 0.062" 0.015" VCC1 LOSEL 9 8 LO1IN 50 LO1 11 GND 10 5541 TC C6 LOSEL (0V/3.3V) Mini-Circuits (Coilcraft) RF GND DC1431A BOARD BIAS STACK-UP GND (NELCO N4000-13) Figure 1. Standard Downmixer Test Circuit Schematic (190MHz IF) 5543f 9 LTC5543 APPLICATIONS INFORMATION Introduction The LTC5543 consists of a high linearity passive doublebalanced mixer core, IF buffer amplifier, high speed singlepole double-throw (SPDT) LO switch, LO buffer amplifier and bias/shutdown circuits. See Block Diagram section for a description of each pin function. The RF and LO inputs are single-ended. The IF output is differential. Low-side or high-side LO injection can be used. The evaluation circuit, shown in Figure 1, utilizes bandpass IF output matching and an IF transformer to realize a 50 single-ended IF output. The evaluation board layout is shown in Figure 2. applications. When used, C2 should be located within 2mm of pin 3 for proper high-frequency decoupling. The nominal DC voltage on the CT pin is 1.2V. For the RF input to be matched, the selected LO input must be driven. A broadband input match is realized with L4 = 1.2nH and C11 = 0.8pF. The measured RF input return loss is shown in Figure 4 for LO frequencies of 2.6GHz, 3.0GHz and 3.4GHz. These LO frequencies correspond to the lower, middle and upper values of the LO range. As shown in Figure 4, the RF input impedance is somewhat dependent on LO frequency. TO MIXER RFIN L4 2 RF C11 3 CT C2 LTC5543 5543 F03 Figure 3. RF Input Schematic 5543 F02 Figure 2. Evaluation Board Layout 0 The mixer's RF input, shown in Figure 3, is connected to the primary winding of an integrated transformer. A 50 match is realized with a series inductor (L4) and a shunt capacitor (C11). The primary side of the RF transformer is DC-grounded internally and the DC resistance of the primary is approximately 3.2. A DC blocking capacitor is needed if the RF source has DC voltage present. The secondary winding of the RF transformer is internally connected to the passive mixer. The center-tap of the transformer secondary is connected to pin 3 (CT) to allow the connection of bypass capacitor, C2. The value of C2 is LO frequency-dependent and is not required for most RF PORT RETURN LOSS (dB) RF Input 5 LO = 2.6GHz LO = 3.0GHz LO = 3.4GHz 10 15 20 25 30 35 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6 3.8 4 FREQUENCY (GHz) 5543 F04 Figure 4. RF Input Return Loss 5543f 10 LTC5543 APPLICATIONS INFORMATION The RF input impedance and input reflection coefficient, versus RF frequency, is listed in Table 1. The reference plane for this data is pin 2 of the IC, with no external matching, and the LO is driven at 2.69GHz. Table 1. RF Input Impedance and S11 (at Pin 2, No External Matching, LO Input Driven at 2.69GHz) S11 The LO switch is designed for high isolation and fast (<50ns) switching. This allows the use of two active synthesizers in frequency-hopping applications. If only one synthesizer is used, then the unused LO input may be grounded. The LO switch is powered by VCC3 (Pin 14) and controlled by the LOSEL logic input (Pin 9). The LO1 and LO2 inputs are always 50-matched when VCC is applied to the chip, even when the chip is shutdown. The DC resistance of the selected LO input is approximately 20 and the unselected input is approximately 50. A logic table for the LO switch is shown in Table 2. Measured LO input return loss is shown in Figure 6. FREQUENCY (GHz) INPUT IMPEDANCE MAG ANGLE 2.0 44.6 + j14.7 0.16 101.3 2.2 41.0 + j11.9 0.16 119.7 2.4 37.7 + j10.7 0.18 132.0 2.6 31.7 + j9.4 0.25 146.2 2.8 26.2 + j18.8 0.38 127.8 3.0 28.3 + j22.4 0.38 118.1 LOSEL ACTIVE LO INPUT 3.2 28.2 + j24.5 0.40 114.3 Low LO1 3.4 27.7 + j27.8 0.43 109.0 High LO2 3.6 28.7 + j31.2 0.46 102.7 3.8 29.9 + j32.8 0.45 99.2 4.0 30.4 + j33.4 0.44 97.8 LTC5543 LO2 C4 LO2IN 15 LO BUFFER VCC3 14 TO MIXER Table 2. LO Switch Logic Table The LO amplifiers are powered by VCC1 and VCC2 (pin 8 and pin 6). When the chip is enabled (SHDN = low), the internal bias circuit provides a regulated 4mA current to the amplifier's bias input, which in turn causes the amplifiers to draw approximately 90mA of DC current. This 4mA reference current is also connected to LOBIAS (Pin 7) to allow modification of the amplifier's DC bias current for special applications. The recommended application circuits require no LO amplifier bias modification, so this pin should be left open-circuited. 0 BIAS 7 LOBIAS 6 VCC2 8 VCC1 9 2 C3 LO1IN LOSEL 5543 F05 Figure 5. LO Input Schematic LO Inputs The mixer's LO input circuit, shown in Figure 5, consists of an integrated SPDT switch, a balun transformer, and a two-stage high-speed limiting differential amplifier to drive the mixer core. The LTC5543's LO amplifiers are optimized for the 2.4GHz to 3.6GHz LO frequency range. LO frequencies above or below this frequency range may be used with degraded performance. 4 RETURN LOSS (dB) LO1 11 4mA 6 8 10 12 SELECTED 14 16 NOT SELECTED OR SHUTDOWN 18 20 22 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6 LO FREQUENCY (GHz) 3.8 5543 F06 Figure 6. LO Input Return loss 5543f 11 LTC5543 APPLICATIONS INFORMATION The nominal LO input level is 0dBm although the limiting amplifiers will deliver excellent performance over a 6dB input power range. LO input power greater than 6dBm may cause conduction of the internal ESD diodes. Series capacitors C3 and C4 optimize the input match and provide DC blocking. T1 C10 R1 (OPTION TO REDUCE DC POWER) IFBIAS The LO1 input impedance and input reflection coefficient, versus frequency, is shown in Table 3. The LO2 port is identical due to the symmetric device layout and packaging. IFOUT 4:1 20 L1 L2 VCCIF 102mA L3 (OR SHORT) C8 19 IF+ IF - 18 16 IFGND VCC IF AMP 4mA Table 3. LO1 Input Impedance vs Frequency (at Pin 11, No External Matching, LOSEL = Low) LTC5543 BIAS S11 FREQUENCY (GHz) INPUT IMPEDANCE MAG ANGLE 2.0 28.9 + j3.6 0.27 167.7 2.2 30.8 + j8.7 0.26 149.5 2.4 33.4 + j11.7 0.24 136.8 2.6 34.6 + j13.7 0.24 129.1 2.8 35.3 + j16.2 0.25 121.5 3.0 36.0 + j18.8 0.27 114.3 3.2 37.2 + j22.1 0.28 105.9 3.4 38.7 + j24.6 0.30 99.2 3.6 39.4 + j26.9 0.31 94.8 3.8 39.7 + j29.1 0.33 91.5 4.0 39.6 + j32.4 0.36 87.9 IF Output The IF amplifier, shown in Figure 7, has differential opencollector outputs (IF+ and IF -), a DC ground return pin (IFGND), and a pin for modifying the internal bias (IFBIAS). The IF outputs must be biased at the supply voltage (VCCIF), which is applied through matching inductors L1 and L2. Alternatively, the IF outputs can be biased through the center tap of a transformer. The common node of L1 and L2 can be connected to the center tap of the transformer. Each IF output pin draws approximately 51mA of DC supply current (102mA total). IFGND (pin 16) must be grounded or the amplifier will not draw DC current. Grounding through inductor L3 may improve LO-IF and RF-IF leakage performance in some applications, but is otherwise not necessary. High DC resistance in L3 will reduce the IF amplifier supply current, which will degrade RF performance. 5543 F07 Figure 7. IF Amplifier Schematic with Transformer-Based Bandpass Match For optimum single-ended performance, the differential IF outputs must be combined through an external IF transformer or discrete IF balun circuit. The evaluation board (see Figures 1 and 2) uses a 4:1 ratio IF transformer for impedance transformation and differential to singleended transformation. It is also possible to eliminate the IF transformer and drive differential filters or amplifiers directly. The IF output impedance can be modeled as 320 in parallel with 2.4pF at IF frequencies. An equivalent smallsignal model (including bondwire inductance) is shown in Figure 8. Frequency-dependent differential IF output impedance is listed in Table 4. This data is referenced to the package pins (with no external components) and includes the effects of IC and package parasitics. 19 18 IF+ 0.9nH IF - 0.9nH RIF CIF LTC5543 5543 F08 Figure 8. IF Output Small-Signal Model 5543f 12 LTC5543 APPLICATIONS INFORMATION Transformer-Based Bandpass IF Matching Discrete IF Balun Matching The IF output can be matched for IF frequencies as low as 90MHz or as high as 500MHz using the bandpass IF matching shown in Figure 1 and Figure 7. L1 and L2 resonate with the internal IF output capacitance at the desired IF frequency. The value of L1, L2 is calculated as follows: For many applications, it is possible to replace the IF Transformer with the discrete IF Balun shown in Figure 10. The values of L5, L6, C13 and C14 are calculated to realize a 180 phase shift at the desired IF frequency and provide a 50 single-ended output, using the equations listed below. Inductor L7 is used to cancel the internal capacitance CIF and supplies bias voltage to the IF pin. C15 is a DC blocking capacitor. L1, L2 = 1/[(2 fIF)2 * 2 * CIF] where CIF is the internal IF capacitance (listed in Table 4). RIF * ROUT Values of L1 and L2 are tabulated in Figure 1 for various IF frequencies. L 5, L 6 = Table 4. IF Output Impedance vs Frequency C13, C14 = FREQUENCY (MHz) DIFFERENTIAL OUTPUT IMPEDANCE (RIF || XIF (CIF)) 90 348 || -j680 (2.6pF) 140 335 || -j455 (2.5pF) 190 324 || -j349 (2.4pF) 240 320 || -j276 (2.4pF) 300 315 || -j221 (2.4pF) 380 310 || -j182 (2.3pF) 456 302 || -j145 (2.4pF) The typical performance of the LTC5543 using transformerbased bandpass IF matching at 305MHz output frequency is shown in Figure 9. The values of L1 and L2 are 56nH as shown in Figure 1. IF 1 IF * RIF * ROUT L7 = |XIF | IF These equations give a good starting point, but it is usually necessary to adjust the component values after building and testing the circuit. The final solution can be achieved with less iteration by considering the parasitics of L7 in the above calculation. The typical performance of the LTC5543 using a 456MHz discrete IF Balun is shown in Figure 11. The actual component values are: L5, L6 = 36nH, L7 = 48nH and C13, C14 = 3.3pF IFOUT 12 27 C15 IIP3 VCCIF = 3.3V VCCIF = 5.0V 8 23 GC (dB) IIP3 (dBm) L5 10 25 R1 (OPTION TO REDUCE DC POWER) C14 C13 L6 VCCIF L7 102mA L3 (OR SHORT) GC 6 21 IFBIAS 20 19 IF+ IF - 18 16 IFGND IF = 305MHz LOW-SIDE LO 19 2.5 2.7 2.9 3.1 3.3 3.5 3.7 RF FREQUENCY (GHz) 4 3.9 4.1 VCC IF AMP 5543 F09 4mA Figure 9. Conversion Gain and IIP3 vs RF Frequency Using Transformer-Based IF Matching BIAS LTC5543 5543 F10 Figure 10. IF Amplifier Schematic with Discrete IF Balun 5543f 13 LTC5543 APPLICATIONS INFORMATION 29 14 Table 5. Performance Comparison with VCCIF = 3.3V and 5V (RF = 2500MHz, High-Side LO, IF = 190MHz) IIP3 27 IIP3 (dBm) VCCIF = 3.3V VCCIF = 5.0V 23 VCCIF (V) ICCIF (mA) GC (dB) P1dB (dBm) IIP3 (dBm) NF (dB) 10 3.3 102 8.4 10.9 24.5 10.2 5 105 8.4 13.9 24.5 10.3 GC (dB) 25 12 8 GC 21 6 IF = 456MHz LOW-SIDE LO 19 2.6 2.8 3 3.2 3.4 3.6 3.8 RF FREQUENCY (GHz) 4 4.2 4 5543 F11 Figure 11. Conversion Gain and IIp3 vs RF Frequency Using a 456MHz Discrete IF Balun Measured IF output return losses for transformer-based bandpass IF matching (190MHz and 305MHz IF frequency) and discrete Balun IF matching (456MHz IF frequency) are plotted in Figure 12. IF PORT RETURN LOSS (dB) 0 Table 6. Mixer Performance with Reduced IF Amplifier Current (RF = 2500MHz, High-Side LO, IF = 190MHz, VCC = VCCIF = 3.3V) 5 10 15 The IFBIAS pin (pin 20) is available for reducing the DC current consumption of the IF amplifier, at the expense of reduced performance. This pin should be left open-circuited for optimum performance. The internal bias circuit produces a 4mA reference for the IF amplifier, which causes the amplifier to draw approximately 102mA. If resistor R1 is connected to pin 20 as shown in Figure 7, a portion of the reference current can be shunted to ground, resulting in reduced IF amplifier current. For example, R1 = 1k will shunt away 1.5mA from pin 20 and the IF amplifier current will be reduced by 38% to approximately 62mA. The nominal, open-circuit DC voltage at pin 20 is 2.1V. Table 6 lists RF performance at 2500MHz versus IF amplifier current. 190MHz IF 20 25 456MHz IF 305MHz IF (DISCRETE BALUN) 30 140 180 220 260 300 340 380 420 460 500 540 IF FREQUENCY (MHz) R1 (k) ICCIF (mA) GC (dB) IIP3 (dBm) P1dB (dBm) NF (dB) OPEN 102 8.4 24.5 10.9 10.2 4.7 90 8.3 24.1 11 10.1 2.2 81 8.1 23.5 11 10.2 1 62 7.7 21.6 11 10.2 (RF = 3500MHz, Low-Side LO, IF = 190MHz, VCC = VCCIF = 3.3V) R1 (k) ICCIF (mA) OPEN 100 6.7 25.1 11.3 11.8 4.7 90 6.4 24.7 11.4 11.7 2.2 82 6.1 24.2 11.5 11.8 1 64 5.3 23.2 11.4 12.1 GC (dB) IIP3 (dBm) P1dB (dBm) NF (dB) 5543 F12 Figure 12. IF Output Return Loss IF Amplifier Bias The IF amplifier delivers excellent performance with VCCIF = 3.3V, which allows the VCC and VCCIF supplies to be common. With VCCIF increased to 5V, the RF input P1dB increases by more than 3dB, at the expense of higher power consumption. Mixer performance at 2500MHz is shown in Table 5 with VCCIF = 3.3V and 5V. For the highest conversion gain, high-Q wire-wound chip inductors are recommended for L1 and L2, especially when using VCCIF = 3.3V. Low-cost multilayer chip inductors may be substituted, with a slight degradation in performance. Shutdown Interface Figure 13 shows a simplified schematic of the SHDN pin interface. To disable the chip, the SHDN voltage must be higher than 3.0V. If the shutdown function is not required, the SHDN pin should be connected directly to GND. The voltage at the SHDN pin should never exceed the power supply voltage (VCC) by more than 0.3V. If this should occur, the supply current could be sourced through the ESD diode, potentially damaging the IC. 5543f 14 LTC5543 APPLICATIONS INFORMATION The SHDN pin must be pulled high or low. If left floating, then the on/off state of the IC will be indeterminate. If a three-state condition can exist at the SHDN pin, then a pull-up or pull-down resistor must be used. LTC5543 VCC2 6 SHDN 500 5 Supply Voltage Ramping Fast ramping of the supply voltage can cause a current glitch in the internal ESD protection circuits. Depending on the supply inductance, this could result in a supply voltage transient that exceeds the maximum rating. A supply voltage ramp time of greater than 1ms is recommended. 5543 F13 Figure 13. Shutdown Input Circuit PACKAGE DESCRIPTION UH Package 20-Lead Plastic QFN (5mm x 5mm) (Reference LTC DWG # 05-08-1818 Rev O) 0.70 p0.05 5.50 p 0.05 4.10 p 0.05 2.60 REF 2.70 p 0.05 2.70 p 0.05 PACKAGE OUTLINE 0.25 p0.05 0.65 BSC PIN 1 NOTCH R = 0.30 TYP OR 0.35 s 45o CHAMFER RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED 0.75 p 0.05 5.00 p 0.10 R = 0.05 TYP R = 0.125 TYP 19 20 0.40 p 0.10 PIN 1 TOP MARK (NOTE 6) 1 2 2.70 p 0.10 2.60 REF 5.00 p 0.10 2.70 p 0.10 (UH20) QFN 0208 REV O 0.25 p 0.05 0.200 REF 0.00 - 0.05 NOTE: 1. DRAWING IS NOT A JEDEC PACKAGE OUTLINE 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.20mm ON ANY SIDE 0.65 BSC BOTTOM VIEW--EXPOSED PAD 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 5543f Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 15 LTC5543 RELATED PARTS PART NUMBER Infrastructure LT(R)5514 LT5517 LT5521 LT5522 LT5527 LTC6400-X LTC6401-X LTC6416 LTC6412 LT5554 LT5557 DESCRIPTION COMMENTS Ultralow Distortion, IF Amplifier/ADC Driver with Digitally Controlled Gain 40MHz to 900MHz Quadrature Demodulator 10MHz to 3700MHz High Linearity Upconverting Mixer 400MHz to 2.7GHz High Signal Level Downconverting Mixer 400MHz to 3.7GHz, 5V Downconverting Mixer 300MHz Low Distortion IF Amp/ADC Driver 140MHz Low Distortion IF Amp/ADC Driver 2GHz 16-Bit ADC Buffer 31dB Linear Analog VGA Ultralow Distort IF Digital VGA 400MHz to 3.8GHz 3.3V Downconverting Mixer 850MHz Bandwidth, 47dBm OIP3 at 100MHz, 10.5dB to 33dB Gain Control Range LT5560 LT5568 Ultra-Low Power Active Mixer 700MHz to 1050MHz High Linearity Direct Quadrature Modulator LT5572 1.5GHz to 2.5GHz High Linearity Direct Quadrature Modulator LT5575 700MHz to 2.7GHz Direct Conversion I/Q Demodulator LT5578 400MHz to 2.7GHz High Linearty Upconverting Mixer LT5579 1.5GHz to 3.8GHz High Linearity Upconverting Mixer LTC5598 5MHz to 1.6GHz I/Q Modulator RF Power Detectors LTC5505 RF Power Detectors with >40dB Dynamic Range LTC5532 300MHz to 7GHz Precision RF Power Detector LT5534 50MHz to 3GHz Log RF Power Detector with 60dB Dynamic Range LTC5536 Precision 600MHz to 7GHz RF Power Detector with Fast Comparator Output LT5537 Wide Dynamic Range Log RF/IF Detector LT5570 2.7GHz Mean-Squared Detector LT5581 ADCs LTC2208 LTC2262-14 LTC2242-12 6GHz Low Power RMS Detector 16-Bit, 130Msps ADC 14-Bit, 150Msps ADC Ultralow Power at 1.8V Supply 12-Bit, 250Msps ADC 21dBm IIP3, Integrated LO Quadrature Generator 24.2dBm IIP3 at 1.95GHz, NF = 12.5dB, 3.15V to 5.25V Supply, Single-Ended LO Port Operation 4.5V to 5.25V Supply, 25dBm IIP3 at 900MHz, NF = 12.5dB, 50 Single-Ended RF and LO Ports 2.3dB Conversion Gain, 23.5dBm IIP3 and 12.5dB NF at 1900MHz, 5V/78mA Supply Fixed Gain of 8dB, 14dB, 20dB and 26dB; >36dBm OIP3 at 300MHz, Differential I/O Fixed Gain of 8dB, 14dB, 20dB and 26dB; >40dBm OIP3 at 140MHz, Differential I/O 40.25dBm OIP3 to 300MHz, Programmable Fast Recovery Output Clamping 35dBm OIP3 at 240MHz, Continuous Gain Range -14dB to 17dB 48dBm OIP3 at 200MHz, 2dB to 18dB Gain Range, 0.125dB Gain Steps 2.9dB Conversion Gain, 24.7dBm IIP3 and 11.7dB NF at 1950MHz, 3.3V/82mA Supply 10mA Supply Current, 10dBm IIP3, 10dB NF, Usable as Up- or Down-Converter. 22.9dBm OIP3 at 850MHz, -160.3dBm/Hz Noise Floor, 50, 0.5VDC Baseband Interface, 3-Ch CDMA2000 ACPR = -71.4dBc at 850MHz 21.6dBm OIP3 at 2GHz, -158.6dBm/Hz Noise Floor, High-Ohmic 0.5VDC Baseband Interface, 4-Ch W-CDMA ACPR = -67.7dBc at 2.14GHz Integrated Baluns, 28dBm IIP3, 13dBm P1dB, 0.03dB I/Q Amplitude Match, 0.4 Phase Match 27dBm OIP3 at 900MHz, 24.2dBm at 1.95GHz, Integrated RF Transformer 27.3dBm OIP3 at 2.14GHz, NF = 9.9dB, 3.3V Supply, Single-Ended LO and RF Ports 27.7dBm OIP3 at 140MHz, 22.9dBm at 900MHz, -161.2dBm/Hz Noise Floor 300MHz to 3GHz, Temperature Compensated, 2.7V to 6V Supply Precision VOUT Offset Control, Adjustable Gain and Offset 1dB Output Variation over Temperature, 38ns Response Time, Log Linear Response 25ns Response Time, Comparator Reference Input, Latch Enable Input, -26dBm to +12dBm Input Range Low Frequency to 1GHz, 83dB Log Linear Dynamic Range 0.5dB Accuracy Over Temperature and >50dB Dynamic Range, Fast 500ns Rise Time 40dB Dynamic Range, 1dB Accuracy Over Temperature, 1.5mA Supply Current 78dBFS Noise Floor, >83dB SFDR at 250MHz 72.8dB SNR, 88dB SFDR, 149mW Power Consumption 65.4dB SNR, 78dB SFDR, 740mW Power Consumption 5543f 16 Linear Technology Corporation LT 0110 * PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 FAX: (408) 434-0507 www.linear.com (c) LINEAR TECHNOLOGY CORPORATION 2010