MP1474 High-Efficiency, 2A, 16V, 500kHz Synchronous, Step-Down Converter The Future of Analog IC Technology DESCRIPTION FEATURES The MP1474 is a high-frequency, synchronous, rectified, step-down, switch-mode converter with built-in power MOSFETs. It offers a very compact solution to achieve a 2A continuous output current with excellent load and line regulation over a wide input supply range. The MP1474 has synchronous mode operation for higher efficiency over the output current load range. Current-mode operation provides fast transient response and eases loop stabilization. Full protection features include over-current protection and thermal shut down. The MP1474 requires a minimal number of readily-available standard external components, and is available in a space-saving 8-pin TSOT23 package. Wide 4.5V-to-16V Operating Input Range 100m/40m Low RDS(ON) Internal Power MOSFETs High-Efficiency Synchronous Mode Operation Fixed 500kHz Switching Frequency Synchronizes from a 200kHz-to-2MHz External Clock Power-Save Mode at Light Load Internal Soft-Start Power Good Indicator OCP Protection and Hiccup Thermal Shutdown Output Adjustable from 0.8V Available in an 8-pin TSOT-23 Package APPLICATIONS Notebook Systems and I/O Power Digital Set-Top Boxes Flat-Panel Television and Monitors Distributed Power Systems All MPS parts are lead-free and adhere to the RoHS directive. For MPS green status, please visit MPS website under Quality Assurance. "MPS" and "The Future of Analog IC Technology" are Registered Trademarks of Monolithic Power Systems, Inc. TYPICAL APPLICATION 4.5V-16V VIN 2 IN C1 22 EN/ SYNC 7 R5 100k MP1474 Rev. 1.0 9/26/2012 EN/SYNC SW VCC FB 1 PG GND 4 5 100 C4 MP1474 6 C5 0.1 BST Efficiency vs. Output Current R3 20 95 3 3.3V/2A R6 16k 90 85 L1 8 VOUT=3.3V, IOUT=0.01A-2A C2 47 R1 40.2k 80 75 70 VIN=5V VIN=12V VIN=16V 65 R2 13k 60 55 50 0.0 0.4 0.8 1.2 1.6 OUTPUT CURRENT (A) www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. (c) 2012 MPS. All Rights Reserved. 2.0 1 MP1474 - SYNCHRONOUS STEP-DOWN CONVERTER ORDERING INFORMATION Part Number* MP1474DJ Package TSOT-23-8 Top Marking ADK * For Tape & Reel, add suffix -Z (e.g. MP1474DJ-Z); For RoHS Compliant Packaging, add suffix -LF (e.g. MP1474DJ-LF-Z) PACKAGE REFERENCE TOP VIEW PG 1 8 FB IN 2 7 VCC SW 3 6 EN/SYNC GND 4 5 BST ABSOLUTE MAXIMUM RATINGS (1) Thermal Resistance VIN .................................................. -0.3V to 17V VSW ...................................................................... -0.3V (-5V for <10ns) to 17V (19V for <10ns) VBST ........................................................ VSW+6V All Other Pins ................................ -0.3V to 6V (2) (3) Continuous Power Dissipation (TA = +25C) ........................................................... 1.25W Junction Temperature ...............................150C Lead Temperature ....................................260C Storage Temperature ................. -65C to 150C TSOT-23-8 ............................. 100 ..... 55... C/W Recommended Operating Conditions (4) Supply Voltage VIN ........................... 4.5V to 16V Output Voltage VOUT ..................... 0.8V to VIN-3V Operating Junction Temp. (TJ). -40C to +125C MP1474 Rev. 1.0 9/26/2012 (5) JA JC Notes: 1) Exceeding these ratings may damage the device. 2) About the details of EN pin's ABS MAX rating, please refer to Page 9, Enable/SYNC control section. 3) The maximum allowable power dissipation is a function of the maximum junction temperature TJ (MAX), the junction-toambient thermal resistance JA, and the ambient temperature TA. The maximum allowable continuous power dissipation at any ambient temperature is calculated by PD (MAX) = (TJ (MAX)-TA)/JA. Exceeding the maximum allowable power dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. Internal thermal shutdown circuitry protects the device from permanent damage. 4) The device is not guaranteed to function outside of its operating conditions. 5) Measured on JESD51-7, 4-layer PCB. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. (c) 2012 MPS. All Rights Reserved. 2 MP1474 - SYNCHRONOUS STEP-DOWN CONVERTER ELECTRICAL CHARACTERISTICS (6) VIN = 12V, TA = 25C, unless otherwise noted. Parameter Symbol Supply Current (Shutdown) Supply Current (Quiescent) HS Switch-On Resistance LS Switch-On Resistance Switch Leakage Current Limit (6) Oscillator Frequency Fold-Back Frequency Maximum Duty Cycle Minimum On Time(6) Sync Frequency Range IIN Iq HSRDS-ON LSRDS-ON SWLKG ILIMIT fSW fFB DMAX ON MIN fSYNC Feedback Voltage VFB Feedback Current EN Rising Threshold EN Falling Threshold IFB EN Input Current EN Turn-Off Delay Power-Good Rising Threshold Power-Good Falling Threshold Power-Good Delay Power-Good Sink Current Capability Power-Good Leakage Current VIN Under-Voltage Lockout Threshold--Rising VIN Under-Voltage Lockout Threshold--Hysteresis VCC Regulator VCC Load Regulation Soft-Start Period Thermal Shutdown (6) Thermal Hysteresis (6) Condition VEN = 0V VEN = 2V, VFB = 1V VBST-SW=5V VCC =5V VEN = 0V, VSW =12V Under 40% Duty Cycle VFB=0.75V VFB<400mV VFB=700mV TA =25C -40C<TA<85C (7) VFB=820mV VEN RISING VEN FALLING IEN Min 7 0.6 100 40 Max 1 1 3 430 90 0.2 791 787 1.2 1.1 500 0.25 95 40 807 807 10 1.4 1.25 570 2 823 827 50 1.6 1.4 Units A mA m m A A kHz fSW % ns MHz mV nA V V VEN=2V 2 A VEN=0 0 A 5 0.9 0.85 0.4 s VFB VFB ms ENtd-off PGvth-Hi PGvth-Lo PGTd VPG Typ Sink 4mA IPG-LEAK INUVVth 3.7 3.9 0.4 V 1 A 4.1 V INUVHYS 650 mV VCC 5 3 1.2 150 20 V % ms C C ICC=5mA SS Notes: 6) Guaranteed by design. 7) Not tested in production and guaranteed by over-temperature correlation. MP1474 Rev. 1.0 9/26/2012 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. (c) 2012 MPS. All Rights Reserved. 3 MP1474 - SYNCHRONOUS STEP-DOWN CONVERTER TYPICAL CHARACTERISTICS VIN = 12V, VOUT = 3.3V, L=5.5H, TA = 25C, unless otherwise noted. Load Regulation Peak Current vs. Duty Cycle Line Regulation VIN=5-16V, IOUT=0-2A 0.3 0.5 VIN=5V-16V 4.3 IOUT=0A VIN=12V 0.3 PEAK CURRENT (A) 0.2 VIN=16V 0.1 0.1 IOUT=1A 0 -0.1 VIN=5V -0.1 IOUT=2A -0.3 -0.2 -0.3 0 0.4 0.8 1.2 1.6 2 -0.5 5 6 7 8 9 10 11 12 13 14 15 16 INPUT VOLTAGE(V) Disabled Supply Current vs. Input Voltage Enabled Supply Current vs. Input Voltage 800 17 750 14 3.4 3.1 2.5 25 30 35 40 45 50 55 60 65 70 75 VFB=1V 700 11 8 650 5 600 2 550 -1 500 -4 450 -7 -10 3.7 2.8 OUTPUT CURRENT (A) VEN=0V 20 4 0 5 10 15 INPUT VOLTAGE(V) MP1474 Rev. 1.0 9/26/2012 20 400 4 6 8 10 12 14 16 18 INPUT VOLTAGE(V) www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. (c) 2012 MPS. All Rights Reserved. 4 MP1474 - SYNCHRONOUS STEP-DOWN CONVERTER TYPICAL PERFORMANCE CHARACTERISTICS Performance waveforms are tested on the evaluation board of the Design Example section. VIN = 12V, VOUT = 3.3V, L=5.5H, TA = 25C, unless otherwise noted. 100 100 100 95 95 95 90 90 85 85 80 80 VIN=5V 75 70 65 60 75 65 60 60 55 55 50 0.0 50 0.0 0.8 1.2 1.6 2.0 OUTPUT CURRENT (A) 0.4 0.8 VIN=16V 70 55 0.4 VIN=12V 80 VIN=16V 65 VIN=16V VIN=5V 85 VIN=12V 75 VIN=12V 70 90 VIN=5V 1.2 1.6 2.0 50 0.0 OUTPUT CURRENT (A) 0.4 0.8 1.2 1.6 2.0 OUTPUT CURRENT (A) Case Temperature Rise vs. Output Current 100 100 95 95 90 90 VIN=5V 85 75 75 VIN=16V 70 65 60 60 55 55 0.4 0.8 1.2 1.6 OUTPUT CURRENT (A) 9 70 65 50 0.0 12 VIN=12V 80 2.0 IOUT=0A-2A 15 VIN=7V 85 VIN=12V 80 18 VIN=16V 6 3 50 0.0 0.4 0.8 1.2 1.6 OUTPUT CURRENT (A) 0 2.0 0 0.5 1 1.5 OUTPUT CURRENT (A) Short Entry Short Recovery Startup through Enable IOUT=0A IOUT=0A IOUT=0A VOUT 2V/div. VPG 5V/div. VOUT 2V/div. VPG 5V/div. VOUT 2V/div. VPG 5V/div. VIN 10V/div. VIN 10V/div. VEN 5V/div. VSW 10V/div. VSW 10V/div. VSW 10V/div. IINDUCTOR 5A/div. IINDUCTOR 5A/div. IINDUCTOR 2A/div. MP1474 Rev. 1.0 9/26/2012 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. (c) 2012 MPS. All Rights Reserved. 2 5 MP1474 - SYNCHRONOUS STEP-DOWN CONVERTER TYPICAL PERFORMANCE CHARACTERISTICS (continued) Performance waveforms are tested on the evaluation board of the Design Example section. VIN = 12V, VOUT = 3.3V, L=5.5H, TA = 25C, unless otherwise noted. Startup through Enable IOUT=2A Shutdown through Enable Shutdown through Enable IOUT=0A IOUT=2A VOUT 2V/div. VOUT 2V/div. VOUT 2V/div. VPG 5V/div. VPG 5V/div. VPG 5V/div. VEN 5V/div. VEN 5V/div. VEN 5V/div. VSW 10V/div. VSW 10V/div. VSW 10V/div. IINDUCTOR 2A/div. IINDUCTOR 2A/div. IINDUCTOR 2A/div. Startup through Input Voltage Startup through Input Voltage Shutdown through Input Voltage IOUT=0A IOUT=2A IOUT=0A VOUT 2V/div. VOUT 2V/div. VOUT 2V/div. VPG 5V/div. VPG 5V/div. VPG 5V/div. VIN 5V/div. VIN 5V/div. VIN 5V/div. VSW 5V/div. VSW 5V/div. VSW 5V/div. IINDUCTOR 2A/div. IINDUCTOR 2A/div. IINDUCTOR 2A/div. Shutdown through Input Voltage Input / Output Ripple Load Transient Reponse IOUT=2A IOUT=1A-2A IOUT=2A VOUT 2V/div. VPG 5V/div. VIN 5V/div. VSW 5V/div. IINDUCTOR 2A/div. MP1474 Rev. 1.0 9/26/2012 VOUT/AC 20mV/div. VIN/AC 200mV/div. VOUT/AC 50mV/div. VSW 10V/div. IL 2A/div. IOUT 1A/div. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. (c) 2012 MPS. All Rights Reserved. 6 MP1474 - SYNCHRONOUS STEP-DOWN CONVERTER PIN FUNCTIONS Package Pin # 1 2 3 4 5 6 7 8 Name Description Power Good Output. The output of this pin is an open drain that goes high if the output voltage exceeds 90% of the normal voltage. There is a 0.4ms delay between when FB90% to when the PG pin goes high. Supply Voltage. The IN pin supplies power for internal MOSFET and regulator. The MP1474 operates from a +4.5V to +16V input rail. Requires a low-ESR, and lowIN inductance capacitor (C1) to decouple the input rail. Place the input capacitor very close to this pin and connect it with wide PCB traces and multiple vias. Switch Output. Connect to the inductor and bootstrap capacitor. This pin is driven up to VIN by the high-side switch during the PWM duty cycle ON time. The inductor current drives the SW pin negative during the OFF time. The ON resistance of the low-side switch and SW the internal body diode fixes the negative voltage. Connect using wide PCB traces and multiple vias. System Ground. Reference ground of the regulated output voltage. PCB layout Requires GND extra care. For best results, connect to GND with copper and vias. Bootstrap. Requires a capacitor connected between SW and BST pins to form a floating BST supply across the high-side switch driver. Enable. EN=high to enable the MP1474. Apply an external clock change the switching EN/SYNC frequency. For automatic start-up, connect EN pin to VIN with a 100k resistor. Internal 5V LDO output. Powers the driver and control circuits. Decouple with 0.1F-toVCC 0.22F capacitor. Do not use a capacitor 0.22F. Feedback. Connect to the tap of an external resistor divider from the output to GND to set the output voltage. The frequency fold-back comparator lowers the oscillator frequency FB when the FB voltage is below 400mV to prevent current limit runaway during a short circuit fault. Place the resistor divider as close to the FB pin as possible. Avoid placing vias on the FB traces. MP1474 Rev. 1.0 9/26/2012 PG www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. (c) 2012 MPS. All Rights Reserved. 7 MP1474 - SYNCHRONOUS STEP-DOWN CONVERTER FUNCTIONAL BLOCK DIAGRAM IN + - VCC Regulator VCC RSEN Currrent Sense Amplifer Bootstrap Regulator Oscillator HS Driver + 1pF 50pF Reference EN/SYNC 6.5V Current Limit Comparator Comparator On Time Control Logic Control 1MEG + + - FB PG 400k + BST SW VCC LS Driver Error Amplifier GND Ref Figure 1: Functional Block Diagram MP1474 Rev. 1.0 9/26/2012 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. (c) 2012 MPS. All Rights Reserved. 8 MP1474 - SYNCHRONOUS STEP-DOWN CONVERTER OPERATION The MP1474 is a high-frequency, synchronous, rectified, step-down, switch-mode converter with built-in power MOSFETs. It offers a very compact solution that achieves a 2A continuous output current with excellent load and line regulation over a wide input supply range. The MP1474 operates in a fixed-frequency, peak-current-control mode to regulate the output voltage. An internal clock initiates a PWM cycle. The integrated high-side power MOSFET turns on and remains on until the current reaches the value set by the COMP voltage. When the power switch is off, it remains off until the next clock cycle starts. If, within 95% of one PWM period, the current in the power MOSFET does not reach the value set by the COMP value, the power MOSFET is forced off. Internal Regulator A 5V internal regulator powers most of the internal circuitries. This regulator takes VIN and operates in the full VIN range. When VIN exceeds 5.0V, the output of the regulator is in full regulation. When VIN is less than 5.0V, the output decreases, and the part requires a 0.1F ceramic decoupling capacitor. Error Amplifier The error amplifier compares the FB pin voltage to the internal 0.807V reference (VREF) and outputs a current proportional to the difference between the two. This output current then charges or discharges the internal compensation network to form the COMP voltage, which controls the power MOSFET current. The optimized internal compensation network minimizes the external component counts and simplifies the control loop design. Enable/SYNC Control EN/SYNC is a digital control pin that turns the regulator on and off. Drive EN high to turn on the regulator; drive it low to turn it off. An internal 1M resistor from EN/SYNC to GND allows EN/SYNC to be floated to shut down the chip. MP1474 Rev. 1.0 9/26/2012 The EN pin is clamped internally using a 6.5V series-Zener-diode as shown in Figure 2. Connecting the EN input pin through a pullup resistor to the voltage on the IN pin limits the EN input current to less than 100A. For example, with 12V connected to IN, RPULLUP (12V - 6.5V) / 100A = 55k. Connecting the EN pin is directly to a voltage source without any pullup resistor requires limiting the amplitude of the voltage source to 6V to prevent damage to the Zener diode. Figure 2: 6.5V Zener Diode Connection For external clock synchronization, connect a clock with a frequency range between 200kHz and 2MHz 2ms after the output voltage is set: The internal clock rising edge will synchronize with the external clock rising edge. Select an external clock signal with a pulse width less than 1.7s. Under-Voltage Lockout (UVLO) The MP1474 has under-voltage lock-out protection (UVLO). When the VCC voltage exceeds the UVLO rising threshold voltage, the MP1474 powers up. It shuts off when the VCC voltage drops below the UVLO falling threshold voltage. This is non-latch protection. The MP1474 is disabled when the input voltage falls below 3.25V. If an application requires a higher under-voltage lockout (UVLO) threshold, use the EN pin as shown in Figure 3 to adjust the input voltage UVLO by using two external resistors. For best results, set the UVLO falling threshold (VSTOP) above 4.5V using the enable resistors. Set the rising threshold (VSTART) to provide enough hysteresis to allow for any input supply variations. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. (c) 2012 MPS. All Rights Reserved. 9 MP1474 - SYNCHRONOUS STEP-DOWN CONVERTER Thermal Shutdown Thermal shutdown prevents the chip from operating at exceedingly high temperatures. When the silicon die reaches temperatures that exceed 150C, it shuts down the whole chip. When the temperature drops below its lower threshold, typically 130C, the chip is enabled again. Figure 3: Adjustable UVLO Internal Soft-Start The soft-start prevents the converter output voltage from overshooting during startup. When the chip starts, the internal circuitry generates a soft-start voltage (VSS) that ramps up from 0V to 1.2V. When VSS is less than VREF, the error amplifier uses VSS as the reference. When VSS exceeds VREF, the error amplifier uses VREF as the reference. The SS time is internally set to 1.2ms. Power Good Indicator MP1474 has an open drain pin as the powergood indicator (PG). Pull this up to VCC or another external source through a 100k resistor. When VFB exceeds 90% of VREF, PG switches goes high with 0.4ms delay time. If VFB goes below 85% of VREF, an internal MOSFET pulls the PG pin down to ground. The internal circuit keeps the PG low once the input supply exceeds 1.2V. Over-Current-Protection and Hiccup The MP1474 has a cycle-by-cycle over-current limit when the inductor current peak value exceeds the set current limit threshold. Meanwhile, the output voltage drops until VFB is below the Under-Voltage (UV) threshold-- typically 50% below the reference. Once UV is triggered, the MP1474 enters hiccup mode to periodically restart the part. This protection mode is especially useful when the output is dead-shorted to ground, and greatly reduces the average short circuit current to alleviate thermal issues and protect the regulator. The MP1474 exits the hiccup mode once the overcurrent condition is removed. MP1474 Rev. 1.0 9/26/2012 Floating Driver and Bootstrap Charging An external bootstrap capacitor powers the floating power MOSFET driver. This floating driver has its own UVLO protection. This UVLO's rising threshold is 2.2V with a hysteresis of 150mV. The bootstrap capacitor voltage is regulated internally by VIN through D1, M1, R3, C4, L1 and C2 (Figure 4). If (VINVSW) exceeds 5V, U1 will regulate M1 to maintain a 5V BST voltage across C4. A 20 resistor placed between SW and BST cap. is strongly recommended to reduce SW spike voltage. D1 VIN M1 5V U1 BST R3 C4 VOUT SW L1 C2 Figure 4: Internal Bootstrap Charging Circuit Startup and Shutdown If both VIN and VEN exceed their respective thresholds, the chip starts. The reference block starts first, generating stable reference voltage and currents, and then the internal regulator is enabled. The regulator provides a stable supply for the remaining circuitries. Three events can shut down the chip: VEN low, VIN low, and thermal shutdown. During the shutdown procedure, the signaling path is first blocked to avoid any fault triggering. The COMP voltage and the internal supply rail are then pulled down. The floating driver is not subject to this shutdown command. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. (c) 2012 MPS. All Rights Reserved. 10 MP1474 - SYNCHRONOUS STEP-DOWN CONVERTER APPLICATION INFORMATION Setting the Output Voltage The external resistor divider sets the output voltage (see Typical Application on page 1). The feedback resistor R1 also sets the feedback loop bandwidth with the internal compensation capacitor (see Typical Application on page 1). Choose R1 around 40k. R2 is then given by: R1 R2 VOUT 0.807V 1 Cf R1 Rt 8 VOUT R2 Figure 5: T-Type Network Table 1 lists the recommended T-type resistors value for common output voltages. Table 1: Resistor Selection for Common Output Voltages VOUT R1 (k) R2 (k) Rt (k) Cf(pF) L(H) (V) 1.0 20.5 84.5 82 15 2.2 1.2 30.1 61.9 82 15 2.2 1.8 40.2 32.4 33 15 4.7 2.5 40.2 19.1 33 15 4.7 3.3 40.2 13 16 15 5.5 5 40.2 7.68 16 15 5.5 Selecting the Inductor Use a1H-to-10H inductor with a DC current rating of at least 25% percent higher than the maximum load current for most applications. For highest efficiency, use an inductor with a DC resistance less than 15m. For most designs, the inductance value can be derived from the following equation. L1 MP1474 Rev. 1.0 9/26/2012 Choose the inductor ripple current to be approximately 30% of the maximum load current. The maximum inductor peak current is: IL(MAX) ILOAD IL 2 Use a larger inductor for improved efficiency under light-load conditions--below 100mA. The T-type network--as shown in Figure 5--is highly recommended when VOUT is low. FB Where IL is the inductor ripple current. VOUT (VIN VOUT ) VIN IL fOSC Selecting the Input Capacitor The input current to the step-down converter is discontinuous, therefore requires a capacitor is to supply the AC current to the step-down converter while maintaining the DC input voltage. Use low ESR capacitors for the best performance. Use ceramic capacitors with X5R or X7R dielectrics for best results because of their low ESR and small temperature coefficients. For most applications, use a 22F capacitor. Since C1 absorbs the input switching current, it requires an adequate ripple current rating. The RMS current in the input capacitor can be estimated by: I C1 ILOAD VOUT VOUT 1 VIN VIN The worse case condition occurs at VIN = 2VOUT, where: IC1 ILOAD 2 For simplification, choose an input capacitor with an RMS current rating greater than half of the maximum load current. The input capacitor can be electrolytic, tantalum or ceramic. When using electrolytic or tantalum capacitors, add a small, high quality ceramic capacitor (e.g. 0.1F) placed as close to the IC as possible. When using ceramic capacitors, make sure that they have enough capacitance to provide sufficient charge to prevent excessive voltage ripple at input. The input voltage ripple caused by capacitance can be estimated as: VIN ILOAD V V OUT 1 OUT fS C1 VIN VIN www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. (c) 2012 MPS. All Rights Reserved. 11 MP1474 - SYNCHRONOUS STEP-DOWN CONVERTER Selecting the Output Capacitor The output capacitor (C2) maintains the DC output voltage. Use ceramic, tantalum, or lowESR electrolytic capacitors. For best results, use low ESR capacitors to keep the output voltage ripple low. The output voltage ripple can be estimated as: VOUT VOUT VOUT 1 1 RESR fS L1 VIN 8 fS C2 Where L1 is the inductor value and RESR is the equivalent series resistance (ESR) value of the output capacitor. For ceramic capacitors, the capacitance dominates the impedance at the switching frequency, and the capacitance causes the majority of the output voltage ripple. For simplification, the output voltage ripple can be estimated as: VOUT V VOUT 1 OUT VIN 8 fS 2 L1 C2 External Bootstrap Diode An external bootstrap diode can enhance the efficiency of the regulator given the following conditions: VOUT is 5V or 3.3V; and Duty cycle is high: D= VOUT >65% VIN In these cases, add an external BST diode from the VCC pin to BST pin, as shown in Figure 6. BST MP1474 SW External BST Diode IN4148 VCC CBST L COUT Figure 6: Optional External Bootstrap Diode to Enhance Efficiency The recommended external BST diode is IN4148, and the BST capacitor value is 0.1F to 1F. For tantalum or electrolytic capacitors, the ESR dominates the impedance at the switching frequency. For simplification, the output ripple can be approximated as: VOUT VOUT V 1 OUT fS L1 VIN RESR The characteristics of the output capacitor also affect the stability of the regulation system. The MP1474 can be optimized for a wide range of capacitance and ESR values. MP1474 Rev. 1.0 9/26/2012 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. (c) 2012 MPS. All Rights Reserved. 12 MP1474 - SYNCHRONOUS STEP-DOWN CONVERTER PC Board Layout (8) PCB layout is very important to achieve stable operation especially for VCC capacitor and input capacitor placement. For best results, follow these guidelines: 1. Use large ground plane directly connect to GND pin. Add vias near the GND pin if bottom layer is ground plane. 2. Place the VCC capacitor to VCC pin and GND pin as close as possible. Make the trace length of VCC pin-VCC capacitor anode-VCC capacitor cathode-chip GND pin as short as possible. 3. Place the ceramic input capacitor close to IN and GND pins. Keep the connection of input capacitor and IN pin as short and wide as possible. 4. Route SW, BST away from sensitive analog areas such as FB. It's not recommended to route SW, BST trace under chip's bottom side. 5. Place the T-type feedback resistor R6 close to chip to ensure the trace which connects to FB pin as short as possible Notes: 8) The recommended layout is based on the Figure 7 Typical Application circuit on the next page. MP1474 Rev. 1.0 9/26/2012 Design Example Below is a design example following the application guidelines for the specifications: Table 2: Design Example VIN VOUT Io 12V 3.3V 2A The detailed application schematic is shown in Figure 8. The typical performance and circuit waveforms have been shown in the Typical Performance Characteristics section. For more device applications, please refer to the related Evaluation Board Datasheets. www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. (c) 2012 MPS. All Rights Reserved. 13 MP1474 - SYNCHRONOUS STEP-DOWN CONVERTER TYPICAL APPLICATION CIRCUITS 2 VIN C1 0.1uF 25V C1A 22uF 25V GND BST IN 5 R3 20 C4 0.1uF MP1474 GND 7 VCC C5 0.1uF R5 100k VCC SW L1 5.5uH 5V/2A 3 C2 22uF GND GND 1 PG 6 C2A 22uF GND PG C3 15pF R4 100k EN/SYNC VOUT FB EN/SYNC R6 16k 8 R1 40.2k GND 4 R2 7.68k GND GND Figure 7: 12VIN, 5V/2A Output 2 VIN C1 0.1uF 25V C1A 22uF 25V GND 5 R3 20 C4 0.1uF MP1474 GND 7 VCC R5 100k BST IN C5 0.1uF VCC SW L1 5.5uH 3.3V/2A 3 C2 22uF GND GND 1 PG PG 6 GND C3 15pF R4 100k EN/SYNC VOUT C2A 22uF FB EN/SYNC R6 16k 8 R1 40.2k GND 4 R2 13k GND GND Figure 8: 12VIN, 3.3V/2A Output 2 VIN C1 0.1uF 25V C1A 22uF 25V GND C4 0.1uF C5 0.1uF VCC SW L1 4.7uH 2.5V/2A 3 C2 22uF GND GND 1 PG 6 VOUT C2A 22uF GND C3 15pF R4 100k EN/SYNC R3 20 GND VCC PG 5 MP1474 7 R5 100k BST IN FB EN/SYNC 8 R6 33k R1 40.2k 4 GND GND R2 19.1k GND Figure 9: 12VIN, 2.5V/2A Output MP1474 Rev. 1.0 9/26/2012 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. (c) 2012 MPS. All Rights Reserved. 14 MP1474 - SYNCHRONOUS STEP-DOWN CONVERTER 2 VIN C1 0.1uF 25V C1A 22uF 25V GND BST IN 5 R3 20 C4 0.1uF MP1474 GND 7 VCC C5 0.1uF R5 100k VCC SW L1 4.7uH 1.8V/2A 3 C2 22uF GND GND 1 PG 6 C2A 22uF GND PG C3 15pF R4 100k EN/SYNC VOUT FB EN/SYNC R6 33k 8 R1 40.2k GND 4 R2 32.4k GND GND Figure 10: 12VIN, 1.8V/2A Output 2 VIN C1 0.1uF 25V C1A 22uF 25V GND 5 R3 20 C4 0.1uF MP1474 GND 7 VCC C5 0.1uF R5 100k BST IN SW VCC L1 2.2uH C2 22uF GND GND 1 PG 6 VOUT C2A 22uF GND PG C3 15pF R4 100k EN/SYNC 1.2V/2A 3 FB EN/SYNC R6 82k 8 R1 30.1k GND 4 R2 61.9k GND GND Figure 11: 12VIN, 1.2V/2A Output 2 VIN C1 0.1uF 25V C1A 22uF 25V GND C4 0.1uF C5 0.1uF VCC SW L1 2.2uH 1V/2A 3 C2 22uF GND GND 1 PG 6 VOUT C2A 22uF GND C3 15pF R4 100k EN/SYNC R3 20 GND VCC PG 5 MP1474 7 R5 100k BST IN FB EN/SYNC 8 R6 82k R1 20.5k 4 GND GND R2 84.5k GND Figure 12: 12VIN, 1V/2A Output MP1474 Rev. 1.0 9/26/2012 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. (c) 2012 MPS. All Rights Reserved. 15 MP1474 - SYNCHRONOUS STEP-DOWN CONVERTER WITH INTERNAL MOSFETS PACKAGE INFORMATION TSOT23-8 NOTICE: The information in this document is subject to change without notice. Users should warrant and guarantee that third party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not assume any legal responsibility for any said applications. MP1474 Rev. 1.0 9/26/2012 www.MonolithicPower.com MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. (c) 2012 MPS. All Rights Reserved. 16 Mouser Electronics Authorized Distributor Click to View Pricing, Inventory, Delivery & Lifecycle Information: Monolithic Power Systems (MPS): MP1474DJ-LF-P MP1474DJ-LF-Z