SEIKO EPSON CORPORATION 1
PF468-09
E0C6281
4-bit Single Chip Microcomputer
Low Voltage
Operation
Products
● Core CPU Architecture
● SVD Circuit/Comparator
● Melody Circuit
■DESCRIPTION
The E0C6281 is an advanced single-chip CMOS 4-bit microcomputer consisting of the E0C6200 CMOS 4-bit
core CPU. It also contains the ROM, RAM, LCD driver, time base counter and melody generation circuit.
The E0C6281 provides an excellent solution for low-power consumption systems with clock functions.
■FEATURES
● CMOS LSI.............................................4-bit parallel processing
● Clock .....................................................32.768kHz (Typ.)
● Instruction set........................................100 instructions
● Instruction cycle time ............................153µsec, 214µsec or 366µsec (depending on instruction)
● ROM capacity .......................................1,024 × 12 bits
● RAM capacity........................................96 × 4 bits
● Input port...............................................5 bits
(pull-down resistors are available by mask option)
● Output port ............................................4 bits (general purpose port)
2 bits (for melody output): MO, MO (also used as the external CR
connecting terminal for envelope)
1 bit (for lamp output)
1 bit (for clock output: frequency can be selected from 256Hz
through 32kHz by mask option)
● I/O port ..................................................4 bits
● LCD driver.............................................26 segments × 3 commons, 1/3 duty or 4 commons, 1/4 duty
● Built-in stopwatch timer
● Built-in supply voltage detection (SVD) circuit
● Built-in comparator................................1 ch.
● Built-in melody generation circuit..........Equivalent to SVM7500 (80-word melody ROM is built in)
● Interrupts...............................................External : Input interrupt 2 lines
Internal : Timer interrupt 1 line
Stopwatch interrupt 1 line
Melody completion interrupt 1 line
● Supply voltage ......................................1.5V/3.0V (Minimum operating voltage: 0.9V/1.8V)
● Current consumption ............................E0C6281/62L81 HALT mode : 1.0µA (Typ.)
OPERATING mode : 2.5µA (Typ.)
E0C62A81/62B81 HALT mode : 5.5µA (Typ.)
OPERATING mode : 7.2µA (Typ.)
● Package ................................................QFP6-64pin-S1 (plastic)
Die form
■LINE UP
Model Supply voltage
3.0V (1.8V to 3.5V)
1.5V (0.9V to 3.5V)
3.0V (1.8V to 3.5V)
1.5V (0.9V to 3.5V)
E0C6281
E0C62L81
E0C62A81
E0C62B81
Clock
32kHz (Crystal oscillation)
32kHz (Crystal oscillation)
32kHz (CR oscillation)
32kHz (CR oscillation)
2
E0C6281
■PIN CONFIGURATION
QFP6-64pin-S1
< Detail of Melody Function >
• Melody memory capacity .................. 80 words
• Interval memory capacity .................. 16 words (including one pause note)
• Interval generated ............................. C3 to C6#, or C4 to C7# (mask option)
• Useful note ........................................ 8 (from sixteenth note to a half note)
• Tempo................................................ Basic: Select 2 tempos out of 16 tempos (30 to 480) (mask option)
(The tempo selected is changed by the software control.)
The tempo having 8 times, 16 times or 32 times the basic tempo is available by software.
• Envelope............................................ External CR is required. (not available for the piezoelectic direct drive type)
• Piezoelectic direct drive .................... Envelope not available
• Melody control function ..................... (1) 1 music: Melody start address is controlled by the software.
(2) Repeating: The address is controlled by the software when repeated.
(3) Forcible music change: The new music address is designated with the software
while a music is now played.
3348
17
32
INDEX
161
64
49
E0C6281
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
COM1
COM2
COM3
SEG25
SEG0
SEG1
SEG2
SEG3
SEG4
SEG5
SEG6
SEG7
SEG8
SEG9
SEG10
SEG11
No. Pin name 17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
SEG12
TEST
SEG13
SEG14
SEG15
SEG16
SEG17
SEG18
SEG19
SEG20
SEG21
SEG22
SEG23
SEG24
N.C.
P00
No. Pin name 33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
P01
P02
P03
CMPM
CMPP
MTEST
RESET
K00
K01
K02
K03
K10
R10
R11
R12
MO
N.C. = No Connection
No. Pin name 49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
R00
R01
R02
R03
V
S1
V
DD
V
SS
OSC2
OSC1
V
L3
V
L2
V
L1
CC
CB
CA
COM0
No. Pin name
COM0~3
V
K00~03, K10
P00~03
R00~03, R10, R11
DD
OSC1
OSC2
RESET
SEG0~25 TEST
V
L1~3
CA~CC
V
S1
V
SS
Power
Controller
LCD Driver
RAM
96 words x 4 bits
ROM
1,024 words x 12 bits
OSC
System Reset
Control
Melody
Interrupt
Generator
Input Port
Test Port
I/O Port
Output Port
Timer
Stop Watch
Core CPU E0C6200
Comparator
& SVD
MO
CMPP
CMPM
R12
MTEST
■BLOCK DIAGRAM
3
E0C6281
V
DD
V
SS
V
S1
V
L1
V
L2
V
L3
CA–CC
OSC1
OSC2
K00–K03, K10
P00–P03
R00–R03
R10
R11
R12
MO
CMPP
CMPM
SEG0–25
COM0–3
RESET
TEST
MTEST
Pin name I
I
O
O
O
O
–
I
O
I
I/O
O
O
O
O
O
I
I
O
O
I
I
I
In/Out Power source (+) terminal
Power source (-) terminal
Oscillation and internal logic system regulated voltage output terminal
LCD system regulated voltage output terminal (approx. -1.05 V)
LCD system booster output terminal (V
L1
x 2)
LCD system booster output terminal (V
L1
x 3)
Booster capacitor connecting terminal
Crystal or CR oscillation input terminal
Crystal or CR oscillation output terminal
Input terminal
I/O terminal
Output terminal
Output terminal (FOUT output available by mask option)
Output terminal
Output terminal (Melody inverted output and envelope function available by mask option)
Melody signal output terminal
Analog comparator non-inverted input terminal
Analog comparator inverted input terminal
LCD segment output terminal (Convertible to DC output by mask option)
LCD common output terminal
Initial reset input terminal
Test input terminal
Melody test input terminal
54
55
53
60
59
58
61–63
57
56
40–44
32–35
49–52
45
46
47
48
37
36
4–17, 19–30
64, 1–3
39
18
38
Pin No. Function
■PIN DESCRIPTION
■ELECTRICAL CHARACTERISTICS
●Absolute Maximum Ratings
Rating
Supply voltage
Input voltage (1)
Input voltage (2)
Permissible total output current *1
Operating temperature
Storage temperature
Soldering temperature / Time
Permissible dissipation *2
∗1:
∗2:
The permissible total output current is the sum total of the current (average current) that simultaneously flows from the output pins (or is draw in).
In case of plastic package (QFP6-64pin).
Symbol
VSS
VI
VIOSC
ΣIVSS
Topr
Tstg
Tsol
PD
Value
-5.0 to 0.5
VSS - 0.3 to 0.5
VSS - 0.3 to 0.5
10
-20 to 70
-65 to 150
260°C, 10sec (lead section)
250
Unit
V
V
V
mA
°C
°C
–
mW
(VDD=0V)
●Recommended Operating Conditions
E0C6281/62A81
Condition
Supply voltage
Oscillation frequency
Symbol
V
SS
f
OSC
Remark
V
DD
=0V Unit
V
kHz
(Ta=-20 to 70°C)
Max.
-1.8
–
Typ.
-3.0
32.768
Min.
-3.5
–
E0C62L81/62B81
Condition
Supply voltage
Oscillation frequency
∗1:
∗2: When switching to heavy load protection mode. The SVD circuit and analog voltage comparator are turned OFF.
The possibility of LCD panel display differs depending on the characteristics of the LCD panel.
Symbol
VSS
fOSC
Remark
VDD=0V
VDD=0V, With software control *1
VDD=0V, When the analog comparator is used
Unit
V
V
V
kHz
(Ta=-20 to 70°C)
Max.
-1.1
-0.9 *2
-1.3
–
Typ.
-1.5
-1.5
-1.5
32.768
Min.
-3.5
-3.5
-3.5
–
4
E0C6281
●DC Characteristics
E0C6281/62A81
Unit
V
V
V
V
µA
µA
µA
µA
mA
mA
mA
mA
mA
mA
µA
µA
µA
µA
µA
µA
(Unless otherwise specified: VDD=0V, VSS=-3.0V, fOSC=32.768kHz, Ta=25°C, VS1/VL1–VL3
are internal voltage
, C1–C6=0.1µF)
Max.
0
0
0.8•VSS
0.90•VSS
0.5
16
100
0
-1.0
-1.0
-2.0
-3
-3
-300
Typ.Min.
0.2•VSS
0.10•VSS
VSS
VSS
0
5
30
-0.5
3.0
3.0
4.5
3
3
300
Characteristic
High level input voltage (1)
High level input voltage (2)
Low level input voltage (1)
Low level input voltage (2)
High level input current (1)
High level input current (2)
High level input current (3)
Low level input current
High level output current (1)
High level output current (2)
High level output current (3)
Low level output current (1)
Low level output current (2)
Low level output current (3)
Common output current
Segment output current
(during LCD output)
Segment output current
(during DC output)
Symbol
VIH1
VIH2
VIL1
VIL2
IIH1
IIH2
IIH3
IIL
IOH1
IOH2
IOH3
IOL1
IOL2
IOL3
IOH4
IOL4
IOH5
IOL5
IOH6
IOL6
VIH1=0V
No pull down resistor
VIH2=0V
With pull down resistor
VIH3=0V
With pull down resistor
VIL=VSS
VOH1=0.1•VSS
VOH2=0.1•VSS
VOH3=0.1•VSS
VOL1=0.9•VSS
VOL2=0.9•VSS
VOL3=0.9•VSS
VOH4=-0.05V
VOL4=VL3+0.05V
VOH5=-0.05V
VOL5=VL3+0.05V
VOH6=0.1•VSS
VOL6=0.9•VSS
Condition
K00–K03, K10, P00–P03
MTEST
RESET, TEST
K00–K03, K10, P00–P03
MTEST
RESET, TEST
K00–K03, K10, P00–P03
CMPP, CMPM
K00–K03, K10
P00–P03
RESET, TEST, MTEST
K00–K03, K10, P00–P03
CMPP, CMPM
RESET, TEST, MTEST
R11
R00–R03, R10, P00–P03
MO, R12
R11
R00–R03, R10, P00–P03
MO, R12
COM0–COM3
SEG0–SEG25
SEG0–SEG25
E0C62L81/62B81
Unit
V
V
V
V
µA
µA
µA
µA
µA
µA
mA
mA
µA
µA
mA
µA
µA
µA
µA
µA
µA
µA
(Unless otherwise specified: V
DD
=0V, V
SS
=-1.5V, f
OSC
=32.768kHz, Ta=25°C, V
S1
/V
L1
–V
L3
are internal voltage
, C1–C6=0.1µF)
Max.
0
0
0.8•V
SS
0.90•V
SS
0.5
10
60
0
-450
-200
-0.8
-0.4
-3
-3
-100
Typ.Min.
0.2•V
SS
0.10•V
SS
V
SS
V
SS
0
2.0
9.0
-0.5
1,300
700
1.5
750
3
3
130
Characteristic
High level input voltage (1)
High level input voltage (2)
Low level input voltage (1)
Low level input voltage (2)
High level input current (1)
High level input current (2)
High level input current (3)
Low level input current
High level output current (1)
High level output current (2)
High level output current (3)
High level output current (4)
Low level output current (1)
Low level output current (2)
Low level output current (3)
Low level output current (4)
Common output current
Segment output current
(during LCD output)
Segment output current
(during DC output)
Symbol
V
IH1
V
IH2
V
IL1
V
IL2
I
IH1
I
IH2
I
IH3
I
IL
I
OH1
I
OH2
I
OH3
I
OH4
I
OL1
I
OL2
I
OL3
I
OL4
I
OH5
I
OL5
I
OH6
I
OL6
I
OH7
I
OL7
V
IH1
=0V
No pull down resistor
V
IH2
=0V
With pull down resistor
V
IH3
=0V
With pull down resistor
V
IL
=V
SS
V
OH1
=0.1•V
SS
V
OH2
=0.1•V
SS
V
OH3
=0.1•V
SS
V
OH4
=0.1•V
SS
When envelope is used
V
OL1
=0.9•V
SS
V
OL2
=0.9•V
SS
V
OL3
=0.9•V
SS
V
OL4
=0.9•V
SS
When envelope is used
V
OH5
=-0.05V
V
OL5
=V
L3
+0.05V
V
OH6
=-0.05V
V
OL6
=V
L3
+0.05V
V
OH7
=0.1•V
SS
V
OL7
=0.9•V
SS
Condition
K00–K03, K10, P00–P03
MTEST
RESET, TEST
K00–K03, K10, P00–P03
MTEST
RESET, TEST
K00–K03, K10, P00–P03
CMPP, CMPM
K00–K03, K10
P00–P03
RESET, TEST, MTEST
K00–K03, K10, P00–P03
CMPP, CMPM
RESET, TEST, MTEST
R11
R00–R03, R10, P00–P03
MO, R12
MO
(R12=Normal H level)
R11
R00–R03, R10, P00–P03
MO, R12
MO
(R12=Normal L level)
COM0–COM3
SEG0–SEG25
SEG0–SEG25
5
E0C6281
●Analog Circuit Characteristics and Current Consumption
E0C6281 (Normal Operating Mode)
∗1: The SVD circuit and analog voltage comparator are turned OFF.
Unit
V
V
V
V
µS
V
mV
mS
µA
µA
(Unless otherwise specified: V
DD
=0V, V
SS
=-3.0V, f
OSC
=32.768kHz, Ta=25°C, C
G
=25pF, V
S1
/V
L1
–V
L3
are internal voltage
, C1–C6=0.1µF)
Max.
-0.95
2•V
L1
×0.9
3•V
L1
×0.9
-2.25
100
V
DD
-0.9
10
3
2.5
5.0
Typ.
-1.05
-2.40
1.0
2.5
Min.
-1.15
2•V
L1
-0.1
3•V
L1
-0.1
-2.55
V
SS
+0.3
Characteristic
Internal voltage
SVD voltage
SVD circuit response time
Analog comparator
input voltage
Analog comparator
offset voltage
Analog comparator
response time
Current consumption
Symbol
V
L1
V
L2
V
L3
V
SVD
t
SVD
V
IP
V
IM
V
OF
t
CMP
I
OP
Condition
Connect 1MΩ load resistor between V
DD
and V
L1
(without panel load)
Connect 1MΩ load resistor between V
DD
and V
L2
(without panel load)
Connect 1MΩ load resistor between V
DD
and V
L3
(without panel load)
Noninverted input (CMPP)
Inverted input (CMPM)
V
IP
=-1.5V, V
IM
=V
IP
±15mV
During HALT
During operation *
1
Without panel load
E0C6281 (Heavy Load Protection Mode)
∗1: The SVD circuit and analog voltage comparator are turned OFF.
Unit
V
V
V
V
µS
V
mV
mS
µA
µA
(Unless otherwise specified: V
DD
=0V, V
SS
=-3.0V, f
OSC
=32.768kHz, Ta=25°C, C
G
=25pF, V
S1
/V
L1
–V
L3
are internal voltage
, C1–C6=0.1µF)
Max.
-0.95
2•V
L1
×0.85
3•V
L1
×0.85
-2.25
100
V
DD
-0.9
10
3
5.5
10.0
Typ.
-1.05
-2.40
2.0
5.5
Min.
-1.15
2•V
L1
-0.1
3•V
L1
-0.1
-2.55
V
SS
+0.3
Characteristic
Internal voltage
SVD voltage
SVD circuit response time
Analog comparator
input voltage
Analog comparator
offset voltage
Analog comparator
response time
Current consumption
Symbol
V
L1
V
L2
V
L3
V
SVD
t
SVD
V
IP
V
IM
V
OF
t
CMP
I
OP
Condition
Connect 1MΩ load resistor between V
DD
and V
L1
(without panel load)
Connect 1MΩ load resistor between V
DD
and V
L2
(without panel load)
Connect 1MΩ load resistor between V
DD
and V
L3
(without panel load)
Noninverted input (CMPP)
Inverted input (CMPM)
V
IP
=-1.5V, V
IM
=V
IP
±15mV
During HALT
During operation *
1
Without panel load
E0C62L81 (Normal Operating Mode)
∗1: The SVD circuit and analog voltage comparator are turned OFF.
Unit
V
V
V
V
µS
V
mV
mS
µA
µA
(Unless otherwise specified: V
DD
=0V, V
SS
=-1.5V, f
OSC
=32.768kHz, Ta=25°C, C
G
=25pF, V
S1
/V
L1
–V
L3
are internal voltage
, C1–C6=0.1µF)
Max.
-0.95
2•V
L1
×0.9
3•V
L1
×0.9
-1.10
100
V
DD
-0.9
20
3
2.5
5.0
Typ.
-1.05
-1.20
1.0
2.5
Min.
-1.15
2•V
L1
-0.1
3•V
L1
-0.1
-1.30
V
SS
+0.3
Characteristic
Internal voltage
SVD voltage
SVD circuit response time
Analog comparator
input voltage
Analog comparator
offset voltage
Analog comparator
response time
Current consumption
Symbol
V
L1
V
L2
V
L3
V
SVD
t
SVD
V
IP
V
IM
V
OF
t
CMP
I
OP
Condition
Connect 1MΩ load resistor between V
DD
and V
L1
(without panel load)
Connect 1MΩ load resistor between V
DD
and V
L2
(without panel load)
Connect 1MΩ load resistor between V
DD
and V
L3
(without panel load)
Noninverted input (CMPP)
Inverted input (CMPM)
V
IP
=-1.1V, V
IM
=V
IP
±30mV
During HALT
During operation *
1
Without panel load
6
E0C6281
E0C62L81 (Heavy Load Protection Mode)
∗1: The SVD circuit and analog voltage comparator are turned OFF.
Unit
V
V
V
V
µS
V
mV
mS
µA
µA
(Unless otherwise specified: V
DD
=0V, V
SS
=-1.5V, f
OSC
=32.768kHz, Ta=25°C, C
G
=25pF, V
S1
/V
L1
–V
L3
are internal voltage
, C1–C6=0.1µF)
Max.
-0.95
2•V
L1
×0.85
3•V
L1
×0.85
-1.10
100
V
DD
-0.9
20
3
5.5
10.0
Typ.
-1.05
-1.20
2.0
5.5
Min.
-1.15
2•V
L1
-0.1
3•V
L1
-0.1
-1.30
V
SS
+0.3
Characteristic
Internal voltage
SVD voltage
SVD circuit response time
Analog comparator
input voltage
Analog comparator
offset voltage
Analog comparator
response time
Current consumption
Symbol
V
L1
V
L2
V
L3
V
SVD
t
SVD
V
IP
V
IM
V
OF
t
CMP
I
OP
Condition
Connect 1MΩ load resistor between V
DD
and V
L1
(without panel load)
Connect 1MΩ load resistor between V
DD
and V
L2
(without panel load)
Connect 1MΩ load resistor between V
DD
and V
L3
(without panel load)
Noninverted input (CMPP)
Inverted input (CMPM)
V
IP
=-1.1V, V
IM
=V
IP
±30mV
During HALT
During operation *
1
Without panel load
E0C62A81 (Normal Operating Mode)
∗1: The SVD circuit and analog voltage comparator are turned OFF.
Unit
V
V
V
V
µS
V
mV
mS
µA
µA
(Unless otherwise specified: V
DD
=0V, V
SS
=-3.0V, f
OSC
=32.768kHz, Ta=25°C, C
G
=25pF, V
S1
/V
L1
–V
L3
are internal voltage
, C1–C6=0.1µF)
Max.
-0.95
2•V
L1
×0.9
3•V
L1
×0.9
-2.25
100
V
DD
-0.9
10
3
10.0
12.0
Typ.
-1.05
-2.40
5.5
7.2
Min.
-1.15
2•V
L1
-0.1
3•V
L1
-0.1
-2.55
V
SS
+0.3
Characteristic
Internal voltage
SVD voltage
SVD circuit response time
Analog comparator
input voltage
Analog comparator
offset voltage
Analog comparator
response time
Current consumption
Symbol
V
L1
V
L2
V
L3
V
SVD
t
SVD
V
IP
V
IM
V
OF
t
CMP
I
OP
Condition
Connect 1MΩ load resistor between V
DD
and V
L1
(without panel load)
Connect 1MΩ load resistor between V
DD
and V
L2
(without panel load)
Connect 1MΩ load resistor between V
DD
and V
L3
(without panel load)
Noninverted input (CMPP)
Inverted input (CMPM)
V
IP
=-1.5V, V
IM
=V
IP
±15mV
During HALT
During operation *
1
Without panel load
E0C62A81 (Heavy Load Protection Mode)
∗1: The SVD circuit and analog voltage comparator are turned OFF.
Unit
V
V
V
V
µS
V
mV
mS
µA
µA
(Unless otherwise specified: V
DD
=0V, V
SS
=-3.0V, f
OSC
=32.768kHz, Ta=25°C, C
G
=25pF, V
S1
/V
L1
–V
L3
are internal voltage
, C1–C6=0.1µF)
Max.
-0.95
2•V
L1
×0.85
3•V
L1
×0.85
-2.25
100
V
DD
-0.9
10
3
20.0
25.0
Typ.
-1.05
-2.40
11.0
15.0
Min.
-1.15
2•V
L1
-0.1
3•V
L1
-0.1
-2.55
V
SS
+0.3
Characteristic
Internal voltage
SVD voltage
SVD circuit response time
Analog comparator
input voltage
Analog comparator
offset voltage
Analog comparator
response time
Current consumption
Symbol
V
L1
V
L2
V
L3
V
SVD
t
SVD
V
IP
V
IM
V
OF
t
CMP
I
OP
Condition
Connect 1MΩ load resistor between V
DD
and V
L1
(without panel load)
Connect 1MΩ load resistor between V
DD
and V
L2
(without panel load)
Connect 1MΩ load resistor between V
DD
and V
L3
(without panel load)
Noninverted input (CMPP)
Inverted input (CMPM)
V
IP
=-1.5V, V
IM
=V
IP
±15mV
During HALT
During operation *
1
Without panel load
7
E0C6281
E0C62B81 (Normal Operating Mode)
∗1: The SVD circuit and analog voltage comparator are turned OFF.
Unit
V
V
V
V
µS
V
mV
mS
µA
µA
(Unless otherwise specified: V
DD
=0V, V
SS
=-1.5V, f
OSC
=32.768kHz, Ta=25°C, C
G
=25pF, V
S1
/V
L1
–V
L3
are internal voltage
, C1–C6=0.1µF)
Max.
-0.95
2•V
L1
×0.9
3•V
L1
×0.9
-1.10
100
V
DD
-0.9
20
3
10.0
12.0
Typ.
-1.05
-1.20
5.5
7.2
Min.
-1.15
2•V
L1
-0.1
3•V
L1
-0.1
-1.30
V
SS
+0.3
Characteristic
Internal voltage
SVD voltage
SVD circuit response time
Analog comparator
input voltage
Analog comparator
offset voltage
Analog comparator
response time
Current consumption
Symbol
V
L1
V
L2
V
L3
V
SVD
t
SVD
V
IP
V
IM
V
OF
t
CMP
I
OP
Condition
Connect 1MΩ load resistor between V
DD
and V
L1
(without panel load)
Connect 1MΩ load resistor between V
DD
and V
L2
(without panel load)
Connect 1MΩ load resistor between V
DD
and V
L3
(without panel load)
Noninverted input (CMPP)
Inverted input (CMPM)
V
IP
=-1.1V, V
IM
=V
IP
±30mV
During HALT
During operation *
1
Without panel load
E0C62B81 (Heavy Load Protection Mode)
∗1: The SVD circuit and analog voltage comparator are turned OFF.
Unit
V
V
V
V
µS
V
mV
mS
µA
µA
(Unless otherwise specified: V
DD
=0V, V
SS
=-1.5V, f
OSC
=32.768kHz, Ta=25°C, C
G
=25pF, V
S1
/V
L1
–V
L3
are internal voltage
, C1–C6=0.1µF)
Max.
-0.95
2•V
L1
×0.85
3•V
L1
×0.85
-1.10
100
V
DD
-0.9
20
3
20.0
25.0
Typ.
-1.05
-1.20
11.0
15.0
Min.
-1.15
2•V
L1
-0.1
3•V
L1
-0.1
-1.30
V
SS
+0.3
Characteristic
Internal voltage
SVD voltage
SVD circuit response time
Analog comparator
input voltage
Analog comparator
offset voltage
Analog comparator
response time
Current consumption
Symbol
V
L1
V
L2
V
L3
V
SVD
t
SVD
V
IP
V
IM
V
OF
t
CMP
I
OP
Condition
Connect 1MΩ load resistor between V
DD
and V
L1
(without panel load)
Connect 1MΩ load resistor between V
DD
and V
L2
(without panel load)
Connect 1MΩ load resistor between V
DD
and V
L3
(without panel load)
Noninverted input (CMPP)
Inverted input (CMPM)
V
IP
=-1.1V, V
IM
=V
IP
±30mV
During HALT
During operation *
1
Without panel load
8
E0C6281
●Oscillation Characteristics
The oscillation characteristics change depending on the conditions (components used, board pattern, etc.). Use the follow-
ing characteristics as reference values.
E0C6281 (Crystal)
Unit
V
V
pF
ppm
ppm
ppm
V
MΩ
(Unless otherwise specified: V
DD
=0V, V
SS
=-3.0V, Crystal: C-002R (C
I
=35kΩ), C
G
=25pF, C
D
=built-in, Ta=25°C)
Max.
5
10
-3.5
Typ.
20
Min.
-1.8
-1.8
-10
40
200
Characteristic
Oscillation start voltage
Oscillation stop voltage
Built-in capacitance (drain)
Frequency/voltage deviation
Frequency/IC deviation
Frequency adjustment range
Harmonic oscillation start voltage
Permitted leak resistance
Symbol
Vsta
Vstp
C
D
∂f/∂V
∂f/∂IC
∂f/∂C
G
V
hho
R
leak
Condition
t
sta≤3sec
t
stp≤10sec
Including the parasitic capacity inside the IC
V
SS
=-1.8 to -3.5V
C
G
=5 to 25pF
Between OSC1 and V
DD
, V
SS
(V
SS
)
(V
SS
)
(V
SS
)
E0C62L81 (Crystal)
∗1: Items enclosed in parentheses ( ) are those used when operating at heavy load protection mode.
Unit
V
V
pF
ppm
ppm
ppm
V
MΩ
(Unless otherwise specified: V
DD
=0V, V
SS
=-1.5V, Crystal: C-002R (C
I
=35kΩ), C
G
=25pF, C
D
=built-in, Ta=25°C)
Max.
5
10
-3.5
Typ.
20
Min.
-1.1
-1.1(-0.9)*
1
-10
40
200
Characteristic
Oscillation start voltage
Oscillation stop voltage
Built-in capacitance (drain)
Frequency/voltage deviation
Frequency/IC deviation
Frequency adjustment range
Harmonic oscillation start voltage
Permitted leak resistance
Symbol
Vsta
Vstp
C
D
∂f/∂V
∂f/∂IC
∂f/∂C
G
V
hho
R
leak
Condition
t
sta≤3sec
t
stp≤10sec
Including the parasitic capacity inside the IC
V
SS
=-1.1 to -3.5V (-0.9) *
1
C
G
=5 to 25pF
Between OSC1 and V
DD
, V
SS
(V
SS
)
(V
SS
)
(V
SS
)
E0C62A81 (CR)
Unit
%
V
mS
V
(Unless otherwise specified: V
DD
=0V, V
SS
=-3.0V, R
CR
=850kΩ, Ta=25°C)
Max.
20
Typ.
32.768kHz
3
Min.
-20
-1.8
-1.8
Characteristic
Oscillation frequency dispersion
Oscillation start voltage
Oscillation start time
Oscillation stop voltage
Symbol
f
OSC
Vsta
t
sta
Vstp
Condition
V
SS
=-1.8 to -3.5V (V
SS
)
(V
SS
)
E0C62B81 (CR)
Unit
%
V
mS
V
(Unless otherwise specified: V
DD
=0V, V
SS
=-1.5V, R
CR
=850kΩ, Ta=25°C)
Max.
20
Typ.
32.768kHz
3
Min.
-20
-0.9
-0.9
Characteristic
Oscillation frequency dispersion
Oscillation start voltage
Oscillation start time
Oscillation stop voltage
Symbol
f
OSC
Vsta
t
sta
Vstp
Condition
V
SS
=-0.9 to -3.5V (V
SS
)
(V
SS
)
9
E0C6281
CA
CB
CC
V
V
V
V
OSC1
OSC2
V
RESET
TEST
MTEST
Vss
C1
C2
C3
C4
C5
C6
X'tal
L1
L2
L3
DD
S1 1.5V
or
3.0V
Piezo Buzzer
C7
R12
MO
K00
K03
K10
P00
P03
CMPP
CMPM
R00
R03
R10
R11
I
I/O
O
SEG0
SEG25
COM0
COM3
LCD PANEL
E0C6281
/62L81
Coil
R3
C
G
CA
CB
CC
V
V
V
V
OSC1
OSC2
V
RESET
TEST
MTEST
Vss
C1
C2
C3
C4
C5
C6
X'tal
L1
L2
L3
DD
S1 1.5V
or
3.0V
Piezo Buzzer
R12
MO
K00
K03
K10
P00
P03
CMPP
CMPM
R00
R03
R10
R11
I
I/O
O
SEG0
SEG25
COM0
COM3
LCD PANEL
E0C6281
/62L81
R2R1
C
G
■BASIC EXTERNAL CONNECTION DIAGRAM
Note: The above tables are simply an example, and are not guaranteed to work.
X'tal
C
G
C1–C6
Cp
R1, R2
Crystal oscillator
Trimmer capacitor
Capacitor
Capacitor
Protection resistor
32.768kHz, C
I
(Max.)=35kΩ
5–25pF
0.1µF
3.3µF
100Ω
X'tal
C
G
C1–C6
C7
Cp
R3
Crystal oscillator
Trimmer capacitor
Capacitor
Capacitor
Capacitor
Resistor
32.768kHz, C
I
(Max.)=35kΩ
5–25pF
0.1µF
1µF–10µF
3.3µF
1kΩ or more
E0C6281
NOTICE:
No part of this material may be reproduced or duplicated in any form or by any means without the written permission of Seiko Epson. Seiko
Epson reserves the right to make changes to this material without notice. Seiko Epson does not assume any liability of any kind arising out of
any inaccuracies contained in this material or due to its application or use in any product or circuit and, further, there is no representation that
this material is applicable to products requiring high level reliability, such as, medical products. Moreover, no license to any intellectual
property rights is granted by implication or otherwise, and there is no representation or warranty that anything made in accordance with this
material will be free from any patent or copyright infringement of a third party. This material or portions thereof may contain technology or the
subject relating to strategic products under the control of the Foreign Exchange and Foreign Trade Control Law of Japan and may require an
export license from the Ministry of International Trade and Industry or other approval from another government agency.
© Seiko Epson Corporation 1999 All right reserved.
SEIKO EPSON CORPORATION
ELECTRONIC DEVICES MARKETING DIVISION
IC Marketing & Engineering Group
ED International Marketing Department I (Europe & U.S.A.)
421-8, Hino, Hino-shi, Tokyo 191-8501, JAPAN
Phone : 042-587-5812 FAX : 042-587-5564
ED International Marketing Department II (Asia)
421-8, Hino, Hino-shi, Tokyo 191-8501, JAPAN
Phone : 042-587-5814 FAX : 042-587-5110
■PACKAGE DIMENSIONS
14
±0.1
16.8
±0.4
3348
14
±0.1
16.8
±0.4
17
32
INDEX
0.35
±0.1
161
64
49
2.7
±0.1
0.1
3.05
max
1.4
0.6
±0.15
0°
10°
0.15
±0.05
0.8
Plastic QFP6-64pin-S1
Unit: mm