IRL540NS/L
HEXFET® Power MOSFET
PD -91535
Fifth Generation HEXFETs from International Rectifier
utilize advanced processing techniques to achieve
extremely low on-resistance per silicon area. This
benefit, combined with the fast switching speed and
ruggedized device design that HEXFET Power MOSFETs
are well known for, provides the designer with an extremely
efficient and reliable device for use in a wide variety of
applications.
The D2Pak is a surface mount power package capable of
accommodating die sizes up to HEX-4. It provides the
highest power capability and the lowest possible on-
resistance in any existing surface mount package. The
D2Pak is suitable for high current applications because of
its low internal connection resistance and can dissipate up
to 2.0W in a typical surface mount application.
The through-hole version (IRF540NL) is available for low-
profile applications.
S
D
G
VDSS = 100V
RDS(on) = 0.044Ω
ID = 36A
Description
5/13/98
Parameter Typ. Max. Units
RθJC Junction-to-Case ––– 1.1
RθJA Junction-to-Ambient ( PCB Mounted,steady-state)** – – – 4 0
Thermal Resistance
°C/W
Parameter Max. Units
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V36
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V26 A
IDM Pulsed Drain Current 120
PD @TA = 25°C Power Dissipation 3.8 W
PD @TC = 25°C Power Dissipation 140 W
Linear Derating Factor 0.91 W/°C
VGS Gate-to-Source Voltage ± 16 V
EAS Single Pulse Avalanche Energy 310 mJ
IAR Avalanche Current18 A
EAR Repetitive Avalanche Energy14 mJ
dv/dt Peak Diode Recovery dv/dt 5.0 V/ns
TJOperating Junction and -55 to + 175
TSTG Storage Temperature Range
Soldering Temperature, for 10 seconds 300 (1.6mm from case ) °C
Absolute Maximum Ratings
2
D P a k
TO-262
lAdvanced Process Technology
lSurface Mount (IRL540NS)
lLow-profile through-hole (IRL540NL)
l175°C Operating Temperature
lFast Switching
lFully Avalanche Rated
IRL540NS/L
Parameter Min. Typ. Max. Units Conditions
ISContinuous Source Current MOSFET symbol
(Body Diode) ––– ––– showing the
ISM Pulsed Source Current integral reverse
(Body Diode)
––– ––– p-n junction diode.
VSD Diode Forward Voltage ––– ––– 1.3 V TJ = 25°C, IS = 18A, VGS = 0V
trr Reverse Recovery Time ––– 190 290 n s TJ = 25°C, IF = 18A
Qrr Reverse RecoveryCharge ––– 1.1 1.7 µ C di/dt = 100A/µs
ton Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Starting TJ = 25°C, L = 1.9mH
RG = 25Ω, IAS = 18A. (See Figure 12)
Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
Notes:
ISD ≤ 18A, di/dt ≤ 180A/µs, VDD ≤ V(BR)DSS,
TJ ≤ 175°C
Pulse width ≤ 300µs; duty cycle ≤ 2%.
Uses IRL540N data and test conditions
** When mounted on 1" square PCB ( FR-4 or G-10 Material ).
For recommended soldering techniques refer to application note #AN-994.
S
D
G
Source-Drain Ratings and Characteristics
36
120 A
Parameter Min. Typ. Max. Units Conditions
V(BR)DSS Drain-to-Source Breakdown Voltage 10 0 – –– – –– V V GS = 0V, ID = 250µA
∆V(BR)DSS/∆TJBreakdown Voltage Temp. Coefficient ––– 0.11 ––– V/°C Reference to 25°C, ID = 1mA
––– ––– 0.044 VGS = 10V, ID = 18A
––– ––– 0.053 ΩVGS = 5.0V, ID = 18A
––– ––– 0.063 VGS = 4.0V, ID = 15A
VGS(th) Gate Threshold Voltage 1.0 ––– 2.0 V VDS = VGS, ID = 250µA
gfs Forward Transconductance 14 ––– ––– S VDS = 25V, ID = 18A
––– ––– 25 VDS = 100V, VGS = 0V
––– ––– 250 VDS = 80V, VGS = 0V, TJ = 150°C
Gate-to-Source Forward Leakage ––– – –– 10 0 nA VGS = 16V
Gate-to-Source Reverse Leakage ––– ––– -100 VGS = -16V
QgTotal Gate Charge –– – –– – 74 I D = 18A
Qgs Gate-to-Source Charge ––– ––– 9.4 nC VDS = 80V
Qgd Gate-to-Drain ("Miller") Charge ––– –– – 38 VGS = 5.0V, See Fig. 6 and 13
td(on) Turn-On Delay Time ––– 11 –– – V DD = 50V
trRise Time ––– 81 ––– ID = 18A
td(off) Turn-Off Delay Time ––– 39 ––– RG = 5.0Ω, VGS = 5.0V
tfFall Time ––– 62 ––– RD = 2.7Ω, See Fig. 10
Between lead,
––– ––– and center of die contact
Ciss Input Capacitance ––– 1800 ––– VGS = 0V
Coss Output Capacitance ––– 350 ––– pF V DS = 25V
Crss Reverse Transfer Capacitance ––– 170 ––– ƒ = 1.0MHz, See Fig. 5
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
nH
IGSS
RDS(on) Static Drain-to-Source On-Resistance
LSInternal Source Inductance 7.5
ns
IDSS Drain-to-Source Leakage Current A
IRL540NS/L
Fig 1. Typical Output Characteristics
Fig 3. Typical Transfer Characteristics
Fig 2. Typical Output Characteristics
Fig 4. Normalized On-Resistance
Vs. Temperature
1
10
100
1000
0.1 1 10 100
I , Drain-to-Source Current (A)
D
V , Drain-to-Source Volta
g
e
(
V
)
DS
A
20
µ
s PULSE WIDTH
T = 25°C
J
VGS
TOP 15V
12V
10V
8.0V
6.0V
4.0V
3.0V
BOTTOM 2.5V
2.5V
1
10
100
1000
0.1 1 10 100
I , Drain-to-Source Current (A)
D
V , Drain-to-Source Volta
g
e
(
V
)
DS
A
20
µ
s PULSE WIDTH
T = 175°C
VGS
TOP 15V
12V
10V
8.0V
6.0V
4.0V
3.0V
BOTTOM 2.5V
2.5V
J
1
10
100
1000
246810
T = 25°C
J
GS
V , Gate-to-Source Volta
g
e (V)
D
I , Drain-to-Source Current (A)
T = 175°C
J
A
V = 50V
20µs PULSE WIDTH
DS
0.0
0.5
1.0
1.5
2.0
2.5
3.0
-60 -40 -20 0 20 40 60 80 100 120 140 160 180
J
T , Junction Temperature (°C)
R , Drain-to-Source On Resistance
DS(on)
(Normalized)
V = 10V
GS
A
I = 30A
D
IRL540NS/L
Fig 8. Maximum Safe Operating Area
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 7. Typical Source-Drain Diode
Forward Voltage
1
10
100
1000
0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8
T = 25°C
J
V = 0V
GS
V , Source-to-Drain Voltage (V)
I , Reverse Drain Current (A)
SD
SD
A
T = 175°C
J
1
10
100
1000
1 10 100 1000
V , Drain-to-Source Volta
g
e
(
V
)
DS
I , Drain Current (A)
OPERATION IN THIS AREA LIMITED
BY R
D
DS(on)
10µs
100µs
1ms
10ms
A
T = 25°C
T = 175°C
Sin
g
le Pulse
C
J
0
3
6
9
12
15
0 20406080100
Q , Total Gate Char
g
e
(
nC
)
G
V , Gate-to-Source Voltage (V)
GS
V = 80V
V = 50V
V = 20V
DS
DS
DS
A
FOR TEST CIRCUIT
SEE FIGURE 13
I = 18A
D
0
1000
2000
3000
1 10 100
C, Capacitance (pF)
DS
V , Drain-to-Source Volta
g
e
(
V
)
A
V = 0V, f = 1MHz
C = C + C , C SHORTED
C = C
C = C + C
GS
iss gs gd ds
rss gd
oss ds gd
C
iss
C
oss
C
rss
IRL540NS/L
Fig 9. Maximum Drain Current Vs.
Case Temperature
Fig 10a. Switching Time Test Circuit
V
DS
90%
10%
V
GS t
d(on)
t
r
t
d(off)
t
f
Fig 10b. Switching Time Waveforms
VDS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
RD
VGS
RGD.U.T.
5.0V
+
-
VDD
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
25 50 75 100 125 150 175
0
10
20
30
40
T , Case Temperature ( C)
I , Drain Current (A)
°
C
D
0.01
0.1
1
10
0.00001 0.0001 0.001 0.01 0.1 1
Notes:
1. Duty factor D = t / t
2. Peak T =P x Z + T
1 2
JDM thJC C
P
t
t
DM
1
2
t , Rectangular Pulse Duration (sec)
Thermal Response (Z )
1
thJC
0.01
0.02
0.05
0.10
0.20
D = 0.50
SINGLE PULSE
(THERMAL RESPONSE)
IRL540NS/L
Q
G
Q
GS
Q
GD
V
G
Charge
D.U.T. V
DS
I
D
I
G
3mA
V
GS
.3µF
50KΩ
.2µF
12V
Current Regulator
Same Type as D.U.T.
Current Sampling Resistors
+
-
5.0 V
Fig 13b. Gate Charge Test Circuit
Fig 13a. Basic Gate Charge Waveform
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
Fig 12b. Unclamped Inductive Waveforms
Fig 12a. Unclamped Inductive Test Circuit
tp
V
(BR)DSS
I
AS
0
200
400
600
800
25 50 75 100 125 150 175
J
E , Single Pulse Avalanche Energy (mJ)
AS
A
Startin
g
T , Junction Temperature
(
°C
)
I
TOP 7.3A
13A
BOTTOM 18A
D
RG
I
AS
0.01
Ω
t
p
D.U.T
L
VDS
+
-VDD
DRIVER
A
15V
10V
IRL540NS/L
P.W. Period
di/dt
Diode Recovery
dv/dt
Ripple ≤5%
Body Diode Forward Drop
Re-Applied
Voltage
Reverse
Recovery
Current Body Diode Forward
Current
V
GS
=10V
V
DD
I
SD
Driver Gate Drive
D.U.T. I
SD
Waveform
D.U.T. V
DS
Waveform
Inductor Curent
D = P.W.
Period
+
-
+
+
+
-
-
-
Fig 14. For N-Channel HEXFETS
* VGS = 5V for Logic Level Devices
Peak Diode Recovery dv/dt Test Circuit
RGVDD
• dv/dt controlled by RG
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
D.U.T Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
*
IRL540NS/L
D2Pak Package Outline
D2Pak
Part Marking Information
10.16 (.400)
REF.
6.47 (.255 )
6.18 (.243 )
2.61 (.1 0 3 )
2.32 (.0 9 1 )
8.89 (.350)
REF.
- B -
1.32 (.052)
1.22 (.048)
2.79 (.110)
2.29 (.090)
1.39 (.055)
1.14 (.045)
5.28 (.2 0 8 )
4.78 (.1 8 8 )
4.69 (.185)
4.20 (.165)
10.54 (.415)
10.29 (.405)
- A -
2
1 3 15.49 (.610)
14.73 (.580)
3X 0.93 (.037)
0.69 (.027)
5 .08 (.200)
3X 1.40 (.055)
1.14 (.045)
1.78 (.070)
1.27 (.050)
1.40 (.055)
MAX .
NOTES:
1 DIMENSIONS AFTER SOLDER DIP.
2 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982.
3 CONTROLLING DIM ENSION : INCH.
4 HEATSINK & LEAD DIM ENSIONS DO NOT INCLUDE BURRS.
0.55 (.022)
0.46 (.018)
0.2 5 ( .0 1 0) M B A M MINIMUM RECOM MENDED FOOTP RINT
11.43 (.450)
8 .89 (.350)
17 .78 (.700)
3.81 (.15 0)
2.08 (.082)
2X
LEAD AS SIGN MEN TS
1 - GATE
2 - DR AIN
3 - SOURCE
2.54 (.100)
2X
PAR T N UM BER
INTERNATIONAL
RE CTIFIE R
LO GO DATE CODE
(YYW W )
YY = YEAR
WW = WEEK
A S SEMBLY
LO T CO D E
F530S
9B 1M
9246
A
IRL540NS/L
Package Outline
TO-262 Outline
TO-262
Part Marking Information
IRL540NS/L
Tape & Reel Information
D2Pak
WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331
EUROPEAN HEADQUARTERS: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: ++ 44 1883 732020
IR CANADA: 7321 Victoria Park Ave., Suite 201, Markham, Ontario L3R 2Z8, Tel: (905) 475 1897
IR GERMANY: Saalburgstrasse 157, 61350 Bad Homburg Tel: ++ 49 6172 96590
IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: ++ 39 11 451 0111
IR FAR EAST: K&H Bldg., 2F, 30-4 Nishi-Ikebukuro 3-Chome, Toshima-Ku, Tokyo Japan 171 Tel: 81 3 3983 0086
IR SOUTHEAST ASIA: 315 Outram Road, #10-02 Tan Boon Liat Building, Singapore 0316 Tel: 65 221 8371
http://www.irf.com/ Data and specifications subject to change without notice. 5/98
3
4
4
TRR
FEED DIRECTION
1.85 (.07 3)
1.65 (.06 5)
1.60 (.063)
1.50 (.059)
4.10 (.16 1)
3.90 (.15 3)
TRL
FE ED D IRE CTION
10 .9 0 (.429)
10 .7 0 (.421) 16.10 (.634)
15.90 (.626)
1.75 (.069)
1.25 (.049)
11.60 (.457)
11.40 (.449) 15.42 (.609)
15.22 (.601)
4.72 (.136)
4.52 (.178)
24.30 (.957)
23.90 (.941)
0.3 68 (.0145)
0.3 42 (.0135)
1 .60 (.06 3)
1 .50 (.05 9)
13.50 (.532)
12.80 (.504)
330.00
(14.173)
MAX.
2 7.4 0 ( 1.079)
2 3.9 0 ( .941)
60.00 (2.362)
MIN .
3 0.40 (1.1 97)
M A X .
26.4 0 ( 1 .0 39)
24 .40 ( .961 )
NOT ES :
1. CO M F O RM S TO E IA -418.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIO N MEASURED @ HU B.
4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.
Note: For the most current drawings please refer to the IR website at:
http://www.irf.com/package/
