General Description
The MAX5408–MAX5411 dual, logarithmic taper digital
potentiometers, with 32-tap points each, replace
mechanical potentiometers in audio applications requir-
ing digitally controlled resistors. The MAX5408/
MAX5410 are dual potentiometers with one wiper per
potentiometer. The MAX5409/MAX5411 are dual poten-
tiometers with two wipers per potentiometer (see
Functional Diagram). An SPI™-compatible serial inter-
face controls the wiper positions. The MAX5408–
MAX5411 have a factory-set resistance of 10kΩper
potentiometer. A zero-crossing detect feature mini-
mizes the audible noise generated by wiper transitions.
The MAX5408–MAX5411 have nominal temperature
coefficients of 35ppm/°C end-to-end and 5ppm/°C
ratiometric. The MAX5408–MAX5411 are available in
16-pin QSOP and 16-pin thin QFN packages and are
specified over the extended temperature range (-40°C
to +85°C).
Applications
Stereo Volume Control
Fading and Balancing Stereo Signals
Mechanical Potentiometer Replacement
Features
♦Log Taper with 2dB Steps Between Taps
♦32-Tap Positions for Each Wiper
♦Small 16-Pin QSOP/QFN Packages
♦Single-Supply Voltage Operation
+2.7V to +3.6V (MAX5408/MAX5409)
+4.5V to +5.5V (MAX5410/MAX5411)
♦Low 0.5µA Standby Supply Current
♦Zero-Crossing Detection for Clickless Switching
♦Mute Function to -90dB
♦10kΩFixed Resistance Value
♦3-Wire SPI-Compatible Serial Data Interface
♦Power-On Reset: Wiper Goes to Maximum
Attenuation
♦Digital Output for Readback and Daisy-Chaining
Capabilities
MAX5408–MAX5411
Dual, Audio, Log Taper Digital Potentiometers
________________________________________________________________ Maxim Integrated Products 1
Pin Configurations
Ordering Information
19-2049; Rev 3; 1/05
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
PART TEMP RANGE PIN-
PACKAGE
WIPERS PER
RESISTOR
MAX5408EEE -40°C to +85°C16 QSOP 1
MAX5408ETE -40°C to +85°C16 Thin QFN 1
MAX5409EEE -40°C to +85°C16 QSOP 2
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
DOUT VDD
VLOGIC
GND
AGND
H1
L1
W1A
N.C. (W1B)
TOP VIEW
MAX5408-
MAX5411
QSOP
DIN
SCLK
L0
CS
H0
W0A
N.C. (W0B)
16 15 14 13
DIN DOUT VDD VLOGIC
5678
W0A N.C. (W0B) N.C. (W1B) W1A
9
10
11
12
L1
( ) ARE FOR MAX5409/MAX5411 ONLY
H1
AGND
GND
4
3
2
1
L0
H0
CS
SCLK
MAX5408-
MAX5411
THIN QFN
(4mm x 4mm)
(5mm x 6mm)
Ordering Information continued at end of data sheet.
Functional Diagram appears at end of data sheet.
SPI is a trademark of Motorola, Inc.
VDD, VLOGIC, CS, SCLK, DIN to GND......................-0.3V to +6V
H_, L_, and W_ to GND ..............................-0.3V to (VDD + 0.3V)
DOUT to GND.............................................-0.3V to (VDD + 0.3V)
AGND to GND .......................................................-0.3V to +0.3V
Input and Output Latchup Immunity...............................±200mA
Maximum Continuous Current into H_, L_, and W_.........±500µA
Continuous Power Dissipation (TA= +70°C)
16-Pin QSOP (derate 8.3mW/°C above +70°C)........666.7mW
16-Pin QFN (derate 18.5mW/°C above +70°C) .........1481mW
Operating Temperature Range ...........................-40°C to +85°C
Storage Temperature Range .............................-60°C to +150°C
Maximum Junction Temperature .....................................+150°C
Lead Temperature (soldering, 10s) .................................+300°C
MAX5408–MAX5411
Dual, Audio, Log Taper Digital Potentiometers
2_______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
(VDD = +2.7V to +3.6V (MAX5408/MAX5409), VDD = +4.5V to +5.5V (MAX5410/MAX5411), VH_ = VDD, VL_ = 0, TA= TMIN to TMAX.
Typical values are at TA= +25°C, unless otherwise specified.)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
End-to-End Resistance 71013kΩ
Maximum Bandwidth (Note 1) CW_ = 50pF 100 kHz
Absolute Tolerance ±0.25 dB
Tap-to-Tap Tolerance ±0.1 dB
Total Harmonic Distortion + Noise THD+N VIN = 1VRMS, f = 1kHz, tap = -6dB 0.002 %
Channel Isolation -100 dB
Interchannel Matching f = 20Hz to 20kHz, tap = -6dB ±0.5 dB
Mute Attenuation -90 dB
Power-Supply Rejection Ratio PSRR -80 dB
Wiper Resistance RW1000 1700 Ω
Wiper Capacitance CW10 pF
Digital Clock Feedthrough fSCLK = 20Hz to 20kHz, tap = -6dB -90 dB
End-to-End Resistance
Temperature Coefficient 35 ppm/°C
Ratiometric Resistance
Temperature Coefficient 5ppm/°C
DIGITAL INPUTS (VLOGIC > 4.5V)
Input High Voltage VIH 2.4 V
Input Low Voltage VIL 0.8 V
Input Leakage Current ±1 µA
Input Capacitance 5pF
DIGITAL INPUTS (VLOGIC < 4.5V)
Input High Voltage VIH 0.7 x
VLOGIC V
Input Low Voltage VIL 0. 3 x
VLOGIC V
Input Leakage Current ±1 µA
Input Capacitance 5pF
MAX5408–MAX5411
Dual, Audio, Log Taper Digital Potentiometers
_______________________________________________________________________________________ 3
ELECTRICAL CHARACTERISTICS (continued)
(VDD = +2.7V to +3.6V (MAX5408/MAX5409), VDD = +4.5V to +5.5V (MAX5410/MAX5411), VH_ = VDD, VL_ = 0, TA= TMIN to TMAX.
Typical values are at TA= +25°C, unless otherwise specified.)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS
DIGITAL OUTPUT
Output High Voltage VOH ISOURCE = 0.5mA VLOGIC
- 0.5 V
Output Low Voltage VOL ISINK = 2mA 0.4 V
TIMING CHARACTERISTICS (Figure 1)
SCLK Clock Period tCP 100 ns
SCLK Pulse Width High tCH 40 ns
SCLK Pulse Width Low tCL 40 ns
CS Fall to SCLK Rise Setup
Time tCSS 40 ns
SCLK Rise to CS Rise Hold Time tCSH 0ns
DIN Setup Time tDS 40 ns
DIN Hold Time tDH 0ns
SCLK Fall to DOUT Valid
Propagation Delay tDO CLOAD = 200pF 80 ns
CS Rise to SCLK Rise Hold Time tCS1 40 ns
CS Pulse Width High tCSW 100 ns
Wiper Settling Time tIW Zero-crossing detect disabled 1 µs
POWER SUPPLIES
MAX5408/MAX5409 2.7 3.6
Supply Voltage VDD MAX5410/MAX5411 4.5 5.5 V
Active Supply Current fSCLK = 2MHz (Note 2) 100
Standby Supply Current IDD (Note 3) 0.2 10 µA
Logic Supply Voltage VLOGIC 2.7 5.5 V
Logic Active Supply Current fS C L K = 2M H z, D OU T = fl oati ng ( N ote 2) 120
Logic Standby Supply Current ILOGIC DOUT = floating (Note 3) 0.5 10 µA
Note 1: Guaranteed by design, not production tested.
Note 2: Supply current measured while changing wiper position with zero crossing enabled.
Note 3: Supply current measured while wiper position is fixed.
MAX5408–MAX5411
Dual, Audio, Log Taper Digital Potentiometers
4_______________________________________________________________________________________
Typical Operating Characteristics
(VDD = +3V (MAX5408/MAX5409), VDD = +5V (MAX5410/MAX5411), DOUT = floating)
988
990
989
991
994
995
993
992
996
0 1.0 1.5 2.0 2.50.5 3.0 3.5 4.0 4.5 5.0
WIPER RESISTANCE vs.
WIPER VOLTAGE
MAX5408-11 toc01
WIPER VOLTAGE (V)
WIPER RESISTANCE (Ω)
TAP POSITION 31
VDD = 5V = VLOGIC, L_ = GND
-0.20
-0.15
-0.10
-0.05
0
0.05
0.10
0.15
0.20
-40 -15 10 35 60 85
END-TO-END RESISTANCE % CHANGE
vs. TEMPERATURE
MAX5408-11 toc02
TEMPERATURE (°C)
END-TO-END RESISTANCE CHANGE (%)
-70
-60
-40
-50
-20
-10
-30
0
081241620242832
ATTENUATION vs. TAP POSITION
MAX5408-11 toc03
TAP POSITION
ATTENUATION (dB)
20
25
30
35
40
45
50
55
60
-40 -15 10 35 60 85
TOTAL SUPPLY CURRENT
VS. TEMPERATURE
MAX5408-11 toc04
TEMPERATURE (°C)
TOTAL SUPPLY CURRENT (µA)
ZERO-CROSSING ENABLED
ITOTAL = IDD + ILOGIC
ACTIVE MODE
4µs/div
TAP-TO-TAP SWITCHING TRANSIENT
(ZERO-CROSSING DISABLE)
VW_
2V/div
CS
2V/div
MAX5408-11 toc05
VH_ = 5V
VL_ = 0
0
0.10
0.05
0.20
0.15
0.25
0.30
2.5 3.5 4.03.0 4.5 5.0 5.5
LOGIC CURRENT
vs. LOGIC VOLTAGE
MAX5408-11 toc06
LOGIC SUPPLY VOLTAGE (V)
LOGIC SUPPLY CURRENT (µA)
STANDBY MODE
SCLK = GND
MAX5408–MAX5411
Dual, Audio, Log Taper Digital Potentiometers
_______________________________________________________________________________________ 5
Typical Operating Characteristics (continued)
(VDD = +3V (MAX5408/MAX5409), VDD = +5V (MAX5410/MAX5411), DOUT = floating)
0
15
10
5
20
25
30
35
40
45
50
2.5 3.53.0 4.0 4.5 5.0 5.5
LOGIC CURRENT
vs. LOGIC VOLTAGE
MAX5408-11 toc07
LOGIC SUPPLY VOLTAGE (V)
LOGIC SUPPLY CURRENT (µA)
ACTIVE MODE
SCLK = 2MHz, O to VLOGIC
0
0.05
0.10
0.15
0.20
0.25
0.30
0.35
0.40
0.45
0.50
0.55
2.5 3.0 3.5 4.0 4.5 5.0 5.5
SUPPLY CURRENT
vs. SUPPLY VOLTAGE
MAX5408-11 toc08
VDD (V)
IDD (µA)
ZERO-CROSSING DETECTION DISABLED
ACTIVE
STANDBY
Pin Description
PIN
M A X5 4 0 8 /
M A X5 4 1 0
(
Q F N
)
M A X5 4 0 8 /
M A X5 4 1 0
(
Q SO P
)
M A X5 4 0 9 /
M A X5 4 1 1
(
Q F N
)
M A X5 4 0 9 /
M A X5 4 1 1
(
Q SO P
)
NAME FUNCTION
1313SCLK Serial Clock Input
2424CS Chip-Select Input
3535H0 High Terminal of Resistor 0
4646L0 Low Terminal of Resistor 0
5757W0A Wiper Terminal A of Resistor 0
—— 68W0B Wiper Terminal B of Resistor 0
—— 79W1B Wiper Terminal B of Resistor 1
810810 W1A Wiper Terminal A of Resistor 1
911911 L1 Low Terminal of Resistor 1
10 12 10 12 H1 High Terminal of Resistor 1
11 13 11 13 AGND Analog Ground
12 14 12 14 GND Ground
13 15 13 15 V
LOGIC Digital Logic Power Supply
14 16 14 16 VDD Analog Power Supply
15 1 15 1 DOUT Serial Data Output
16 2 16 2 DIN Serial Data Input
6, 7 8, 9 — — N.C. No Connection. Not internally connected.
MAX5408–MAX5411
Dual, Audio, Log Taper Digital Potentiometers
6_______________________________________________________________________________________
Detailed Description
Digital Serial Interface
An SPI-compatible serial interface controls the
MAX5408–MAX5411. The input word to the device is
eight bits long, composed of three address bits (A0,
A1, and A2), followed by five data bits, with MSB first
(see Tables 1 and 2). The first three address bits set
the value of internal registers. The five data bits control
the wiper position. For certain commands, some of the
five data bits are “don’t cares”, but must be sent to the
device.
The serial data is listed in Tables 1 and 2.
The control code determines:
•Potentiometer to update or register to set.
•Data for mute register (Tables 3 and 4).
•Data for zero-crossing detection register (Tables 5
and 6).
The data bits control the position of the wiper (Table 7).
A logic low on the chip-select input (CS) enables the
device’s serial interface. A logic high on CS disables
the interface control circuitry. See Figure 1 for serial-
interface timing description.
8-BIT SERIAL WORD
A0 A1 A2 D4–D0 FUNCTION
00 05-bit DAC data Set position of wiper W0A
00 15-bit DAC data No change
01 05-bit DAC data Set position of wiper W1A
01 15-bit DAC data No change
10 04-bit mute data, D0 = “don’t care” Data for mute register (see Table 3)
10 1
4-bit zero-crossing detection data,
D0 = “don’t care”
Data for zero-crossing detection register
(see Table 5)
11 000000 Readback contents of wiper register for W0A
at DOUT
11 000001 No change
11 000010 Readback contents of wiper register for W1A
at DOUT
11 000011 No change
11 000100 Readback contents of mute register at DOUT
11 000101 Readback contents of zero-crossing detection
register at DOUT
11 1D4 = 0, D3–D0 = “don’t care”
Immediate update then analog power-down
when zero crossing is enabled. No effect
when zero crossing is disabled.
Table 1. Serial Interface Programming Commands for MAX5408/MAX5410
tCSS tCL
tCH
tDS tDH
tCP tCSH
tCSI
tCSW
tDO
tIW
WIPER
DOUT
DIN
SCLK
CS
DOUT
DIN
SCLK
CS
Figure 1. Serial Timing Diagram
MAX5408–MAX5411
Dual, Audio, Log Taper Digital Potentiometers
_______________________________________________________________________________________ 7
8-BIT SERIAL WORD
A0 A1 A2 D4–D0 FUNCTION
0005-bit DAC data Set position of wiper W0A
0015-bit DAC data Set position of wiper W0B
0105-bit DAC data Set position of wiper W1A
0115-bit DAC data Set position of wiper W1B
100
4-bit mute data, D0 = “don’t care” Data for mute register (see Table 4)
101
4-bit zero-crossing detection data,
D0 = “don’t care”
Data for zero-crossing detection register
(see Table 6)
11000000 Readback contents of wiper register for W0A at DOUT
11000001 Readback contents of wiper register for W0B at DOUT
11000010 Readback contents of wiper register for W1A at DOUT
11000011 Readback contents of wiper register for W1B at DOUT
11000100 Readback contents of mute register at DOUT
11000101 Readback contents of zero-crossing detection register at DOUT
111D4 = 0, D3–D0 = “don’t care” Analog power-down
111D4 = 1, D3–D0 = “don’t care” Analog power-up
Table 2. Serial Interface Programming Commands for MAX5409/MAX5411
DATA BIT VALUE FUNCTION
0Set wiper W0A to preprogrammed value (-62dB on power-up)
D4 1Set wiper W0A to mute (-90dB)
D3 “don’t care” No change
0Set wiper W1A to preprogrammed value (-62dB on power-up)
D2 1Set wiper W1A to mute (-90dB)
D1 “don’t care” No change
D0 “don’t care” No change
Table 3. Mute Register Bit Definitions for MAX5408/MAX5410
DATA BIT VALUE FUNCTION
0Set wiper W0A to preprogrammed value (-62dB on power-up)
D4 1Set wiper W0A to mute (-90dB)
0Set wiper W0B to preprogrammed value (-62dB on power-up)
D3 1Set wiper W0B to mute (-90dB)
0Set wiper W1A to preprogrammed value (-62dB on power-up)
D2 1Set wiper W1A to mute (-90dB)
0Set wiper W1B to preprogrammed value (-62dB on power-up)
D1 1Set wiper W1B to mute (-90dB)
D0 “don’t care” No change
Table 4. Mute Register Bit Definitions for MAX5409/MAX5411
MAX5408–MAX5411
The digital output, DOUT, lags the digital input signal,
DIN by 8.5 clock cycles. Force CS high to disable
DOUT, placing DOUT in three-state mode. Force CS
low to enable DOUT and disable three-state mode.
Force CS high, after a word has been written to the
MAX5408–MAX5411 to make a readback request. The
next CS low period writes the requested data to DOUT.
A readback request overwrites any previous data in the
shift register. Note that the data appears at DOUT in
the order: A0, A1, A2, D4, D3, D2, D1, D0. A0 will be
available after the first high-to-low transition of SCLK
when CS is low. The input continues to load the shift
register while data is being read out of the MAX5408–
MAX5411. The input data appears at DOUT 8.5 clock
cycles later. A CS transition from low-to-high latches
the input data. For any control byte, the state of SCLK
must be the same for both CS low-to-high transitions
and CS high-to-low transitions in order to preserve the
data at DOUT while CS transitions. For proper opera-
tion, ensure that the input data remains valid on both
the SCLK rising and falling edges when daisy chaining
multiple devices.
Zero-Crossing Detection
The zero-crossing detection register enables the zero-
crossing detect feature. The zero-crossing detect fea-
ture reduces the audible noise (“clicks and pops”) that
result from wiper transitions. The wiper changes posi-
tion only when the voltage at L_ is the same as the volt-
age at H_. Each wiper has a zero-crossing and timeout
Dual, Audio, Log Taper Digital Potentiometers
8_______________________________________________________________________________________
DATA BIT VALUE FUNCTION
0Disable wiper W0A zero-crossing detection circuit
D4 1Enable wiper W0A zero-crossing detection circuit
D3 “don’t care” No change
0Disable wiper W1A zero-crossing detection circuit
D2 1Enable wiper W1A zero-crossing detection circuit
D1 “don’t care” No change
D0 “don’t care” No change
Table 5. Zero-Crossing Detection Register Bit Definitions for MAX5408/MAX5410
DATA BIT VALUE FUNCTION
0Disable wiper W0A zero-crossing detection circuit
D4 1Enable wiper W0A zero-crossing detection circuit
0Disable wiper W0B zero-crossing detection circuit
D3 1Enable wiper W0B zero-crossing detection circuit
0Disable wiper W1A zero-crossing detection circuit
D2 1Enable wiper W1A zero-crossing detection circuit
0Disable wiper W1B zero-crossing detection circuit
D1 1Enable wiper W1B zero-crossing detection circuit
D0 “don’t care” No change
Table 6. Zero-Crossing Detection Register Bit Definitions for MAX5409/MAX5411
POSITION OUTPUT LEVEL (dB)
00
1-2
2-4
3-6
4-8
.
.
.
.
.
.
.
.
.
.
30 -60
31 -62
MUTE <-90
Table 7. Attenuation and Wiper Position
MAX5408–MAX5411
Dual, Audio, Log Taper Digital Potentiometers
_______________________________________________________________________________________ 9
MAX5409/
MAX5411
W0B W1B
L0 L1
H0 H1
VLEFT VRIGHT
VLEFTR
VLEFTF
VRIGHTR
VRIGHTF
W0A W1A
Figure 4. Stereo Volume Control with Front and Rear Fade
Figure 3. Attenuation Control
MAX5408–
MAX5411
W0A W1A
L0 L1
H0 H1
VIN0 VIN1
VOUT0 VOUT1
Figure 2. Zero-Crossing Timing Diagram
50ms (TYP)t = 0
VH_
VL_
WIPER
POSITION
-20dB
-10dB
100ms
CHANGING WIPER POSITIONS WITH ZERO-CROSSING ENABLED, COMMAND ISSUED AT t = 0
50ms (TYP)t = 0
VH_
VL_
WIPER
POSITION
-20dB
-10dB
100ms
Chip Information
TRANSISTOR COUNT: 12,875
PROCESS: BiCMOS
MAX5408–MAX5411
Dual, Audio, Log Taper Digital Potentiometers
10 ______________________________________________________________________________________
MAX5408–
MAX5411
MAX5408–
MAX5411
MAX5408–
MAX541
SDIN
SCLK
CS
DOUT SDIN
SCLK
CS
DOUT SDIN
SCLK
CS
DOUT
CS
SCLK
SDIN
MAX5408–
MAX5411
W0A W1A
L0 L1
H0 H1
VOUT0 VOUT1
VIN0 VIN1
Figure 6. Gain Control
Figure 5. Daisy-Chaining of Serial Interfaces
Ordering Information (continued)
PART TEMP RANGE PIN-
PACKAGE
WIPERS PER
RESISTOR
MAX5409ETE -40°C to +85°C16 Thin QFN 2
MAX5410EEE -40°C to +85°C16 QSOP 1
MAX5410ETE -40°C to +85°C16 Thin QFN 1
MAX5411EEE -40°C to +85°C16 QSOP 2
MAX5411ETE -40°C to +85°C16 Thin QFN 2
circuit (see Figure 2). With zero-crossing enabled, the
MAX5408–MAX5411 change wiper position after 50ms
or when zero crossing is detected.
Power-On Reset
The power-on reset (POR) feature sets all the wipers to
the maximum attenuation (tap position 31, -62dB) at
power-up. If either VDD or VLOGIC is zero volts, a power-
on reset intiates when one of the supplies is brought
back to the operating voltage.
Mute Function
When mute is enabled, the wipers go to -90dB attenua-
tion. When mute is disabled, the wiper returns to its
position before mute was enabled. All wipers can be
muted simultaneously or independently.
Applications Information
Attenuation Control
Figure 3 shows the application of an attenuation control.
The op amps are connected in a follower configuration
with a fixed gain. The digitally controlled potentiometer
attenuates the input signal.
Stereo Volume Control
Figure 4 shows the application of stereo volume con-
trol using MAX5409/MAX5411. The op amps are con-
nected in a follower configuration with fixed gain. The
digitally controlled potentiometer attenuates the input
signals. The second wiper of each potentiometer con-
trols the signal amplitude at the rear set of speakers.
Daisy-Chaining
Figure 5 shows an application daisy-chaining the
serial-interfaces of the MAX5408–MAX5411. A single-
write command updates multiple devices from a single
digital port in this configuration (see Digital Serial
Interface section).
Gain Control
Figure 6 shows the application of a gain control.
Note: Muting the potentiometer creates unpredictable
behavior at the output of the op amp, and may seriously
degrade the performance of the op amp.
MAX5408–MAX5411
Dual, Audio, Log Taper Digital Potentiometers
______________________________________________________________________________________ 11
MAX5408–
MAX5411
32 POSITION
DECODER/
REGISTER
AUDIO ZERO-
CROSSING
DETECTOR
SPI LOGIC
VLOGIC VDD GND AGND
L0 SCLK DIN CS L1
W0A N.C. (W1B)
H0 N.C. (W0B) DOUT W1A H1
( ) ARE FOR MAX5409/MAX5411 ONLY
Functional Diagram
MAX5408–MAX5411
Dual, Audio, Log Taper Digital Potentiometers
12 _______________________________________________________________________________________
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages.)
24L QFN THIN.EPS
C
1
2
21-0139
PACKAGE OUTLINE
12, 16, 20, 24L THIN QFN, 4x4x0.8mm
C
2
2
21-0139
PACKAGE OUTLINE
12, 16, 20, 24L THIN QFN, 4x4x0.8mm
MAX5408-MAX5411
Dual, Audio, Log Taper Digital Potentiometers
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 13
©2005 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products, Inc.
QSOP.EPS
E1
1
21-0055
PACKAGE OUTLINE, QSOP .150", .025" LEAD PITCH
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages.)
